G080uan01 0
G080uan01 0
G080uan01 0
AUO
*8$1
83
The information contained in this document has been carefully researched and is, to the best of our
knowledge, accurate. However, we assume no liability for any product failures or damages, immediate or
consequential, resulting from the use of the information provided herein. Our products are not intended for
use in systems in which failures of product could result in personal injury. All trademarks mentioned herein
are property of their respective owners. All specifications are subject to change without notice.
Product Specification
ial nly
nt e O
AU OPTRONICS CORPORATION
e
n fid l Us
Co erna :05
U O nt : 3 1
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E C 5
( ) Preliminary Specifications
I ST 8081
( v ) Final SpecificationsD
o r 2 01
F
Module 8”(8.0”) WUXGA 16:10 Color TFT-LCD
with LED Backlight design
T EC 15
2.1 General Specification .................................................................................................................... 5
D IS 8 08
2.2 Optical Characteristics................................................................................................................... 6
1
3. Functional Block
F or Diagram 2 0 ..................................................... 11
4. Absolute Maximum Ratings................................................... 12
4.1 Absolute Ratings of TFT LCD Module .........................................................................................12
4.2 Absolute Ratings of Environment .................................................................................................12
5. Electrical Characteristics.......................................................
y 13
t i al n l
5.1 TFT LCD Module.........................................................................................................................13
e n e O
d s
5.2 Backlight Unit ..............................................................................................................................20
o nfi al U
6. Signal Interface Characteristic.............................................. 21
C r n 0 5
U O nte : 3 1:
6.1 Pixel Format Image ......................................................................................................................21
6.2 Integration Interface Requirement
A I 15
................................................................................................22
E C 5
6.3 Interface Timing ...........................................................................................................................24
I ST 8081
6.4 Power On Sequence......................................................................................................................26
7. Panel Reliability r DTest 0............................................................
1 28
F o 2
7.1 Vibration Test ...............................................................................................................................28
7.2 Shock Test ....................................................................................................................................28
7.3 Reliability Test .............................................................................................................................28
8. Mechanical Characteristics....................................................
l ly 29
tia On
8.1 Standard Front View .....................................................................................................................29
n
i de Use
8.2 Standard Back View .....................................................................................................................30
f
C on nal
9. Shipping and Package ........................................................... 5 31
O nte r 1: 0
9.1 Shipping Label Format .................................................................................................................31
U I : 3
A
E C 5 15
9.2 Carton Package.............................................................................................................................31
9.3 Shipping Package of Palletizing
I 0 81
ST Sequence....................................................................................32
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Items Unit
i a l n ly Specifications
Support Color
i a l ly
RGB 8-bit
n
Temperature Range
Operating [ C] e
-10 ntot+60 e O
o
[ C] fid-20 to +70 s
o
Storage (Non-Operating)
o lU 5
n RoHSaCompliance
RoHS Compliance
C ern :0
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Product Specification
ial nly
nt e O
AU OPTRONICS CORPORATION
e
2.2 Optical Characteristics n fid l Us
o
Cstable n a 5 Temperature) :
The optical characteristics are measured under
O r
conditions
e :
at 25℃
1 0(Room
Item SymbolU
A Int 15:3 Min. Typ. Max.
Conditions Unit Note
White Luminance
T EC5 points 1average
5 425 500 --- cd/m2 1, 4, 5.
ILED=19mA
S 8
D
θ
I
1 80 (Right)
Horizontal 89 ---
r R
0
Viewing Angle Fo θ L 2 CR = 10 (Left)
89 ---
degree 4, 9
ψH Vertical (Upper) 89 ---
ψL CR = 10 (Lower)
89 ---
E C 5
Red
Rx
S T 8 1 0.574 0.604 0.634
I 0
r D
Ry
0 18 0.314 0.344 0.374
GreenF
o Gx 2 0.291 0.321 0.351
Color / Gy 0.586 0.616 0.646
Chromaticity
Coordinates Bx CIE 1931 0.125 0.155 0.185 4
Blue
By 0.076 0.106 0.136
Wx
i a y
l 0.283 nl0.313 0.343
White
Wy e nt e0.305O 0.335 0.365
NTSC % n fid l Us - 60 -
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U O nt : 3 1 W
A I 15
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W /4
5
W /4 W /4 W /4
I ST 8081
r D
H /4
011
F o 2 2
H /4
H 3
H /4
4
i a l 5
n ly
H /4 e nt e O
n fid l Us
o a
O
Note 2: 13 points position (Ref: Active area)
C e r n
1 : 05
t 3
AU C In 15: W
S T E
8
W /4 15 W /4 W /4 W /4
D I 10
1 80 10
r 0
Fo H /4
10
1
2 2 3
4 5
H /4
H 6 7al
i n ly 8
e nt e O
fid l Us
H /4
9n 10
C o n a 5
H /4 1 1O
t e r 1 2 1:0 13
U 10
I n : 3
A
E C 5 15
Note 3: The luminance uniformity of S
1 by dividing the maximum luminance values by the
T points0is8defined
I 5 or13
minimum test point luminance D
r 0 18
δ
F=o Minimum
W5
2 Brightness of five points
Maximum Brightness of five points
E C 5
I ST 8081
r D 01
F o 2
Field=2°
i a l n l y
e nt e50O cm
n fid l Us
Co erna :05
LCD Panel O t 1
U I n : 3 TFT-LCD Module
A
E C 5 15
I ST 8081
r D 01Center of the screen
o 2
F Luminance of White (Y ):
Note 5: Definition of Average L
Measure the luminance of gray level 63 at 5 points,YL = [L (1)+ L (2)+ L (3)+ L (4)+ L (5)] / 5
L (x) is corresponding to the luminance of the point X at Figure in Note (1).
i a l n ly
e nt e O
Note 6: Definition of contrast ratio:
fid formula.
U s
n
Contrast ratio is calculated with the following l
Coon theer“White”
Brightness na state:05
Contrast ratio (CR)=
U O ntthe “Black”:3state
BrightnessIon
1
A
E C 5 15
I ST 8081
r D 01
F
Note 7: Definition of Cross o
Talk (CT) 2
CT = | YB – YA | / YA × 100 (%)
Where
YA = Luminance of measured location without gray level 0 pattern (cd/m2)
i a l n ly
nt e O
YB = Luminance of measured location with gray level 0 pattern (cd/m2)
e
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90%
10%
i a l n ly
0%
Tf
e nt e O Tr
n fid l Us
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Note 1: At Ta (25℃ ) O
C ern
1 : 05
Note 2: Permanent damage to the
U may occur
Adevice Intif exceed
1 5 :3 values
maximum
C
Note 3: LED specification refer to sectionE
S T 5.2
8 15
Note 4: For quality performance, please
D 0 IIS (Incoming Inspection Standard).
I refer to8AUO
r 1
Fo 20 Twb=39℃
Twb=39°C T=40℃, H=95%
i a ly
l T=60℃,nH=55%
e nt e O
n fid l Us T=70℃,H=35%
T=70℃, H=30%
o a
O
C ern
1 : 05
t 3
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8 15
D I
1 80
-40 or -20 20 20 40 60 70
F
Operating Range Storage Range
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Symble
Fo
Parameter
2
Min Typ Max Units Note
Logic/LCD Drive
VDD 3.0 3.3 3.6 [Volt]
Voltage
PDD VDD Power 0.46 [Watt] Note 1
IDD IDD Current 153i a l [mA]nly Note 1
t
n1500 O
IRush Inrush Current
d e s e [mA] Note 2
n fi l U 5[mV]
VDDrp
Allowable Logic/LCD o
C ern a
100
Drive Ripple Voltage
O 1 : 0 p-p
U I n t :3driving voltage. (P
A 1 5
EC 15
Note 1: Maximum Measurement Condition:White Pattern at 3.3V max=V3.3 x Iblack)
i a l n ly
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n fid l Us
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r D 1
Fo 20 0V
0.5ms
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| VIDM|
id
Differential input voltage range (HS Rx mode) e s 500 mV
Fo 2
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ST 50MHz 1
8~ 450MHz
∆V CMRX(LF)
Common-mode interference
D I 8 0 -50 - 50 mV
Common-mode r termination01
C CM
Fo 2 - - 60 pF
HS RX Scheme
i a l n ly
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r D 01
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Symbol Parameter
i a l MinnlyTyp Max Unit Notes
Data to Clock Skew (mesured at transmitter) nt O
TSKEW[TX]
d e s e -0.15 0.15 UIINST 1
Data to Clock Setup Time (receiver) fi U 0.25
TSETUP[RX]
o n l UIINST 2
THOLD[RX] C erna :05 0.25
Data to Clock Hold Time (receiver) UIINST 2
Note:
U O nt : 3 1
1. Total silicon and package delay I
A budget ofC0.25*UI 15
INST
T E of 0.5 *UI15
2. Total setup and hold window for receiver INST
D I S 8 08
o r 2 01
F
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LP Receiver AC Specifications A I 15
E C 5
Symbol Parameter
S T 8 1 Conditions Min Typ Max Unit
I 0
e
SPIKE
r D
Input pulse rejection
0 18 - - 300 V.ps
TMIN-RX
MinimumF o width response
pulse 2 50 - - ns
For MIPI data transmission from TX to TCON works properly in video mode, it is suggested that all of MIPI lanes
i a l n ly
nt e clock
status follow the scheme showed in below. When power is turned on, all lanes (include clock lane) are into
e O lane is into HS and start toggling.
d
LP-11 status first. When TX wants to start transmitting data
s
to TCON, the
nfiAfter data
Then data lanes are into HS and data are transmitted.
o a
U
ltransmissions are finished (ex. H-blanking,
C n 5
0 transmission start from LP-11 and
r lane, too.1:The
V-blanking), the data lanes are returned to LP-11, then clock
O t e 3
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Product Specification
ial nly
AU OPTRONICS CORPORATION
e nt e O
id
frecommendedU s
n
stop in LP-11 on all lanes (include clock lane) are the l proper operation sequence for MIPI video
mode. Co erna :05
U O nt : 3 1
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I ST 8081
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F o 2
The timing definitions are listed in below,
Parameter Description Min Typ Max Unit
Timeout for receiver to detect absence of Clock
TCLK-MISS
i a l n ly 60 ns
transitions and disable the Clock Lane HS-RX. t
nsend O
Time that the transmitter continuesd e
to HS se
o
clock after the last associated nfiLane has
Data
a l U 605ns +
TCLK-POST
C ern as the :0
transitioned to LP Mode. Interval is defined ns
U O n tto the beginning
: 3 1 52*UI
A
period from the end I
of THS-TRAIL
15
E C 5
81driven by the
of TCLK-TRAIL.
Time that theIHSSTclock shall0
r 18 Data Lane 8
D to any associated
0
be
TCLK-PRE
Fo
transmitter prior 2
beginning the transition from LP to HS mode.
UI
a l
Time for the Data Lane receiver to enable the
i n ly
t
HS line termination, starting from the timenpoint O 35 ns +
TD-TERM-EN
d e s e ns
nfi al U
4*UI
when Dn crosses VIL,MAX.
o
C ern of :05
TEOT Transmitted time interval from the start 105 ns + ns
O t 3 1
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Product Specification
ial nly
AU OPTRONICS CORPORATION
e nt e O
THS-TRAIL or TCLK-TRAIL, ton
d of the Us
fistart
o the
a l 12*UI
C
LP-11 state following a HS burst.
O e r n
1 : 05
THS-EXIT A U
Time that the transmitter IntLP-111following
drives
5 :3 100 ns
a HS burst.
T EC 15
THS-SYNC
D IS '00011101'
HS Sync-Sequence
8 08period 8 UI
Time that
o 2 01 drives the Data Lane
r the transmitter
THS-PREPARE FLine state immediately before the HS-0 Line 40 ns + 4*UI
LP-00
85 ns +
ns
6*UI
state starting the HS transmission
THS-PREPARE + time that the transmitter
THS-PREPARE 145 ns +
drives the HS-0 state prior to transmitting the Sync ns
+ THS-ZERO
sequence. tia
l 10*UI
O nly
e n e
d s
nfi starting
Time interval during which the HS receiver shall
o U 85 ns + 6*UI
lfrom 145 ns +
THS-SETTLE ignore any Data Lane HS transitions,
C n a 05 10*UI
ns
the beginning of THS-PREPARE. er :
O t :3 1
U which the
Aduring
Time interval InHS-RX 1 5
should
C Data Lane,
S T Ethe
ignore any transitions on
8 15 following a 55 ns +
THS-SKIP HS burst. The end
D I point of the80interval is defined as 40 ns
o r of the LP-11
the beginning 2 01state following the HS 4*UI
F
burst.
Time that the transmitter drives the flipped
THS-TRAIL differential state after last payload data bit of a HS 60 ns + 4*UI ns
transmission burst
i a l n ly
Transmitted length of any Low-Power n t
state O
TLPX
d e s e
50 ns
period
n fi lU 5
o
Ratio of TLPX(MASTER)/TLPX(SLAVE)a
Ratio TLPX
between Master and O
C
Slave side te
rn 1:02/3 3/2
Anew :3
U transmitterIndrives the 5Bridge
Time that the
EC control1during1
5 a Link
TTA-GET
I S T
state (LP-00) after accepting
0 8 5*TLPX ns
Turnaround. D
r 0 18
Fothat the transmitter
Time 2 drives the Bridge state
TTA-GO (LP-00) before releasing control during a Link 4*TLPX ns
Turnaround.
Time that the new transmitter waits after the
TTA-SURE
i a l TLPX nly
LP-10 state before transmitting the Bridge state 2*TLPX ns
n t O
(LP-00) during a Link Turnaround.
d e s e
o nfi al U
O
C ern
1 : 05
t 3
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Product Specification
ial nly
AU OPTRONICS CORPORATION
e nt e O
Note: n fid l Us
CoImplementations
1. The minimum value depends on the bit rate.
e r n a should0ensure
: 5 proper operation for all the
O 1
supported bit rates.
A U Int 15:3
2. TLPX is an internal state machine timing C 5
T E reference.1Externally measured values may differ slightly from the
specified values due to asymmetrical 8
ISrise and fall80times.
3. The I-chip of AUO use is r D 01(BTA define ignore).
not support BTA
F o 2
High-Speed Data Transmission in Bursts
i a l n ly
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Switching the Clock Lane between Clock Transmission and Low-Power Mode
i a l n ly
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Turnaround Procedure i a l n ly
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(Ta=25℃)
LED Life-Time N/A 20,000 Hour
Note2.
i a l n ly [Volt]
LED Forward Voltage VF - t
n2.85 O
3.1 (Ta=25℃)
i d e se
n f U
LED Forward Voltage of
every LED string VF-string Co- n al 0524.8 [Volt]
22.8
(Ta=25℃)
Note3.
O e r 1 :
A U I nt 5 :3
LED Forward Current IF
E C -
5 1 19 - [mA] (Ta=25℃)
I ST 8081
D
reference P 0=1V (Normal Distribution) * I (Normal Distribution) / Efficiency
Note 1: Calculator value for r
Fodefine as the2estimated time to 50% degradation of initial luminous.
LED F F
i a l n ly
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F o
For DISTEC internal use 2
only
6. Signal Interface Characteristic i a l n ly
6.1 Pixel Format Image e nt e O
f id U s
n l
Co eandrnLCD
Following figure shows the relationship of the input signals a pixel format.
: 05
O t 3 1
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D I
1 80
r 20
Fo
i a l n ly
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1920th
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F o
For DISTEC internal use 2
only
i a l n ly
6.2 Integration Interface Requirement e nt e O
6.2.1 Connector Description n fid l Us
Coon module.
Physical interface is described as for the connector
e r n a
: 05
O nt signals 1
AU CtheIfollowing
These connectors are capable of accommodating
1 5:3and will be following components.
MIPI connector: S T E
8 15
D I
1 80
o r
Connector Name / Designation
2 0 For Signal Connector
F
Manufacturer Hirose
1 GND T E
Ground
S 8 15 P
2 GND
I
D Ground018 0 P
r
3 GND Fo 2
Ground P
4 NC NC (AUO only) P
7 VCC n
Power Supply 3.0V O tia n P
d e s e
8 NC NC
o nfi al U -
9 FB3- CathodeC
O e r n
1 : 05 P
10 FB2-
AU Cathode Int 15:3 P
11 FB1- EC 15
Cathode
T P
12 NC D ISNC 808 -
o r Anode 2 01
13 LED+ F P
14 LED+ Anode P
15 NC NC P
16 GND Ground
i a l n ly P
17 MIPI_DATA0_P nt e O I
MIPI Differential Data Input
e
18 MIPI_DATA0_N
n id Input Us
MIPI DifferentialfData I
o a l
19 GND Ground C
O e r n
1 : 05 P
20 MIPI_DATA1_P
AU IntData Input
MIPI Differential
1 5 :3 I
C
21 MIPI_DATA1_N MIPI E
S T 15 Input
Differential Data
8 I
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i a l n lyP
22 GND Ground
t
nInput O
23 MIPI_CLK_P i d e
MIPI Differential Clock s e I
f
n Input U
24 MIPI_CLK_N
Co Clock
MIPI Differential
n al 05 I
O nte r 1:
25 GND
UGround
I : 3 P
26 MIPI_DATA2_P
A MIPI Differential
E C Data5 Input 15 I
T 1
27 MIPI_DATA2_N
D 8 08Data Input
ISMIPI Differential I
r Ground 1
28 GND
Fo 20 P
31 GND Ground P
ial nly-
32 NC NC (AUO only)
e nt e O
33 ID0 ID0 (GND)
n fid l Us O
ID1 (NC) o
34 ID1
C erna :05 O
35 GND
U O nt
Ground
: 3 1 P
I
A PWM CControl Signal 15 of LED
E 5
36 LEDPWMOUT
I T
SConvert(3.3V)
0 81 O
37 NC r D NC (AUO0 18only) -
38 NC
Fo 2
NC (AUO only) -
39 NC NC -
40 NC NC -
41 NC NC
t i al
O nly-
NC e n e
42 NC
d s -
43 NC NC o nfi al U -
NCO
C ern
1 : 05
nt
44 NC -
45 GND AU Ground C
I 1 5:3 P
S T E
8 15
D I
1 80
r 20
Fo
i a l n ly
e nt e O
n fid l Us
Co erna :05
U O nt : 3 1
A I 15
E C 5
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6.3 Interface Timing i a l n ly
6.3.1 Timing Characteristics e nt e O
Basically, interface timings should match the 1200 x 1920
U s
d Hz manufacturing
fi/60 guide line timing.
o n l
C erna :05
ITEM
U O SYNBOL n t min:31 typ max UNIT
A I 15 55
Frame Rate E C
- 5 60 Hz
T 1
IS - 808
LCD
Pixels Rate
r D 0 1 159.4 MHz
Fo
Frequency
2 fCLK 500 MHz
DCLK
Period Tclk 1 ns
ial nly
Horizontal Active time tHadr
e nt e O1200 tCLK
U I : 3
Horizontal A Back
E C 5 15 32 60 60
Timing Porch
ST 808
tHBP 1 tCLK
I
Horizontal D Front 1
r 20 tHFP
Fo
Porch
60 80 81
tCLK
C on nal 5 35
Vertical Front Porch tVFP e r 35 :0 36 tH
O nt :3 1
Differential Swing AU C I
VDswing 1 5140 mV
T E 1 5
S 8
D I
1 80
TX SPD
955 999 1000, Mbps
Bit Rate r 0 (MBPS)
Fo 2
Data bit/
8
Pixel Fomat pixel
Lane 1 Lane
O tia
l nly
e n e
d s
o nfi al U
O
C ern
1 : 05
t 3
AU C In 15:
S T E
8 15
G080UAN01.0 I
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For DISTEC internal
i a l n ly
e nt e O
n fid l Us
Co erna :05
U O nt : 3 1
A I 15
E C 5
I ST 8081
r D 01
F o 2
i a l n ly
e nt e O
n fid l Us
Co erna :05
U O nt : 3 1
A I 15
E C 5
I ST 8081
r D 01 >70mV
F
Note: VIDTH is the input high o
threshold and2should
VIDTL is the input low threshold and should < -70mV
i a l n ly
e nt e O
n fid l Us
Co erna :05
U O nt : 3 1
A I 15
E C 5
I ST 8081
r D 01
F o 2
i a l n ly
e nt e O
n fid l Us
Co erna :05
U O nt : 3 1
A I 15
E C 5
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6.4 Power On Sequence i a l n ly
e nt e O
6.4.1 Power n fid l Us
Co LED
Power on/off sequence is as follows. Interface signals and e r
a
non/off : 05 are also shown in the chart.
sequence
O t 3 1
AU C In 15:
S T E
8 15
D I
1 80
r 20
Fo
i a l n ly
e nt e O
n fid l Us
Co erna :05
U O nt : 3 1
A I 15
E C 5
I ST Value 0 81
Parameter r D
Min. 0 18Typ. Max. Unit
Remark
T1
Fo 2
5 - - ms
T2 180 - - ms
T3 100 - - ms
T4 200 i-a
-
l nmsl
y
e nt - e O ms
T5 200 -
n fid l Us
T6 500
Co- erna - :05 ms
120 O - t - 1
T7
U I n : 3 ms
A
E C 5 15
6.4.2 MIPI Command I ST 8081
r D 0 1
NO F o
Document No.2 Type Attachment file
NT51021 AN-017
切換控制權
1 V01 20140110 I2C NT51021 AN-017
(MIPI LP mode) V01 20140110 I2C Enforce Mode.pdf
Enforce Mode.pdf
NT51021 AN-002 i a l n ly
IC noisee
t
nMIPI O NT51021 AN-002
2 V01 20140926 MIPI
d for
s e
Video Input.pdf
o nfi al U V01 20140926 MIPI Video Input.pdf
NT51021 AN-023 C
O e r n
1 : 05
3 V2.0 ALS
A U Int ALS15:3 NT51021 AN-023
Application NoticeEC
V2.0 ALS Application Notice 20140731.pdf
1 5
G080UAN01.0 I ST 808
Document Version : 1.0 26 of 32
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20140731.pdf i a l n ly
e nt e O
fid l Us
NT51021 AN-024
V1.1 CABC n
4
Application Co CABC_EN
r n a
: 0 5 V1.1NT51021 AN-024
20140128.pdf
NT51021 AN-003
6
V03 20140930 MIPI MIPI AC Timing Fine
i a l n l y AN-003
NT51021
tune t
AC Timing Fine
e n e O V03 20140930 MIPI AC Timing Fine Tune.pdf
Tune.pdf
n fid l Us
C o n a 5 Page 0 :
O nSleep r
e in/ out 31: 0
7
U I t :
Sleep in:0x10,
A
E C 5 15 sleep out:0x11,
Double-Click the “Attachment Icon” above for
S 8 1 file.
Topening0attachment
I
D 18 GAMMA 2.2 in the Power Supply condition for the module。
Remark: initialization code must include the code for
r 0
Fo 2
i a l n ly
e nt e O
n fid l Us
Co erna :05
U O nt : 3 1
A I 15
E C 5
I ST 8081
r D 01
F o 2
i a l n ly
e nt e O
n fid l Us
Co erna :05
U O nt : 3 1
A I 15
E C 5
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7. Panel Reliability Test i a l n ly
e nt e O
f id U s
7.1 Vibration Test o n a l
Test Spec:
O
C e r n
1 : 05
t 3
Test method: AU C In 15:
Non-Operation
Acceleration: 1.5 G
S T E
8 15
Frequency: 10 - 500HzI Random 80
r D 01(X, Y, Z)
Sweep: 30
F oMinutes 2
each Axis
U O nt : 3 1
A I 15
7.3 Reliability Test E C 5
I ST 8081
Items r D 0 1 Required Condition Note
Temperature F o 2
Humidity Bias Ta= 40℃, 90%RH, 300h
High Temperature Operation Ta= 60℃, Dry, 240h
Low Temperature Operation Ta= -10℃, 240h
High Temperature Storage Ta= 70℃, 240h
i a l n ly
Low Temperature Storage Ta= -20℃, 240h
e nt e O
Thermal Shock fid l min, U s
Ta=-20℃ to 70℃, n Duration at 30
Test
C o n a 100 5
cycles
ESD
Contact : ±8 KV
O t e r 1 :0 Note 1
U n : 3
A: ±15 KV C I
Air
15
E 5
Note1: According to EN 61000-4-2I,S
T
ESD class8B:0 81
Some performance degradation allowed. Self-recoverable.
r D failures.01
Fo
No data lost, No hardware 2
Remark: MTBF (Excluding the LED): 30,000 hours with a confidence level 90%
i a l n ly
e nt e O
n fid l Us
Co erna :05
U O nt : 3 1
A I 15
E C 5
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8. Mechanical Characteristics i a l n ly
e nt e O
8.1 Standard Front View
n fid l Us
Co erna :05
U O nt : 3 1
A I 15
E C 5
I ST 8081
r D 01
F o 2
i a l n ly
e nt e O
n fid l Us
Co erna :05
U O nt : 3 1
A I 15
E C 5
I ST 8081
r D 01
F o 2
i a l n ly
e nt e O
n fid l Us
Co erna :05
U O nt : 3 1
A I 15
E C 5
I ST 8081
r D 01
F o 2
i a l n ly
e nt e O
n fid l Us
Co erna :05
U O nt : 3 1
A I 15
E C 5
I ST 8081
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8.2 Standard Back View i a l n ly
e nt e O
n fid l Us
Co erna :05
U O nt : 3 1
A I 15
E C 5
I ST 8081
r D 01
F o 2
i a l n ly
e nt e O
n fid l Us
Co erna :05
U O nt : 3 1
A I 15
E C 5
I ST 8081
r D 01
F o 2
i a l n ly
e nt e O
n fid l Us
Co erna :05
U O nt : 3 1
A I 15
E C 5
I ST 8081
r D 01
F o 2
i a l n ly
e nt e O
n fid l Us
Co erna :05
U O nt : 3 1
A I 15
E C 5
I ST 8081
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i a l n ly
n t O
9. Shipping and Package d e s e
n fi lU 5
9.1 Shipping Label Format o
C ern a
O t 1 :0
3
Shipping label: AU C In 15:
S T E
8 15
D I
1 80
r 20
Fo
G080UAN01
.0
i a l n ly
e nt e O
n fid l Us
Co erna :05
U O nt : 3 1
A I 15
9.2 Carton Package E C 5
I ST 8081
r D 01
F o 2
i a l n ly
e nt e O
n fid l Us
Co erna :05
U O nt : 3 1
A I 15
E C 5
I ST 8081
r D 01
F o 2
i a l n ly
e nt e O
n fid l Us
Co erna :05
U O nt : 3 1
A I 15
E C 5
I ST 8081
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l ly
tia
9.3 Shipping Package of Palletizing Sequence
n O n
i d e se
n f l U
Co erna :05
U O nt : 3 1
A I 15
E C 5
I ST 8081
r D 01
F o 2
i a l n ly
e nt e O
n fid l Us
Co erna :05
U O nt : 3 1
A I 15
E C 5
I ST 8081
r D 01
F o 2
6 pcs/tray
(11+1)trays/carton i a l n ly
Total 66 pcs panel/carton e nt e O
Total carton weight: 10.2 Kg n fid l Us
o a
Carton type: 520*340*250mm O
C e r n
1 : 05
AUof theC
PP Board: Put it on the bottom Int 15:3
Tray
S T E
8 15
D I
1 80
r 20
Fo
i a l n ly
e nt e O
n fid l Us
Co erna :05
U O nt : 3 1
A I 15
E C 5
I ST 8081
r D 01- provided by edbertanondo on 2018/08/15
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