Module 1 Notes
Module 1 Notes
Embedded Systems:
Microprocessor is a general-purpose device. These microprocessors contain no
RAM, no ROM, and no I/O ports on the chip itself.
Microcontroller has
1. CPU (microprocessor)
1. RAM
2. ROM
3. I/O ports
4. Timer
5. ADC and other peripherals
Microcontroller has
· The fixed amount of on-chip ROM, RAM, and number of I/O ports makes them ideal
for many applications in which cost and space are critical
· In many applications, the space it takes, the power it consumes, and the price per
unit are much more critical considerations than the computing power
An embedded product uses a microprocessor (or microcontroller) to do one task and one
task only. There is only one application software that is typically burned into ROM
A PC, in contrast with the embedded system, can be used for any number of applications:
· It has RAM memory and an operating system that loads a variety of applications into
RAM and lets the CPU run them
· A PC contains or is connected to various embedded products. Each one peripheral has
a microcontroller inside it that performs only one task.
Embedded Microcontrollers:
General-purpose microprocessors have targeted their microprocessor for the high end of the
embedded market whenever a microcontroller is inadequate for the task. When a company
targets a general purpose microprocessor for the embedded market, it optimizes the
processor used for embedded systems. Very often the terms embedded processor and
microcontroller are used interchangeably.
Choosing a Microcontroller:
In market microcontroller are available with different sizes.
Ex:
Popular 8-bit microcontrollers are
· Motorola’s 6811
· Intel’s 8051
· Zilog’s Z8
· Microchip’s PIC
There are also 16-bit and 32-bit microcontrollers made by various chip makers.
Intel introduced 8051, referred as MCS-51, in 1981. The 8051 is an 8-bit processor. The
CPU can work on only 8 bits of data at a time.
Aarchitecture of 8051
The microcontroller has CPU, ROM, Interrupt control circuit, internal timing devices (timers
T0, T1), serial interface (SI), RAM and special function registers (SFRs). It has four ports P0,
P1, P2 and P3.
The above figure shows the usual CPU components: program counter, ALU, working
registers, and clock circuits.
The 8051 architecture consists of these specific features:
· Eight-bit CPU with registers A (the accumulator) and B
· Sixteen-bit program counter (PC) and data pointer (DPTR). DPTR register is made
up of two 8-bit registers, named DPH and DPL, that are used to furnish memory
addresses for internal and external code access and external data access.
· Eight-bit program status word (PSW)
· Eight-bit stack pointer (SP)
· Internal ROM or EPROM of 0 to 4K.
· Internal RAM of 128 bytes:
· Four register banks, each containing eight registers
· Sixteen bytes, which may be addressed at the bit level Eighty bytes of general
purpose data memory
· Thirty-two input/output pins arranged as four 8-bit ports: P0-P3
· Two 16-bit timer/counters: TO and T1
· Full duplex serial data receiver/transmitter: SBUF
· Control registers: TCON, TMOD, SCON, PCON, IP, and IE
· Two external and three internal interrupt sources
· Oscillator and clock circuits
The programming model of the 8051 shows the collection of 8- and 16-bit registers and 8-
bit memory locations. These registers and memory locations can be made to operate using
the software instructions that are incorporated as part of the design. The program
instructions have to do with the control of the registers and digital data paths that are
physically contained inside the 8051, as well as memory locations that are physically
located outside the 8051.
Register Banks: 00h to 1Fh. The 8051 uses 8 general-purpose registers R0 through R7
(R0, R1, R2, R3, R4, R5, R6, and R7). There are four such register banks. Selection of
register bank can be done through RS1,RS0 bits of PSW. On reset, the default Register Bank
0 will be selected.
Bit Addressable RAM: 20h to 2Fh . The 8051 supports a special feature which allows
access to bit variables. This is where individual memory bits in Internal RAM can be set or
cleared. In all there are 128 bits numbered 00h to 7Fh. Being bit variables any one variable
can have a value 0 or 1. A bit variable can be set with a command such as SETB and cleared
with a command such as CLR. The Bit Addressable area of the RAM is just 16 bytes of
Internal RAM located between 20h and 2Fh.
General Purpose RAM: 30h to 7Fh. Even if 80 bytes of Internal RAM memory are
available for general-purpose data storage, user should take care while using the memory
location from 00 -2Fh since these locations are also the default register space, stack space,
and bit addressable space. It is a good practice to use general purpose memory from 30 –
7Fh. The general purpose RAM can be accessed using direct or indirect addressing modes
Stack Memory:
The stack is a section of RAM used by the CPU to store information temporarily. This
information could be data or an address. The register used to access the stack is called the
SP (stack pointer) register. The stack pointer in the 8051 is only 8 bit wide, which means
that it can take value of 00 to FFH. Special instructions are used to access stack memory Stack
pointer register is used to hold the internal RAM called “top of the stack”. Address in the SP
is location to which data is stored last SP increments before storing the data SP decrements
after retrieving the data.
SFR: Special Function Registers
• SFR are addressed by 80h to FFh. Not all addresses are used.
• Some SFR are bit addressable.
• SFR are used in opcodes by specifying its functional name
Internal ROM:
Program code, is stored in an internal ROM, and occupies code address space OOOOh to
OFFFh. The PC is ordinarily used to address program code bytes from addresses OOOOh to
FFFFh . Program addresses higher than OFFFh, which exceed the internal ROM capacity, will
cause the 8051 to automatically fetch code bytes from external program memory. Code bytes
can also be fetched exclusively from an external memory, addresses OOOOh to FFFFh, by
connecting the external access pin ( pin 31 on the DIP) to ground. The PC does not care
where the code is; the circuit designer decides whether the code is found totally in internal
ROM, totally in external ROM, or in a combination of internal and external ROM.
Data Reception
• Data byte will be received in SBUF if Receive enable bit(REN) is set
• RI is cleared in Mode 0
• When RI=1, data Reception is completed
• RI= 0 for Mode 0 prevents the reception of new data until the program has dealt with
old data is being received
• MODE 1/2/3: when RI= 1 data reception can start
• RI Should be cleared before the last bit reception
Serial MODE 0
• SCON: SM1 and SM0 should have 00
• SBUF: holds Received byte or a byte to be transmitted through RXD
• Used for high speed serial data-collection method using discrete logic
to achieve high data rates
Serial Data Mode 1—Standard UART
• SMO and SMI are set to 01b,
• SBUF becomes a 10-bit full-duplex receiver/transmitter
• RXD receives all data and TXD transmits ail data.
• Transmitted data: start bit, eight data bits (Least Significant Bit, LSB, first), and a stop bit.
• TI is set when all ten bits have been sent.
• Each bit interval is the inverse of the baud rate frequency,
• Each bit is maintained high or low over that interval.
• Reception is triggered by the falling edge of the start bit and continues if the stop bit is true (0 level) halfway
through the start bit interval.
Serial Data Mode 2—Multiprocessor Mode
• Mode 2 is similar to mode 1 except 11 bits are transmitted: a start bit, nine data
bits, and a stop bit
• The ninth data bit is gotten from bit TB8 in SCON during transmit and stored in bit
RB8 of SCON when data is received. Both the start and
stop bits are discarded.
• The baud rate is much higher than standard communication rates. This high data
rate is needed in many multi-processor applications
• Mode 3 is identical to mode 2 except that the baud rate is determined exactly as
in mode 1, using Timer 1 to generate communication frequencies.
Interrupts
• A computer program has only two ways to determine the conditions
that exist in internal and external circuits.
• One method uses software instructions that jump on the states of
flags and port pins.
• The second responds to hardware signals, called interrupts, that force
the program to call a sub-routine.
• Software techniques use up processor time that could be devoted to
other tasks; interrupts take processor time only when action by the
program is needed.