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Or Gate - Wikipedia

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OR gate

Input Output

A B A OR B

0 0 0

0 1 1

1 0 1

1 1 1

The OR gate is a digit al logic gat e t hat implement s logical disjunct ion (∨) from mat hemat ical
logic – it behaves according t o t he t rut h t able above. A HIGH out put (1) result s if one or bot h
t he input s t o t he gat e are HIGH (1). If neit her input is high, a LOW out put (0) result s. In anot her
sense, t he funct ion of OR effect ively finds t he maximum bet ween t wo binary digit s, just as t he
complement ary AND funct ion finds t he minimum.[1]

Symbols

There are t wo symbols of OR gat es: t he American (ANSI or 'milit ary') symbol and t he IEC
('European' or 'rect angular') symbol, as well as t he deprecat ed DIN symbol.[2][3] For more
informat ion see Logic Gat e Symbols.
MIL/ANSI Symbol IEC Symbol DIN Symbol

Hardware description and pinout

This schematic diagram shows the arrangement of four OR gates within a standard 4071 CMOS integrated circuit.

OR gat es are basic logic gat es, and are available in TTL and CMOS ICs logic families. The
st andard 4000 series CMOS IC is t he 4071, which includes four independent t wo-input OR gat es.
The TTL device is t he 7432. There are many offshoot s of t he original 7432 OR gat e, all having
t he same pinout but different int ernal archit ect ure, allowing t hem t o operat e in different volt age
ranges and/or at higher speeds. In addit ion t o t he st andard 2-input OR gat e, 3- and 4-input OR
gat es are also available. In t he CMOS series, t hese are:

4075: t riple 3-input OR gat e

4072: dual 4-input OR gat e

Variat ions include:

74LS32: quad 2-input OR gat e (low power Schot t ky version)


74HC32: quad 2-input OR gat e (high speed CMOS version) - has lower current
consumpt ion/wider volt age range

74AC32: quad 2-input OR gat e (advanced CMOS version) - similar t o 74HC32, but wit h
significant ly fast er swit ching speeds and st ronger drive

74LVC32: low volt age CMOS version of t he same.

Implementations

CMOS OR gate NMOS OR gate BJT OR gate

OR gate using diodes

Analytical representation

is t he analyt ical represent at ion of OR gat e:


Alternatives

If no specific OR gat es are available, one can be made from NAND or NOR gat es in t he
configurat ion shown in t he image below. Any logic gat e can be made from a combinat ion of
NAND or NOR gat es.

Desired gate NAND construction NOR construction

Wired-OR

Wired OR gate using open-collector NOR gates

Wit h act ive low open collect or logic out put s, as used for cont rol signals in many circuit s, an OR
funct ion can be produced by wiring t oget her several out put s. This arrangement is called a wired
OR. This implement at ion of an OR funct ion t ypically is also found in int egrat ed circuit s of N or P-
t ype only t ransist or processes.

See also
Wikimedia Commons has media relat ed t o OR gates.

AND gat e

NOT gat e

NAND gat e

NOR gat e

XOR gat e

XNOR gat e

Boolean algebra

Logic gat e

References

1. "OR Gate" (http://hyperphysics.phy-astr.gsu.edu/hbase/electronic/or.html) . Hyperphysics.phy-


astr.gsu.edu. Retrieved 2012-09-24.

2. Harris, David Harris, Sarah (2007). Digital design and computer architecture (1st ed.). San
Francisco,Calif.: Morgan Kaufmann. p. 21. ISBN 9780123704979.

3. Brumbach, Michael E. Industrial electricity (8th ed.). Clifton Park, N.Y.: Delmar. p. 546.
ISBN 9781435483743.

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Last edited 8 months ago by Mechachleopteryx

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