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Answer: A: Department of Information Technology UNIT-II-CAO-MCQ B.Tech 4 SEM

This document contains a multiple choice quiz with 20 questions about computer architecture and organization. It covers topics like bus structures, I/O interfaces, registers, memory, control signals, and interrupts. The questions test understanding of concepts like how devices connect to buses, the role of registers like the program counter and memory address register, and how control is implemented through microprograms or hardwired logic. It is a practice exam for a 4th semester BTech course on computer architecture and organization.

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Vaish
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110 views

Answer: A: Department of Information Technology UNIT-II-CAO-MCQ B.Tech 4 SEM

This document contains a multiple choice quiz with 20 questions about computer architecture and organization. It covers topics like bus structures, I/O interfaces, registers, memory, control signals, and interrupts. The questions test understanding of concepts like how devices connect to buses, the role of registers like the program counter and memory address register, and how control is implemented through microprograms or hardwired logic. It is a practice exam for a 4th semester BTech course on computer architecture and organization.

Uploaded by

Vaish
Copyright
© © All Rights Reserved
Available Formats
Download as PDF, TXT or read online on Scribd
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Department of Information Technology UNIT-II-CAO-MCQ B.

TECH 4th SEM

1. ______ bus structure is usually used to connect I/O devices.


a) Single bus
b) Multiple bus
c) Star bus
d) Ram bus
Answer: a
Explanation: BUS is a bunch of wires which carry address, control signals and data. It is used
to connect various components of the computer.

2. The I/O interface required to connect the I/O device to the bus consists of ______
a) Address decoder and registers
b) Control circuits
c) Address decoder, registers and Control circuits
d) Only Control circuits
Answer: c
Explanation: The I/O devices are connected to the CPU via BUS and to interact with the BUS
they have an interface.

3. MFC stands for ___________


a) Memory Format Caches
b) Memory Function Complete
c) Memory Find Command
d) Mass Format Command
Answer: b
Explanation: This is a system command enabled when a memory function is completed by a
process.

4. The decoded instruction is stored in ______


a) IR
b) PC
c) Registers
d) MDR
Answer: a
Explanation: The instruction after obtained from the PC, is decoded and operands are fetched
and stored in the IR.

5. The instruction -> Add LOCA, R0 does _______


a) Adds the value of LOCA to R0 and stores in the temp register
b) Adds the value of R0 to the address of LOCA
c) Adds the values of both LOCA and R0 and stores it in R0
d) Adds the value of LOCA with a value in accumulator and stores it in R0
Answer: c

DR. HEENA F. ANSARI


Department of Information Technology UNIT-II-CAO-MCQ B.TECH 4th SEM

6. Which registers can interact with the secondary storage?


a) MAR
b) PC
c) IR
d) R0
Answer: a
Explanation: MAR can interact with secondary storage in order to fetch data from it.

7. During the execution of a program which gets initialized first?


a) MDR
b) IR
c) PC
d) MAR
Answer: c
Explanation: For the execution of a process first the instruction is placed in the PC.

8. Which of the register/s of the processor is/are connected to Memory Bus?


a) PC
b) MAR
c) IR
d) Both PC and MAR
Answer: b
Explanation: MAR is connected to the memory BUS in order to access the memory.

9. ______ is used to choose between incrementing the PC or performing ALU operations.


a) Conditional codes
b) Multiplexer
c) Control unit
d) None of the mentioned
Answer: b
Explanation: The multiplexer circuit is used to choose between the two as it can give
different results based on the input.

10. The registers, ALU and the interconnection between them are collectively called as _____
a) process route
b) information trail
c) information path
d) data path
Answer: d
Explanation: The Operational and processing part of the CPU are collectively called as a data
path.

DR. HEENA F. ANSARI


Department of Information Technology UNIT-II-CAO-MCQ B.TECH 4th SEM

11. Micro-program consists of a set of microinstructions which are strings of 0s and 1s.
a) True
b) False
Answer: a
Explanation: The computer understands only binary language. So, the micro-program should
have instructions which are in the form of 0s and 1s. Each output line of the micro-program
corresponds to one control signal.

12. ________ are the different type/s of generating control signals.


a) Micro-programmed
b) Hardwired
c) Micro-instruction
d) Both Micro-programmed and Hardwired
Answer: d
Explanation: The above is used to generate control signals in different types of system
architectures.

13. The type of control signal is generated based on ________


a) contents of the step counter
b) Contents of IR
c) Contents of condition flags
d) All of the mentioned
Answer: d
Explanation: Based on the information above the type of control signal is decided.

14. Which of the following is used to choose between incrementing the PC or performing
ALU operations?
a) Conditional Units
b) Multiplexer
c) Control Codes
d) Memory bus
Answer : b
Explanation: The multiplexer circuit is used to choose between the two as it can give
different results based on the input.

15. The interrupt-request line is a part of the ___________


a) Data line
b) Control line
c) Address line
d) None of the mentioned
Answer: b

DR. HEENA F. ANSARI


Department of Information Technology UNIT-II-CAO-MCQ B.TECH 4th SEM

Explanation: The Interrupt-request line is a control line along which the device is allowed to
send the interrupt signal.

16. The usual BUS structure used to connect the I/O devices is ___________
a) Star BUS structure
b) Multiple BUS structure
c) Single BUS structure
d) Node to Node BUS structure
Answer: c
Explanation: BUS is a collection of address, control and data lines used to connect the
various devices of the computer.

17. Which of the following is independent of the address bus?


a) Secondary memory
b) Main memory
c) Onboard memory
d) Cache memory
Answer: a
Explanation: The secondary memory is independent of the address bus. It increases the
storage space. It is implemented in the form of magnetic storage devices.

18. _________is used to control the access, processing and information transferring.
a) Control Bus
b) Address Bus
c) Data bus
d) Program counter
Answer: a

19. Interrupt signal s used to suspends execution of the current program being executed and
saves its context.
a) True
b) False
Answer: a

20. _________ decodes the instruction before execution.


a) Instruction Decoder
b) Instruction Register
c) Memory Address Register
d) Memory Buffer Register
Answer: a

DR. HEENA F. ANSARI

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