Introduction To PIC Microcontroller: Embedded System Design

8/9/2016
ĐẠI HỌC QUỐC GIA TP.HỒ CHÍ MINH

TRƯỜNG ĐẠI HỌC BÁCH KHOA
KHOA ĐIỆN-ĐIỆN TỬ
BỘ MÔN KỸ THUẬT ĐIỆN TỬ
Embedded System Design

Chapter 3: Microcontroller
1. Introduction to PIC microcontroller

2. PIC16F84
3. PIC16F877
4. Apply PIC microcontroller for embedded systems
1. Introduction to PIC microcontroller
• PIC is a family of modified Harvard architecture microcontrollers
made by Microchip Technology
• The PIC1650 was originally developed by General Instruments
• The name PIC initially referred to "Peripheral Interface
Controller"
Bộ môn Kỹ Thuật Điện Tử - ĐHBK Chapter 3 2
1
8/9/2016
Why is PIC popular?
• PICs are popular with developers due to
– low cost
– wide availability
– large user base
– extensive collection of application notes
– availability of low cost or free development tools
– serial programming capability
PIC18F4XK20 Starter Kit

•128x64 Organic LED Display (SPI)
• 32.768 kHz External Oscillator (Timer1)
• Analog input filtering and gain control into
RE1
• PWM output filtering from RC2
• 4 push buttons for user interfacing
PIC microcontroller
• Comparison of PIC families
● Complete portfolio: 6 to 100 pins, 384B to 512KB of program memory, up to

80MHz
● Upward compatible architectures to preserve investment in code development
● Pin compatibility in multiple packages facilitates drop-in replacement
● Range of memory technologies: Self Programming Flash, OTP, ROM
● Easy Migration across 8, 16, and 32-bit families
2
8/9/2016
PIC Microcontroller
Some members of PIC16 Series
3
8/9/2016
Some members of PIC16 Series
PIC speed
• Can use crystal, clock oscillator, or even an RC circuit
• Some PICs have a built‐in 4MHz RC clock, not very accurate,
but requires no external components
• Instruction speed = ¼ clock speed
– 12C50x 4MHz
– 12C67x 10MHz
– 16Cxxx 20MHz
– 17C4x/17C7xxx 33MHz
– 18Cxxx 40MHz
4
8/9/2016
PIC Clock
Three ways to
provide the
clock signal
to a PIC
PIC’s program memory
• PICs have two difference types of program
storage:
– EPROM (Erasable Programmable ROM)
• need high voltage from programmer to program (~13V)
• need windowed chips and UV light to erase
• PIC examples: any ‘C’ part 12C50x, 17C7xx,…
– FLASH
• rewriteable
• much faster to develop on
• PIC examples: any ‘F’ part 16F84, 16F87x, 18Fxxx
5
8/9/2016
PIC16 Series
http://tme.com.vn
2. The Microchip PIC16F84
• The Microchip PIC16F84 is a low‐cost,
single‐chip, 8‐bit microcontroller.
– Only 35 single word instructions
– All instructions single‐cycle except for
program branches which are two‐cycle
– Operating speed: DC ‐ 20 MHz clock
input
– DC ‐ 200 ns instruction cycle
– 1024 words of program memory
– 68 bytes of Data RAM
– 64 bytes of Data EEPROM
– 14‐bit wide instruction words
– 8‐bit wide data bytes
6
8/9/2016
The PIC 16F84A pin connection diagram
PIC16C8X PINOUT DESCRIPTION
7
8/9/2016
PIC16C8X PINOUT DESCRIPTION ..
Architecture of the PIC16F84
Buses: Communication lines for transferring data within the
processor.
Oscillator: Used to drive the microprocessor, clocking data and
instructions in the processor.
Timing: The PIC has an internal divide by 4 whereby 4 oscillator
pulses form one clock pulse. This makes instruction times easy to
calculate.
– Most instructions (except calls and returns and other instructions
involving jumps and branches) take one clock cycle, so with a 4MHz
oscillator (divided by 4), instructions take 1s.
8
8/9/2016
Architecture of the PIC16F84
W Register
9
8/9/2016
The 16F84A Status register
The PIC16F84 Status register
10
8/9/2016
16F84A memory features
PIC16F84 Memory
There are two memory blocks in the PIC16C84;
program memory and data memory.
• Each block has its own bus, so that access to each can occur
during the same clock cycle.
• The data memory can be further broken down into general
purpose memory and special purpose registers
11
8/9/2016
PIC16F84 Program Memory
Pointed to by reset vector 0x00

0x01
0x02
0x03
Pointed to by interrupt vector 0x04
0x3FF
PIC16F84 Data Memory
0x00 Ind. address.
0x01 TMR0
0x02 PCL Special-purpose
0x03 STATUS registers
0x04 FSR Indirect pointer
(This is a simplified memory map 0x05 PORTA data PORT A
0x06 PORTB data PORT B
that excludes bank1.
0x07 Not used
Study the memory banks
0x08 EEPROM prog.
in the Microchip data sheets).
0x09 “
0x0A PCLATH Program counter
0x0B INTCON Interrupt control
0x0C .. \:
.. \
.. | General-purpose
| file registers.
.. /
.. /
12
8/9/2016
PIC16F84 Register‐Mapped I/O
• PORTA and PORTB can be programmed 0x00 Ind. address.
0x01 TMR0
as an input or an output. 0x02 PCL Special-purpose
• PORTA is 5 bits wide and PORTB is 8 0x03 STATUS registers
0x04 FSR Indirect pointer
bits wide. (Bit 4 of port A can be used for an 0x05 PORTA data PORT A
external timer input.) 0x06 PORTB data PORT B
• PORTA has pins/bits labelled RA4:RA0 0x07 Not used
0x08 EEPROM prog.
• PORTB has pins/bits labelled RB7:RB0
0x09 “
• Referencing bits …. Bits are numbered 0x0A PCLATH Program counter
0x0B INTCON Interrupt control
7‐0 from left to right, i.e., msb‐lsb. 0x0C .. \:
.. \
• One of the most common .. | General-purpose
| file registers.
programming errors is incorrect .. /
.. /
specification of bit numbers.
PIC16F84A CONFIGURATION WORD
• bit 13‐4 CP: Code Protection bit
– 1 = Code protection disabled
– 0 = All program memory is code protected
• bit 3 PWRTE: Power‐up Timer Enable bit
– 1 = Power‐up Timer is disabled
– 0 = Power‐up Timer is enabled
• bit 2 WDTE: Watchdog Timer Enable bit
– 1 = WDT enabled
– 0 = WDT disabled
• bit 1‐0 FOSC1:FOSC0: Oscillator Selection bits
– 11 = RC oscillator (Resistor/capacitor)
– 10 = HS oscillator (High Speed Crystal/Resonator)
– 01 = XT oscillator (Crystal/Resonator)
– 00 = LP oscillator (Low Power Crystal)
13
8/9/2016
OPTION REGISTER (ADDRESS 81h)
• bit 7 RBPU: PORTB Pull‐up Enable bit
– 1 = PORTB pull‐ups are disabled
– 0 = PORTB pull‐ups are enabled by individual port latch values
• bit 6 INTEDG: Interrupt Edge Select bit
– 1 = Interrupt on rising edge of RB0/INT pin
– 0 = Interrupt on falling edge of RB0/INT pin
• bit 5 T0CS: TMR0 Clock Source Select bit bit 2-0 PS2:PS0: Prescaler
– 1 = Transition on RA4/T0CKI pin Rate Select bits
– 0 = Internal instruction cycle clock (CLKOUT)
• bit 4 T0SE: TMR0 Source Edge Select bit
– 1 = Increment on high‐to‐low transition on RA4/T0CKI pin
– 0 = Increment on low‐to‐high transition on RA4/T0CKI pin
• bit 3 PSA: Prescaler Assignment bit
– 1 = Prescaler is assigned to the WDT
– 0 = Prescaler is assigned to the Timer0 module
DIRECT/INDIRECT ADDRESSING
14
8/9/2016
DIRECT/INDIRECT ADDRESSING
• A simple program to clear RAM locations 20h‐2Fh using
indirect addressing
movlw 0x20 ;initialize pointer
movwf FSR ;to RAM
NEXT clrf INDF ;clear INDF register
incf FSR ;inc pointer
btfss FSR,4 ;all done?
goto NEXT ;NO, clear next
CONTINUE
: ;YES, continue
• An effective 9‐bit address is obtained by concatenating the 8‐
bit FSR register and the IRP bit (STATUS<7>)
• However, IRP is not used in the PIC16F84A.
EEPROM Data Memory
• EEPROM data memory
– readable and writable during normal operation
– indirectly addressed through the Special Function
Register (SFR)
• SRFs are:
– EECON1
– EECON2
– EEDATA
– EEADR
15
8/9/2016
EECON1 Register (Adr. 88h)
• bit 7‐5 Unimplemented: Read as '0'
• bit 4 EEIF: EEPROM Write Operation Interrupt Flag bit
– 1 = The write operation completed (must be cleared in software)
– 0 = The write operation is not complete or has not been started
• bit 3 WRERR: EEPROM Error Flag bit
– 1 = A write operation is prematurely terminated (any MCLR Reset or any WDT Reset during normal operation)
– 0 = The write operation completed
• bit 2 WREN: EEPROM Write Enable bit
– 1 = Allows write cycles
– 0 = Inhibits write to the EEPROM
• bit 1 WR: Write Control bit
– 1 = Initiates a write cycle. The bit is cleared by hardware once write is complete. The WR bit can only be set
(not cleared) in software.
– 0 = Write cycle to the EEPROM is complete
• bit 0 RD: Read Control bit
– 1 = Initiates an EEPROM read RD is cleared in hardware. The RD bit can only be set (not cleared) in software.
– 0 = Does not initiate an EEPROM read
Reading The EEPROM Data Memory
• Reading the EEPROM data memory
– write the address to the EEADR register
– set control bit RD
– the data is available, in the next cycle, in the EEDATA
register
BCF STATUS, RP0 ; Bank 0

MOVLW CONFIG_ADDR ;
MOVWF EEADR ; Address to read
BSF STATUS, RP0 ; Bank 1
BSF EECON1, RD ; EE Read
BCF STATUS, RP0 ; Bank 0
MOVF EEDATA, W ; W = EEDATA
16
8/9/2016
Writing to the EEPROM Data Memory
• Writing to the EEPROM data memory
– write the address to the EEADR register and data to the
EEDATA register
– follow a specific sequence to initiate the write for each byte
BSF STATUS, RP0 ; Bank 1

BCF INTCON, GIE ; Disable INTs.
BSF EECON1, WREN ; Enable Write
MOVLW 55h ;
MOVWF EECON2 ; Write 55h
MOVLW AAh ; Requirement
MOVWF EECON2 ; Write AAh
BSF EECON1,WR ; Set WR bit
; begin write
BSF INTCON, GIE ; Enable INTs.
I/O Port
• PORT A:
– 5‐bit wide, bi‐direction port
– Corresponding data direction register is TRISA
(TRISA bit = 1: input; TRISA bit = 0: output)
– On a Power‐on Reset, PORTA pins are configured
as inputs and read as ‘0’
• PORT B:
– 8‐bit wide, bi‐direction port
– Corresponding data direction register is TRISB
– RB7:RB4, have an interrupt‐on‐change feature
17
8/9/2016
I/O Port
• Initializing Port A • Initializing Port B
BCF STATUS, RP0 ; BCF STATUS, RP0 ;
CLRF PORTA ; Initialize PORTA by CLRF PORTB ; Initialize PORTB by
; clearing output ; clearing output
; data latches
; data latches BSF STATUS, RP0 ; Select Bank 1
BSF STATUS, RP0 ; Select Bank 1 MOVLW 0xCF ; Value used to
MOVLW 0x0F ; Value used to ; initialize data
; initialize data ; direction
; direction MOVWF TRISB ; Set RB<3:0> as inputs
; RB<5:4> as outputs
MOVWF TRISA ; Set RA<3:0> as inputs ; RB<7:6> as inputs
; RA4 as output
; TRISA<7:5> are always
; read as ’0’.
Assignments
1. What are 8‐bit and 16‐bit families of PIC microcontrollers?
2. What is maximum frequency of clock input for the PIC16F84A?
3. How many word of program memory are physically implemented in
PIC16F84A?
4. What is the maximum memory space the PIC16F84A can address?
5. What is the address of the PORT A?
6. What is the address of the Status Register?
7. How to set all bits of Port A as outputs?
8. How many program calls and interrupts can the stack handle?
9. How many bytes are there for EEPROM of the PIC16F84A?
10. Show how to read the EEPROM data memory for PIC16F84A?
11. Show how to write the EEPROM data memory for PIC16F84A?
12. Show how to perform write verification for PIC16F84A?
18
8/9/2016
Assignments
1. Design a PIC16F84 schematic in which
– Port A is input, connected with 4 buttons
– Port B is output, connected with 4 LEDs
Write a program to control 4 LEDs by 4 buttons
2. Design a PIC16F84 schematic in which
– PIC16F84 interfaces with ADC0808 and 4‐digit 7‐segment LED through Port B
– RA0 and RA1 are to select digits of 7‐segment LED
– RA2 is to control START signal of ADC0808
– RA3 is to control OE signal of ADC0808
3. The PIC16F87x
• PIC16F873/ 874/ 876/ 877
– 35 single word instructions
– Operating speed
• DC – 20MHz clock input
• DC – 200ns instruction cycle
– Timer: timer0/timer1/timer2
– 2 Capturer, Compare, PWM
modules
– 10‐bit multi‐channel ADC
– SSP with SPI and I2C
– USART
19
8/9/2016
3 The PIC16F87x
PIC16F87x
Block diagram
20
8/9/2016
The program memory map and stack
PIC16F877/876 PIC16F874/873
Data memory Organization
• Data memory:
– partitioned into multiple banks which contain the General Registers and
the Special Function Register
– Bits RP1 (STATUS<6>) and RP0 (STATUS<5>) are the bank select bits
• Each bank extends up to 7Fh (128 bytes).
– The lower locations of each bank are reserved for the Special Function
Registers.
– Above the Special Function Registers are General Purpose Registers
21
8/9/2016
General Purpose Register File (1)
General Purpose Register File (2)
22
8/9/2016
Special Function Registers (1)
Reference: 16F87X datasheet
Special Function Registers (2)
23
8/9/2016
PCL and PCLATH
• The program counter (PC) is 13‐
bits wide.
• The low byte comes from the PCL
register, which is a readable and
writable register.
• The upper bits (PC<12:8>) are not
readable, but are indirectly
writable through the PCLATH
register.
• On any RESET, the upper bits of
the PC will be cleared. Loading of PC in different situations:
• how the PC is loaded on a write to PCL
(PCLATH<4:0> → PCH).
• how the PC is loaded during a CALL or
GOTO instruction (PCLATH<4:3> →PCH)
Stack
• The PIC16F87X family has an 8‐level deep x 13‐bit wide
hardware stack.
• The stack space is not part of either program or data space
and the stack pointer is not readable or writable.
• The PC is PUSHed onto the stack when a CALL instruction is
executed, or an interrupt causes a branch.
• The stack is POPed in the event of a RETURN,RETLW or a
RETFIE instruction execution.
• PCLATH is not affected by a PUSH or POP operation.
24
8/9/2016
Program Memory Paging (1)
• All PIC16F87X devices are capable of addressing a continuous
8K word block of program memory.
• The CALL and GOTO instructions provide only 11 bits of address
to allow branching within any 2K program memory page.
• When doing a CALL or GOTO instruction, the upper 2 bits of the
address are provided by PCLATH<4:3>.
• When doing a CALL or GOTO instruction, the user must ensure
that the page select bits are programmed so that the desired
program memory page is addressed.
• If a return from a CALL instruction (or interrupt) is executed, the
entire 13‐bit PC is popped off the stack.
• The contents of the PCLATH register are unchanged after a
RETURN or RETFIE instruction
Program Memory Paging (2)
• Example:
– call of a subroutine in page 1 from page 0
– assumes that PCLATH is saved and restored by the Interrupt Service
Routine (if interrupts are used).
ORG 0x500
BCF PCLATH,4
BSF PCLATH,3 ;Select page 1 (800h‐FFFh)
CALL SUB1_P1 ;Call subroutine in page 1 (800h‐FFFh)
:
ORG 0x900 ;page 1 (800h‐FFFh)
SUB1_P1
: ;called subroutine page 1 (800h‐FFFh)
:
RETURN ;return to Call subroutine
;in page 0 (000h‐7FFh)
25
8/9/2016
Indirect Addressing (1)
• Indirect addressing is possible by using the INDF register.
• Any instruction using the INDF register actually accesses the
register pointed to by the File Select Register, FSR.
• Reading the INDF register itself, indirectly (FSR = ’0’) will read
00h.
• Writing to the INDF register indirectly results in a no operation
(although status bits may be affected).
• An effective 9‐bit address is obtained by concatenating the 8‐
bit FSR register and the IRP bit (STATUS<7>),
26
8/9/2016
• A simple program to clear RAM locations 20h‐2Fh using
indirect addressing
MOVLW 0x20 ;initialize pointer
MOVWF FSR ;to RAM
NEXT CLRF INDF ;clear INDF register
FSR,F ;inc pointer
BTFSS FSR,4 ;all done?
GOTO NEXT ;no clear next
CONTINUE
: ;yes continue
IO Ports
Port A Port B Port C Port D Port E
Support 16F87X 16F87X 16F87X PIC16F874 PIC16F874
/877 /877
Width 6‐bit 8‐bit 8‐bit 8‐bit 3‐bit
Direction Bi‐directional Bi‐directional Bi‐directional Bi‐directional Bi‐directional
Direction TRISA TRISB TRISC TRISD TRISE
register
Buffer TTL buffer / TTL buffer / Schmitt Schmitt Schmitt
Schmitt Schmitt trigger trigger trigger
trigger trigger
Multiplexed Analog input Serial USART, PWM, Parallel slave Analog input
with Programming I2C, SPI port
27
8/9/2016
Port A Functions
Port B Functions
28
8/9/2016
Port C Functions
Port D Functions
29
8/9/2016
Port E Functions
Initializing IO Ports
• Example: initializing Port A
BCF STATUS, RP0 ;
BCF STATUS, RP1 ; Bank0
CLRF PORTA ; Initialize PORTA by
; clearing output
; data latches
BSF STATUS, RP0 ; Select Bank 1
MOVLW 0x06 ; Configure all pins
MOVWF ADCON1 ; as digital inputs
MOVLW 0xCF ; Value used to
; initialize data
; direction
MOVWF TRISA ; Set RA<3:0> as inputs
; RA<5:4> as outputs
; TRISA<7:6>are always
; read as ’0’.
30
8/9/2016
PIC16CXXX Instruction Set (1)
PIC16CXXX Instruction Set (2)
31
8/9/2016
Class Assignment
1. What are main differences between PIC16F84 and
PIC16F87x?
2. What is the capacity of the FLASH memory of PIC16F877?
3. How many IO ports of PIC16F873 are there?
4. What are multiplexed with PORTC ?
5. How to initialize Port C as output of PIC16F877?
6. What is the address of TRISB?
7. Is PCLATCH affected by PUSH and POP operation?
• PIC microcontrollers provide basic required
hardware for an embedded system
– Processing unit
– Memory: Flash ROM, EEPROM
– Timer/interrupt
• Interface:
– Parallel I/O
– ADC
– PWM
– Serial communication: UART, SPI, I2C
32
8/9/2016
• A simple security system using PIC microcontroller
PIC Applications
 LED Flasher
Loop:
bsf PORTB, 0
call Delay_500ms
bcf PORTB, 0
call Delay_500ms
goto Loop
33
8/9/2016
PIC Applications
 Button Read
Movlw 0
movwf TRISD, f
bsf TRISD, 2
Loop:
btfsc PORTD, 2
goto light
goto No_light
Light:
bsf PORTB,0
goto Loop
No_light:
bcf PORTB,0
goto Loop
Group discussion
Discuss about how to apply PIC microcontroller to
your class project
34

Introduction To PIC Microcontroller: Embedded System Design

Uploaded by

Copyright:

Available Formats

Introduction To PIC Microcontroller: Embedded System Design

Uploaded by

Document Information

Original Description:

Original Title

Copyright

Available Formats

Share this document

Share or Embed Document

Sharing Options

Did you find this document useful?

Is this content inappropriate?

Copyright:

Available Formats

Introduction To PIC Microcontroller: Embedded System Design

Uploaded by

Copyright:

Available Formats

8/9/2016

ĐẠI HỌC QUỐC GIA TP.HỒ CHÍ MINH

Embedded System Design

1. Introduction to PIC microcontroller

Bộ môn Kỹ Thuật Điện Tử - ĐHBK Chapter 3 2

PIC18F4XK20 Starter Kit

Bộ môn Kỹ Thuật Điện Tử - ĐHBK Chapter 3 3

● Complete portfolio: 6 to 100 pins, 384B to 512KB of program memory, up to

Bộ môn Kỹ Thuật Điện Tử - ĐHBK Chapter 3 4

Bộ môn Kỹ Thuật Điện Tử - ĐHBK Chapter 3 5

Bộ môn Kỹ Thuật Điện Tử - ĐHBK Chapter 3 6

Bộ môn Kỹ Thuật Điện Tử - ĐHBK Chapter 3 7

Bộ môn Kỹ Thuật Điện Tử - ĐHBK Chapter 3 8

Bộ môn Kỹ Thuật Điện Tử - ĐHBK Chapter 3 9

Bộ môn Kỹ Thuật Điện Tử - ĐHBK Chapter 3 10

Bộ môn Kỹ Thuật Điện Tử - ĐHBK Chapter 3 12

Bộ môn Kỹ Thuật Điện Tử - ĐHBK Chapter 3 13

Bộ môn Kỹ Thuật Điện Tử - ĐHBK Chapter 3 14

Bộ môn Kỹ Thuật Điện Tử - ĐHBK Chapter 3 15

Bộ môn Kỹ Thuật Điện Tử - ĐHBK Chapter 3 17

Bộ môn Kỹ Thuật Điện Tử - ĐHBK Chapter 3 18

Bộ môn Kỹ Thuật Điện Tử - ĐHBK Chapter 3 19

Bộ môn Kỹ Thuật Điện Tử - ĐHBK Chapter 3 20

Bộ môn Kỹ Thuật Điện Tử - ĐHBK Chapter 3 21

Bộ môn Kỹ Thuật Điện Tử - ĐHBK Chapter 3 22

Pointed to by reset vector 0x00

Bộ môn Kỹ Thuật Điện Tử - ĐHBK Chapter 3 23

Bộ môn Kỹ Thuật Điện Tử - ĐHBK Chapter 3 24

Bộ môn Kỹ Thuật Điện Tử - ĐHBK Chapter 3 25

Bộ môn Kỹ Thuật Điện Tử - ĐHBK Chapter 3 26

Bộ môn Kỹ Thuật Điện Tử - ĐHBK Chapter 3 28

Bộ môn Kỹ Thuật Điện Tử - ĐHBK Chapter 3 29

Bộ môn Kỹ Thuật Điện Tử - ĐHBK Chapter 3 30

BCF STATUS, RP0 ; Bank 0

Bộ môn Kỹ Thuật Điện Tử - ĐHBK Chapter 3 32

BSF STATUS, RP0 ; Bank 1

Bộ môn Kỹ Thuật Điện Tử - ĐHBK Chapter 3 33

Bộ môn Kỹ Thuật Điện Tử - ĐHBK Chapter 3 35

Bộ môn Kỹ Thuật Điện Tử - ĐHBK Chapter 3 36

Bộ môn Kỹ Thuật Điện Tử - ĐHBK Chapter 3 37

Bộ môn Kỹ Thuật Điện Tử - ĐHBK Chapter 3 38

Bộ môn Kỹ Thuật Điện Tử - ĐHBK Chapter 3 39

Bộ môn Kỹ Thuật Điện Tử - ĐHBK Chapter 3 40

Bộ môn Kỹ Thuật Điện Tử - ĐHBK Chapter 3 41

Bộ môn Kỹ Thuật Điện Tử - ĐHBK Chapter 3 42

Bộ môn Kỹ Thuật Điện Tử - ĐHBK Chapter 3 43

Bộ môn Kỹ Thuật Điện Tử - ĐHBK Chapter 3 44

Bộ môn Kỹ Thuật Điện Tử - ĐHBK Chapter 3 45

Bộ môn Kỹ Thuật Điện Tử - ĐHBK Chapter 3 46

Bộ môn Kỹ Thuật Điện Tử - ĐHBK Chapter 3 48

Bộ môn Kỹ Thuật Điện Tử - ĐHBK Chapter 3 50

Bộ môn Kỹ Thuật Điện Tử - ĐHBK Chapter 3 51

Bộ môn Kỹ Thuật Điện Tử - ĐHBK Chapter 3 52

Bộ môn Kỹ Thuật Điện Tử - ĐHBK Chapter 3 53

Bộ môn Kỹ Thuật Điện Tử - ĐHBK Chapter 3 54

Bộ môn Kỹ Thuật Điện Tử - ĐHBK Chapter 3 55

Bộ môn Kỹ Thuật Điện Tử - ĐHBK Chapter 3 56

Bộ môn Kỹ Thuật Điện Tử - ĐHBK Chapter 3 57