722 IEEE TRANSACTIONS ON COMPONENTS, PACKAGING AND MANUFACTURING TECHNOLOGY, VOL. 1, NO.

5, MAY 2011

Differential Via Modeling Methodology

Lambert Simonovich, Member, IEEE, Eric Bogatin, Member, IEEE, and Yazi Cao, Member, IEEE

Abstract— This paper describes a novel method of modeling to some bandwidth. When run in a circuit simulator, they
the differential via on multilayered printed circuit boards (PCBs) predict a measureable performance of the structure and can
used in high-speed digital designs based on the analytical equa- be parameterized so that worst case min/max analysis can be
tions for characteristic impedance and effective dielectric con-
stant. In the absence of measured or electromagnetic simulated explored quickly.
data traditionally needed to extract these parameters, this method There are cases when quick analysis must be performed
can quickly and efficiently predict the behavior of the differential to gain an intuitive sense of system performance and assess
via holes on PCBs using a circuit simulator. design tradeoffs to guide the final implementation and detailed
Index Terms— Circuit modeling, circuit simulation, via mod- design analysis. Using traditional EM modeling tools can be a
eling. time-consuming exercise. They require a high degree of skill
and expertise to create a trustworthy model. Once completed,
I. I NTRODUCTION there is no way to sanitize the results to ensure it has been
built correctly.
P RESENT integrated circuit technology advancements are
facilitating data rates in excess of 10 Gb/s. Printed circuit
board (PCB) through hole via parasitics are becoming more of
Our recent papers [1], [2] have demonstrated that a simple
circuit model for a differential via transition, consisting of
two simple coupled transmission line circuit models, can be
a factor affecting bit error rate (BER) performance. Accurate
used to accurately describe a real differential via to very
via modeling for topology simulations are a must and often
high bandwidth. In both papers, the measured S-parameters
require sophisticated electromagnetic (EM) modeling tools.
were used to extract the effective dielectric constant (Dkeff )
Behavioral and circuit models are two generic types used
used to calculate the odd-mode impedance for the differential
to simulate high-speed serial links. S-parameters are called
via circuit model. Unfortunately, without EM-field solver or
behavioral models because they describe the behavior of the
measured S-parameter data, the effective dielectric constant,
structure with respect to incident waveforms from calibrated
which is key to producing an accurate circuit model, was
ports. Behavioral models extracted from EM-field solvers are
unattainable.
frequently described by the S-parameters.
This paper presents a novel equation-based methodology to
Measured S-parameter behavioral models extracted from
develop a simple circuit model of a defined differential via
physical structures are limited because they represent every-
structure. Analytically derived equations replace the need for
thing connected between the calibrated reference planes of the
measured data or EM-simulated results to extract parameters
vector network analyzer (VNA). In order to leave behind just
for characteristic impedance and effective dielectric constant
the S-parameter’s structure of interest, elaborate de-embedding
used in the model. Correlation to an EM-field solver and
and calibration schemes are needed to remove fixture effects
measured results are included to demonstrate the merits of
from the measurement. Even then, they only represent one
this new methodology.
sample of a given construction. It is impossible to perform
sensitivity analysis with a single behavior model. Their use- II. BACKGROUND
fulness lies in model development to help build, calibrate, and A twin-rod transmission line geometry as illustrated in
validate EM or circuit models. Fig. 1 is one of three cross-sectional geometries that have exact
A circuit model is a schematic representation of a physical equations for characteristic impedance. The other two geome-
structure. There can be more than one circuit that describes tries are coaxial and rod-over-plane. All three relationships
it. Each is capable of giving the same performance, up assume the dielectric material is homogeneous and completely
Manuscript received April 14, 2010; revised December 6, 2010; accepted
fills the space whenever there are electric fields.
December 16, 2010. Date of current version June 2, 2011. This work was The relationships between capacitance, loop inductance,
supported in part by Lamsim Enterprises Inc., Bogatin Enterprises LLC, and and impedance of twin-rod geometry are described by the
Agilent Electronic Engineering Software Electronic Design Automation by
supplying the software license to complete this work. Recommended for
following equations [3]:
publication by Associate Editor L.-T. Hwang upon evaluation of reviewers’ 7.06 E − 13
Ctwi n =     × Dk × Len (1)
comments.  2r 2
L. Simonovich is with Lamsim Enterprises Inc., Stittsville, ON K2S 0A6, ln 2r 1 + 1 − s
s
Canada (e-mail: lsimonovich@lamsimenterprises.com).
E. Bogatin is with Bogatin Enterprises LLC, Olathe, KS 66061 USA

 
s s 2
(e-mail: eric@bethesignal.com). Ltwi n = 10.16E − 9 × ln + − 1 × Len (2)
Y. Cao is with the Department of Electronics, Carleton University, Ottawa, 2r 2r
ON K1S 5B6, Canada (e-mail: yazi.cao@hotmail.com).
 
Color versions of one or more of the figures in this paper are available 120 s s 2
online at http://ieeexplore.ieee.org. Z di f f = √ × ln + −1 (3)
Digital Object Identifier 10.1109/TCPMT.2010.2103313 Dk 2r 2r
2156–3950/$26.00 © 2011 IEEE
SIMONOVICH et al.: DIFFERENTIAL VIA MODELING METHODOLOGY 723

Twin-rod Rod-over-plane Coax

D2
D1
t b
Dk
S h
r r
S w
h
W'

Len
Rod Image
Fig. 2. Elliptic (oval) coaxial transmission line structure.

r CL I NP
Fig. 1. Twin-rod, rod-over-plane, and coax structures. TL 143
Ze  Z via
Zo  Z via
L  via_Len
Ke  DKeff
where Ko  DKeff
Ae  0.0001
Ctwin capacitance between twin-rods [F]; Ao  0.0001
Zvia
Ltwin inductance between twin-rods [H];
Zdiff differential impedance of twin-rods [];
Dk dielectric constant of material; SCL IN
CL in 31
Sub st  “SSub1”
Len length of the rods; Dkeff W  8.3 mil
r radius of the rods; Zvia S  8.3 mil
L  131 mil
Stub CL I NP
s space between the rods. TL 144
Ze  Z via
Zo  Z via
When driven differentially, the EM fields create a virtual L  Stub_Len
Ke  DKeff
return plane at exactly one-half of the spacing between the S Ko  DKeff
Ae  0.0001
rods. Each rod therefore behaves like a single rod-over-plane Ao  0.0001
geometry.
The odd-mode capacitance is the capacitance of each rod Fig. 3. Agilent Advanced Design System (ADS) circuit based twin-rod via
to virtual return plane and is equal to twice the capacitance model.
between rods Ccoax capacitance [F];
Codd = 2 × Ctwi n. (4) Lcoax inductance [H];
Zo characteristic impedance [];
The odd-mode loop inductance is the inductance of each Dk dielectric constant;
rod to the virtual return plane and equal to one-half the loop Len length of the rods;
inductance between rods D1 diameter of the conductor;
Ltwi n D2 diameter of the shield.
Lodd = . (5)
2 An oval variation of a coaxial structure is a form of an
The odd-mode impedance of each rod is half of the dif- elliptic coaxial structure shown in Fig. 2. Gunston [4] derived
ferential impedance, and is equivalent to the rod-over-plane the relationships between capacitance, loop inductance, and
impedance impedance of elliptic coaxial geometries as
Z twi n
Z odd = . (6) 1.41E − 12
2 Celli p ∼
=    × Dk × Len (10)
+b
The coaxial transmission line geometry consists of a center ln Ww+t
conductor imbedded within dielectric material and surrounded   
W +b
by a continuous shield. Lelli p ∼
= 5.08E − 9 × ln × Len (11)
w+t
The relationships between capacitance, loop inductance, and   
60 W +b
impedance of coaxial geometries are [3] Zo ∼ = √ × ln (12)
Dk w+t
1.41E − 12
Ccoax =   Dk × Len (7)
ln D2
D1 where

  Cellip capacitance [F];

D2 Lellip inductance [H];
Lcoax = 5.08 E − 9 × ln × Len (8)
D1 Zo characteristic impedance [];
 
60 D2 Dk dielectric constant;
Zo = √ × ln (9) Len length of the rods;
Dk D1  
W  +b
w+t oval dimensions (Fig. 2).
where
724 IEEE TRANSACTIONS ON COMPONENTS, PACKAGING AND MANUFACTURING TECHNOLOGY, VOL. 1, NO. 5, MAY 2011

Lodd; Codd Lodd; Codd

resembles two coaxial transmission lines where the shield is
created by the oval anti-pads of the reference layers. The
thinner the dielectric between these layers, the more it behaves
like a coaxial structure from an electrostatic point of view. For
t PCB stackups with fewer copper layers and thick dielectric
between planes, the differential via behave more like a twin-
rod structure from an electrostatic perspective. When there
w W’ are many copper layers, the odd-mode via capacitance can
therefore be estimated using the following formula based on
the elliptical coaxial transmission line model (Fig. 2):
1.41E − 12
Cvi a = Celi p ∼
b
=    × Dkavg × Len. (13)
+b
ln Ww+t
From a magnetostatic point of view, the via structure
Dkavg behaves more like a twin-rod transmission line because the
Zvia Zvia magnetic field lines are not contained by a continuous shield
Fig. 4. EM field relationship illustration of twin-rod via model with oval
throughout the via length. For that reason, odd-mode via loop
anti-pads. The blue magnetic flux rings represent the odd-mode inductance, inductance can be estimated by the following equation:
while the red capacitors represent the electric field from via barrels to oval
 
anti-pads. Ltwi n s s 2
Lvi a = = 5.08E−9×ln + − 1 × Len.
2 2r 2r
III. C IRCUIT M ODEL (14)
A. Equivalent Circuit of Differential Via Knowing the odd-mode via inductance and capacitance, the
A simple twin-rod model for a differential via transition, odd-mode via impedance can be approximated by [7]
consisting of a uniform differential pair, can be used to 60
Z odd = Z vi a ∼=√
describe a differential via using simple coupled transmission Dkavg

lines as illustrated in Fig. 3. When driven differentially, the 
    
 s s 2 W +b
odd-mode parameters are of major importance and the even- 
× ln + − 1 × ln (15)
mode parameters have no impact on differential performance. 2r 2r w+t
For modeling convenience, the odd- and even-mode para-
meters were set to the same values. As a result, the odd- where
mode characteristic impedance (Zodd) equals the even-mode Lvia odd-mode via inductance [H];
characteristic impedance (Zeven), which causes the coupling Cvia odd-mode via capacitance [F];
coefficient to be equal to zero for a pair of coupled transmis- Zvia odd-mode via impedance [];
sion lines. The common impedance is undefined due to its s via-to-via pitch;
sensitivity on the return vias which cannot be modeled using r radius of via barrel equal to the drill diameter;
(Dkx y + Dkz)
this methodology. Dkavg = .
The secret to this simple circuit model is in using the correct 2
value for Dkeff. In an earlier paper [1], it was suggested that The bulk dielectric constant Dkavg is due to the combination
the effective dielectric constant in the x-axis and y-axis (Dkxy) of resin and glass weave distribution. If a differential signal
was dominated by the glass fiber density surrounding the via is propagated between the twin rods, it would see this bulk
hole structure. dielectric constant. However, it also sees the capacitive loading
A later paper [2] theorized that it could be a combination from the fringe fields between the barrel and the planes it
of the anisotropic properties of the dielectric material plus the passes through. This distributed capacitance effectively lowers
capacitive loading effect of the anti-pads, thereby lowering the odd-mode impedance of the via and increases the effective
the overall odd-mode via impedance and raising the effective dielectric constant.
Dk. Unfortunately, it was not possible to prove this before The effective dielectric constant can be evaluated on the
publication. basis of how much the via’s odd-mode impedance is decreased.
In a subsequent paper [5], the dielectric material was shown Based on the twin rod formula, the via’s odd-mode impedance
to have a Dk anisotropic factor approximately 18% higher can be expressed as follows:

in the x-axis and y-axis (4.30) over the average the z-axis 
 
Z twi n ∼ 60  s s 2
value (3.64). This corroborates well with the work of Dankov Z vi a = =√ 
× ln + −1 .
et al. [6], showing that glass reinforced laminates have an 2 Dke f f 2r 2r
anisotropic factor between 15% and 20%. Substituting the odd-mode impedance from (15) into the
equation above, and solving for Dkeff yields [7]
B. Developing Analytical Equations for Zodd and Dkeff 
  2
Consider the differential via structure illustrated in Fig. 4. 60 s s 2
Dke f f = × ln + −1
When there are many copper layers in the PCB stackup, it Z vi a 2r 2r
SIMONOVICH et al.: DIFFERENTIAL VIA MODELING METHODOLOGY 725

Effective Dk versus Anti-pad Length

2.50

t 2.00
HFSS
W’ 0.053” → 0.073” 1.50

DK_eff
w W’

1.00 Calculated
b
0.50

0.00
Anti-pad Variation 0.050 0.055 0.060 0.065 0.070 0.075 0.080 0.085
b W’ t w Anti-pad Length
0.053 0.053 0.028 0.028
0.053 0.055 0.028 0.028
0.053 0.060 0.028 0.028 Fig. 6. Comparison of Dkeff calculated versus HFSS 3-D field solver
simulation for Dk = 1.
0.053 0.065 0.028 0.028
0.053 0.070 0.028 0.028
0.053 0.075 0.028 0.028
Virtual
0.053 0.080 0.028 0.028 Return

Fig. 5. Ansoft HFSS model oval anti-pad variation. Dk = 1. + -

   
s 2
ln s
2r + 2r −1 Stub1
Dkeff1

Dke f f = Dkavg ×    . (16) STUB

TD1

+b
ln Ww+t
Dkeff
TD
Stub2
Dkeff2
TD2
C. High Frequency Structure Simulator (HFSS) Versus
Analytical Correlation for Dkeff
The HFSS [8] model shown in Fig. 5 developed for [5] was Fig. 7. Stub portion of differential via. oval anti-pads on reference plane
reused to validate the circuit model against Dkeff. The anti-pad layers and round anti-pads on signal layers. The blue magnetic flux rings
represent the odd-mode inductance, while the red capacitors represent the
dimension (W  ) was varied in length according to the table. electric field from via barrels to anti-pads.
Dk = 1 was used to simplify the analysis and remove any
dielectric anisotropic ambiguity.
For each anti-pad dimension, (16) was used to calculate had a nominal line width of 8 mils (203 μm) with 9 mils
Dkeff. (2229 μm) space and was 6 in. (15.24 cm) long. Half-
By extracting the quarter-wave resonant frequency fo from ounce copper was used for the internal layers. The dielectric
the HFSS simulations, Dkeff was calculated using the follow- material was N4000-13. The total dielectric spacing between
ing [1]: the reference planes was nominally 21.7 mils (551 μm). Cores
 2 were 10 mils (254 μm), while 11-mils (279-μm) prepreg
c
Dke f f = (17) consisted of 2 × 1080 plus 1 × 2116 style sheets. The finished
4 ∗ Stub_length ∗ f o
differential pair impedance was targeted for 100  ± 10%.
where Each pair was terminated at each end with 2×24 mil (610 μm)
c the speed of light [2.99E +8 m/s finished hole size vias. The intra-pair via pitch was 59 mils
(1.18E +10 in/s)]; (1.5 mm). There were two adjacent ground vias, 79 mils
fo the quarter-wave resonant frequency; (2.0 mm) away for each respective signal via. A typical stub
Stub_len the stub length. portion of the differential via of the test structure is illustrated
The results are presented in Table I and plotted in Fig. 6. in Fig. 7. In the actual PCB stack-up, the reference plane layers
They show excellent correlation to the HFSS field-solver have oval anti-pads, while the signal layers have copper plane-
results with better than 1% accuracy for oval anti-pad length fill with round anti-pads.
to width ratios of less than 1.2:1, and 5% for 1.5:1 ratio. The stub region has two different cross sections, labeled as
Stub1 and Stub2. Throughout Stub1 thickness, the anti-pads
alternate between round and oval. The Stub2 thickness repre-
D. Investigating the Stub Portion of a Differential Via Test sents the power plane layers with thinner dielectric between
Structure planes and thicker copper layers.
A 26-layer test vehicle was designed and fabricated [1], [2], The cross section includes the electric and magnetic field
and [5]. There were 10 internal stripline layers, 12 reference distributions between the via barrels and the clearance holes in
layers, and 4 dedicated power layers. Each differential pair the planes. The electric field lines through Stub1 will spread
726 IEEE TRANSACTIONS ON COMPONENTS, PACKAGING AND MANUFACTURING TECHNOLOGY, VOL. 1, NO. 5, MAY 2011

TABLE I
C OMPARISON OF Dkef f C ALCULATED V ERSUS HFSS 3-D F IELD S OLVER FOR Dk = 1" = 25.4 mm

Stub_Len A-pad_W A-pad_L Res Freq Dkeff_sim Dkeff_Cal Delta % Zodd Cal
inch inch inch HFSS Sim Hz HFSS Formula ohms
0.264 0.053 0.053 7.63E + 09 2.15 2.16 0.5% 56.2
0.264 0.053 0.055 7.75E + 09 2.08 2.10 0.8% 57.1
0.264 0.053 0.060 7.98E + 09 1.96 1.96 −0.1% 59.0
0.264 0.053 0.065 8.19E + 09 1.86 1.85 −0.8% 60.8
0.264 0.053 0.070 8.33E + 09 1.80 1.75 −2.8% 62.4
0.264 0.053 0.075 8.43E + 09 1.76 1.67 −5.3% 64.0
0.264 0.053 0.080 8.52E + 09 1.72 1.59 −7.5% 65.5

s
Therefore, the quarter-wave resonant frequency (Hz) can be
s = 1.5 mm(0.059") expressed as follows:
W ' = 1.85 mm(0.073")
w W’ 1 1
B= s + W ' =
0.059 + 0.073
= 1.68 mm(0.066")
fo = = (18)
2 2 2 4×TD 4 × (T D1 + T D2 )
t B w = t = 0.71 mm(0.028") where TD1 , TD2 are the time delay in each stub region.
The time delay through each stub region can be calculated
s
from the geometrical length of the region and the effective
s = 1.5 mm(0.059") dielectric constant in each region
W ' = 1.85 mm(0.073") Stub_len1 
w W’
b = 1.34 mm(0.053") T D1 = × Dke f f 1
c
w = t = 0.71 mm(0.028")
Stub_len2 
t b T D2 = × Dke f f 2.
c
Fig. 8. Round versus oval anti-pad details of the test vehicle. The effective dielectric constant in each stub region can be
calculated on the basis of (16) using the different clearance
hole geometry of each region
onto the cavities between reference planes to roughly the    
s 2
extent of the round anti-pad diameter as shown except for ln 2rs + 2r − 1
the thickness of the oval anti-pad copper layers where the Dke f f 1 = Dkavg ×   
+B
electric field will be contained to the oval dimension. To ln Ww+t
simplify analysis, these layers are subtracted from Stub1’s    
s 2
overall thickness and added to Stub2’s thickness because they ln 2rs + 2r − 1
will have the same properties. Dke f f 2 = Dkavg ×   
+b
Given that fringe field via capacitance loading in the Stub1 ln Ww+t
region will be lower than in the Stub2 region, the speed of
where
propagation in the Stub1 region will be higher than in the
c speed of light
Stub2 region. Therefore, Dkeff1 will be lower than Dkeff2.
= 2.99E + 8 m/s (1.18E + 10 in/s);
Stub resonance happens when a portion of the signal trav-
s via-to-via pitch;
eling through the active region of a via is diverted down into
r radius of via barrel = the drill dia;
the stub section. It then reflects off the open-circuited end, and
Stub_len1 +
returns later to recombine with the main signal. At some high
Stub_len2 = stub length;
frequency, if the round trip delay (2TD) from the active region (Dkx y + Dkz)
of the via to the end of the stub and back equals half of a cycle, Dkavg = ;
   2
the main wave and the reflected wave appear 180° out of phase, W +B
w+t  = round anti-pad dimensions per Fig. 8;
producing destructive signal cancellation. That frequency is 
W  +b
called the quarter-wave resonant frequency fo. The longer the w+t = Oval anti-pad dimensions per Fig. 8.
length of the stub, the lower the resonant frequency.
Once the quarter-wave resonant frequency is calculated, a
The specifics of the differential via anti-pads are shown in
new Dkeff and Zvia approximating the entire stub length can
Fig. 8. The round anti-pads overlap each other due to the via–
be calculated using the following equations for each anti-pad
via spacing (s).
dimension [1]:
The propagation delay through the stub varies as the ef-  2
fective dielectric constant surrounding the via hole structure c
Dke f f =
changes. The total time delay, TD is the sum of TD1 and TD2 . 4 × Stub_length × f o
This time delay will determine the quarter-wave frequency (Z vi a_Stub1 + Z vi a_Stub2)
notch in the S21 insertion loss plot. Z vi a ∼
=
2
SIMONOVICH et al.: DIFFERENTIAL VIA MODELING METHODOLOGY 727

S-PARAMETERS
where
S_Param
SP1
60
Z vi a_Stub1 ∼
= √
Start = .1 GHz
Stop = 20 GHz
Dkavg Step = .01 GHz

PORT 1 PORT 2

    
 s s 2 W +B
d
S4P d


Balun Balun

× ln + − 1 × ln Term c 1 SNP15 c Term

3 4

2r 2r w+t Term1
Num = 1
Balun3Port
CMP38
Ref 2 Balun3Port
CMP37
Term2
Num = 2
Z = 100 Ohm Z = 100 Ohm
60
Z vi a_Stub2 ∼
= √
Dkavg


    
SSub

 s s 2 W +b SSUB

× ln + − 1 × ln SSub2
Er = 3.64
PORT 3 PORT 4
2r 2r w+t d
Mur = 1
B = 20.6 mil d
Balun
c
T = 0.709 mil Balun
c
Term Cond = 5.8e7 Term
Balun3Port TanD = 0.012 Balun3Port Term4
speed of light = 2.99E
Term3
c Num = 3 CMP38 CMP35 Num = 4
CLINP Z = 100 Ohm
+ 8 m/s (1.18E + 10 in/s); Z = 100 Ohm
TL143
Ze = 32.8
VIA Zo = 32.8
s via-to-via pitch; L = Via_Len
r radius of via barrel = drill dia; Ke = 6.15
Ko = 6.15
Ae = 0.0001
Stub_len total stub length; Ao = 1
(Dkx y + Dkz) Var VAR
=
Eqn

Dkavg . VAR1
Via_Len = 14.7 mil {−t}
2 Stub_Len = 269.3 mil {t}
SCL IN
CL in31
Subset = “ SSub2”
W = 8.3 mil
E. Circuit Model Versus HFSS Via Model Validation S = 8.5 mil
L = 131 mil
CLINP
Using the HFFS model representing the actual test ve- VIA Stub TL144
Ze = 32.8
Zo = 32.8
hicle stack-up and long stub via pad/anti-pad stack, Dkeff L = Stub_Len
Ke = 6.15
and Zvia were calculated using the parameters listed below. Ko = 6.15
Ae = 0.0001
The dielectric constants were provided from supplier’s data Ao = 1

sheet [9] for the material used to fabricate the stack-up.

Fig. 9. ADS schematic of HFSS touchstone S-parameter file (Dkxy =
4.3) (Ports 1, 2 top) versus circuit model using calculated values (Ports 3, 4
bottom).
HFSS Via Parameters
s = 1.50 mm (59 mil);
r = Drill radius = 0.36 mm (14 mil); Stub_len1 
T D1 = × Dke f f 1 = 44.19 ps
Via_length = 0.37 mm (14.7 mil); c
Stub_len2 
Stub_length1 = 5.41 mm (212.9 mil); T D2 = × Dke f f 2 = 12.38 ps
Stub_length2 = 1.43 mm (56.3 mil); c
1 1
Stub_length = 6.84 mm (269.3 mil); fo = = = 4.42 Ghz
4×TD 4 × (T D1 + T D2 )
Anisotropy in Dk = 18%;  2
W  = Anti-pad length = 1.85 mm (73 mil); c
Dke f f = = 6.15
b = oval anti-pad width = 1.35 mm (53 mil); 4 × Stub_length × f o
B = round anti-pad width = 1.68 mm (66 mil); 60
Z vi a_Stub1 ∼= √
w = t = drill diameter = 0.71 mm (28 mil); 
Dkavg
Dkz = 3.65; 
    
 s s 2 W +B
Dkxy = 1.18 ∼ 
 × 3.65  = 4.3; × ln
2r
+
2r
− 1 × ln
w+t
= 33.7
Dkavg = 3.65+4.3
2 = 3.96.
60
Z vi a_Stub2 ∼
= √
Dkavg

Circuit Model Calculated Via Parameters 
    
 s s 2 W +b

× ln + − 1 × ln = 31.8
   
s 2
2r 2r w+t
ln + s
2r2r − 1
   (Z vi a_Stub1 + Z vi a_Stub2)
Dke f f 1 = Dkavg ×
+B
= 6.00 Z vi a ∼
= = 32.8.
ln Ww+t 2
   
s 2
ln 2rs + 2r − 1 The simulated S-parameters from the equivalent via circuit
Dke f f 2 = Dkavg ×    = 6.73 model were compared against the HFSS-simulated touch-
+b
ln Ww+t stone S-parameter file using Agilent ADS [10]. Both circuit
728 IEEE TRANSACTIONS ON COMPONENTS, PACKAGING AND MANUFACTURING TECHNOLOGY, VOL. 1, NO. 5, MAY 2011

0
Via = 14.7 mils
−10 L2 Via = 106 mils
Via = 220 mils
−20
dB(S(4,3))
dB(S(2,1))

L10
m3 m3
freq = 4.420GHz
−30
Stub = 269.3 mils
L20
−40 Stub = 178 mils
Stub = 64 mils
−50 m4
m4 freq = 4.420GHz 1 mil = 25.4 µm
−60
0 5 10 15 20
Fig. 13. Illustration of layers measured showing long, medium, short stub
freq, GHz
lengths from test vehicle stack-up.
Fig. 10. Simulated S(2,1) and S(4,3) insertion loss comparison of HFSS
model (m3-red) against circuit model (m4-blue). The resonant frequency is AgilentN5230A
Agilent N5230AVNA
VNA
4.42GHz for both cases.

0
1 44
−10 2 33

−20
dB(S(3,3))
dB(S(1,1))

−30
PCB Coupon Under Test
−40
Via Pair Via Pair
−50 1A, 1B 2A, 2B

−60
0 5 10 15 20 Device Under Test
freq, GHz
Fig. 14. Test setup illustration. The test probes are considered part of the
Fig. 11. Simulated S(1,1) and S(3,3) return loss comparison of HFSS model device under test.
(red) against circuit model (blue).

400 approximately 13 GHz. It is also remarkable the one-fourth

resonant frequency calculated (fo = 4.42 GHz) agrees exactly
with the simulated model.
200
phase(S(4,3))
phase(S(2,1))

F. Circuit Model Versus Test Vehicle Validation

0 Three different via structures representing long, medium,
and short differential via stubs as illustrated in Fig. 13 were
chosen from the test vehicle [1], [2], and [5]. The measured
−200
results were used to validate the differential via circuit model’s
accuracy.
−400 The test vehicle was set up and connected to an Agilent
0 5 10 15 20 N5230A, 4-port 20-Gig VNA (Fig. 14) for each case. Two
freq, GHz
differential probes were fabricated from approximately 2 in.
Fig. 12. Simulated S(2,1) and S(4,3) Phase comparison of HFSS model each of semi-rigid coax with SMA connectors terminating on
(red) against circuit model (blue). one end. In order to facilitate probing the differential via hole
structure, the other ends of the probes were stripped, and a
small length of solid wire was soldered to each semirigid
topologies used for the simulations are shown in Fig. 9. coax sheath to provide a ground contact to adjacent ground
Ideal Balun transformers were used to simplify the display reference holes. The probe tips were minimized in length
of differential S-parameters. The common-signal properties to minimize loop inductance. The measurement setup was
were not evaluated as they play no role in the behavior of calibrated to the ends of the SMA cables using an Agilent
the differential signal. E-Cal, module prior to connecting them to the custom probes.
For such a simple model, the simulated insertion and return Since the semirigid probes were not part of the calibration,
losses and phase of Figs. 10–12, respectively, shows excellent they are considered part of the device under test (DUT) as
correlation between these two computation methods up to outlined in the dashed rectangle (Fig. 14).
SIMONOVICH et al.: DIFFERENTIAL VIA MODELING METHODOLOGY 729

Test Vehicle Touchstone Data

0
Port 7 Port 8 −20
Port 9 Port 10
−40

Sdd16_15
Sdd8_7
HFSS Touchstone Data
−60
Port 11 Port 12 −80
Port 13 Port 14
−100
−120
Circuit Model 0 2 4 6 8 10 12 14 16 18 20
Port 15 Port 16
freq, GHz
Port 17 Port 18
120
110
Probe Probe
100
90

Tdd15_15
Tdd7_7
80
Via Model Diff Stripline Via Model 70
60
Fig. 15. (Top) ADS schematic of test vehicle, (middle) HFSS, and (bottom) 50
circuit model used for simulation comparisons. The HFSS topology includes 40
both via and track S-parameters as modeled from [7].
30
0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5
time, nsec
0
Fig. 17. (Top) Medium stub (L10) insertion loss and (bottom) TDR
−20
plots comparison of test vehicle measurements (Sdd8_7-red) circuit model
−40 (Sdd16_15-blue). Dkef f = 6.25, Z via = 32.8, D f = 0.012.
Sdd16_15
Sdd12_11
Sdd8_7

−60
−80
0
−100
−20
−120
0 2 4 6 8 10 12 14 16 18 20 −40
Sdd16_15
Sdd8_7

freq, GHz
−60

120 −80
110
−100
100
90 −120
Tdd15_15
Tdd11_11
Tdd7_7

80 0 2 4 6 8 10 12 14 16 18 20
70 freq, GHz
60
50
40 120
30 110
0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 100
time, nsec 90
Tdd15_15
Tdd7_7

80
70
Fig. 16. (Top) Long stub (L2) insertion loss and (bottom) TDR plots 60
comparison of test vehicle measurements (Sdd8_7-red) against HFSS simu- 50
lation (Sdd12_11-green) and circuit model (Sdd16_15-blue). Dke f f = 6.15, 40
Z via = 32.8, D f = 0.012. 30
0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5
time, nsec
Finally, a section of the coupon was cross-sectioned, and
Fig. 18. (Top) Short stub (L20) insertion loss and (bottom) TDR plots
the actual via to stub thickness ratios were measured for each comparison of test vehicle measurements (Sdd8_7-red) against circuit model
stripline layer under a calibrated microscope. (Sdd16_15-blue). Dkef f = 6.57, Z via = 32.8, and D f = 0.012.
The simulated S-parameters of the equivalent via circuit
model for the long stub via case was compared against
the HFSS generated touchstone S-parameter files and the dle circuit topology brings the HFSS-simulated S-parameter
measured results using Agilent ADS. The circuit topologies behavioral models for both vias and PCB traces. The bot-
used for these simulations are shown in Fig. 15. tom circuit topology simulated the transmission line elements
The top circuit topology brings the measured S-parameters using analytical formula parameters for the vias and traces.
of the test vehicle into the simulation environment. The mid- Ideal 4Port-Balun transformers realize the ideal transformation
730 IEEE TRANSACTIONS ON COMPONENTS, PACKAGING AND MANUFACTURING TECHNOLOGY, VOL. 1, NO. 5, MAY 2011

between balanced (differential and common) signals and un- [5] Y. Cao, L. Simonovich, and Q.-J. Zhang, “A broadband and parametric
balanced (single-ended) signals. They were used to simplify model of differential via holes using space-mapping neural network,”
IEEE Microw. Wireless Compon. Lett., vol. 19, no. 9, pp. 533–535, Sep.
the display of differential S-parameters and to terminate any 2009.
differential to common mode conversion particularly with the [6] P. I. Dankov, V. P. Levcheva, and V. N. Peshlov, “Utilization of 3-
measured data. For the medium and short stub cases, the D simulators for characterization of dielectric properties of anisotropic
materials,” in Proc. Eur. Microw. Conf., Oct. 2005, pp. 1–4.
respective circuit model was only compared to the measured [7] L. Simonovich, E. Bogatin, and Y. Cao, “Method of modeling differen-
results. tial vias,” White Paper, LAMSIM Enterprises Inc., Ottawa, ON, Canada,
Fig. 16 shows the correlation of calculated results used in Apr. 2009.
[8] HFSS Version 11, Ansoft Corp., Pittsburgh, PA, 2007.
the circuit model against the measured test vehicle structure [9] Park Electrochemical Corp., Melville, NY [Online]. Available:
and HFSS model of the long stub via developed in [5]. The http://www.parkelectro.com/
circuit simulation using the analytical calculations for the dif- [10] Agilent EEs of EDA, Agilent Technol., Santa Clara, CA, 2009.
ferential via Dkeff = 6.15 and odd-mode impedance of Zvia =
32.8  shows excellent agreement with the measurements to
about 13 GHz. This also confirms the HFSS predictions of
the via stub resonant frequency using the actual bulk dielectric Lambert Simonovich (M’08) was born in Hamil-
constant of the laminate. ton, ON, Canada. He received the Diploma degree
Updating Dkeff = 6.25 for medium stub case and 6.57 for in electronic engineering technology from Mohawk
College of Applied Arts and Technology, Hamilton,
short stub case to the respective via model, shows there is in 1976.
excellent agreement with measured results as seen in Figs. 17 He is working as an Electronic Engineering Tech-
and 18. Furthermore, it is worth noting that the quarter- nologist at Bell Northern Research, Ottawa, ON,
and Nortel, Ottawa. Throughout his 32-year career,
wave resonant frequency could not be measured from the test he has helped pioneer several advanced technology
vehicle’s measured data in the short stub case (Fig. 18) because solutions into products. He has held a variety of
of the measurement bandwidth of 20 GHz. This is a prime engineering, research and development positions,
eventually specializing in signal integrity, and backplane design for the last
example to demonstrate the usefulness of the methodology 10 years. He is the Founder of Lamsim Enterprises Inc., Stittsville, ON. He
presented in this paper to calculate Dkeff rather than depend holds two patents and has co-authored several publications, including an award
on measurements to calculate it. winning DesignCon2009 paper related to via modeling. His current research
interests include signal integrity, high-speed characterization, and modeling
of high-speed serial links associated with backplane interconnects.
IV. C ONCLUSION
A novel equation-based analytical methodology to develop a
simple, scalable, and high-bandwidth circuit model of differen-
tial via holes has been introduced. The circuit model consisting Eric Bogatin (M’80) received the B.S. degree in
of a pair of parameterized coupled transmission lines for both physics from Massachusetts Institute of Technology,
Cambridge, and the M.S. and Ph.D. degrees in
the through and stub portion of the via has shown that it can physics from the University of Arizona, Tucson.
be used to accurately describe a real differential via structure He has held senior engineering and management
to very high bandwidth. Correlation to an EM-field solver and positions at Bell Laboratories, Murray Hill, NJ, Ray-
chem, Menlo Park, CA, Sun Microsystems, Santa
measured results suggests that the model can be used as a Clara, CA, Ansoft, San Jose, CA, and Interconnect
first approximation to accurately describe a real differential Devices Inc., Kansas City, KS. He has written six
via to very high bandwidth. In the absence of measured data books on signal integrity and interconnect design
and has published over 300 papers. His latest book is
or EM simulated results, applying this methodology can be Signal and Power Integrity-Simplified (Sunnyvale, CA: Prentice Hall, 2009).
used for sensitivity analysis to quickly quantify and optimize He has taught over 6000 engineers in the last 20 years.
the performance of vias in a channel model or to help sanitize
subsequent models generated with a 3-D EM-field solver.

R EFERENCES Yazi Cao (M’09) received the B.S. and Ph.D. de-
[1] L. Simonovich, “Relative permittivity variation surrounding PCB via grees in electrical engineering from Wuhan Univer-
hole structures,” in Proc. Signal Propag. Interconnects, Avignon, France, sity, Hubei, China, in 2004 and 2008, respectively.
May 2008, pp. 1–4. He has been a Post-Doctoral Fellow in the Depart-
[2] E. Bogatin, L. Simonovich, S. Gupta, and M. Resso, “Practical analysis ment of Electronics, Carleton University, Ottawa,
of backplane vias,” in Proc. DesignCon, Feb. 2009, pp. 1–24. ON, Canada, since 2009. His current research inter-
[3] E. Bogatin, Signal Integrity Simplified. Englewood Cliffs, NJ: Prentice- ests include neural networks, design, and modeling
Hall, 2004. of radio frequency/microwave circuits.
[4] M. A. R. Gunston, Microwave Transmission-Line Impedance Data. New
York: Van Nostrand Reinhold, 1972.