Lenovo s340 Schematics

A B C D E
1 1
Compal Confidential
2
EL432/EL532 2
M/B Schematic Documents

AMD Picasso FP5 APU with DDR4
3
LA-H131P 3
2018-11-05
Rev : 0.4
4 4
Security Classification Compal Secret Data Compal Electronics, Inc.

Issued Date 2018/11/05 Deciphered Date 2019/11/05 Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Cover Page
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
B 0.4
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-H131P
Date: Monday, November 05, 2018 Sheet 1 of 46
A B C D E
A B C D E
DDR4 2400MHz CH-A DDR4-SO-DIMM X1

CH-B on board RAM x4
PCIe x3 , Gen3 8Gb/s
NGFF (Key M)
PCIE/SATA SSD PCIe x1 , Gen3 8Gb/s
PCIe/SATA Mux
1
2242/2280 conn. Pericom PI3DBS12212A SATA x1 , Gen3 6Gb/s USB2.0 x1, 480Mb/s USB Charger
1
USB2.0 x1, 480Mb/s

TI SN1702001RTER
USB3.0 Conn.
with AOU
USB3.1 x1, 5Gb/s USB3 redriver USB3.1 x1, Gen1 5Gb/s
NGFF (Key E) PCIe x1 , Gen1 2.5Gb/s
WLAN/BT5.0 Parade PS8713B
USB2.0 x1, 480Mb/s
2230 conn.
USB3.1 x1, 5Gb/s USB3 redriver USB3.1 x1, Gen1 5Gb/s
Parade PS8713B
USB2.0 x1, 480Mb/s
USB3.0 Conn.
eDP Panel eDP x2 HBR 2.7Gb/s
AMD Picasso Ridge
FHD LCD On Sub Board
1140pin BGA
USB2.0 x1, 480Mb/s
2
Int. Camera 2
HDMI Conn. DDI x4 , 2.97GT/s

USB2.0 x1, 480Mb/s
HDMI1.4b USB2.0 Hub
Touch Panel FingerPrint

SATA x1 , Gen3 6Gb/s Reserve
HDD Conn.
PCIe x1 , Gen1 2.5Gb/s Card Reader SDIO

Realtek RTS5232S
SD Card Conn.
VBus On Sub Board
5V Switch
Type-C Conn. USB2.0 x1, 480Mb/s HP
Combo Jack
3
USB3.1 Gen1 3
CC/Vconn HDA Audio Codec SPK

MUX/CC USB3.1x1, Gen1 Int. Speaker
USB3.1x1, Gen1 Realtek RTS5448 Realtek
ALC3287-CG DMIC
Int. Array Mic *2
I2C
TouchPad
SPI
SPI ROM
8MB
LPC
Int. KBD
KBC
4 Hall Sensor x1 ENE KB9022 4
LED

Cover Page
D 0.4
A B C D E
A B C D E
Voltage Rails BOM STRUCTURE

SIGNAL
Power Plane Description S0 S3 S5 STATE SLP_S3# SLP_S5# +VALW +V +VS Clock BOM STRUCTURE DESCRIPTION BOM STRUCTURE DESCRIPTION
VIN Adapter power supply ON ON ON Ryzen5_PR@ Ryzen5 CPU (PR Sample) Ryzen3_PC@ Ryzen3 CPU (PC Sample)
Full ON HIGH HIGH ON ON ON ON
B+ AC or battery power rail for power circuit. ON ON ON Ryzen7_PR@ Ryzen7 CPU (PR Sample) Ryzen3_PR@ Ryzen3 CPU (PR Sample)
+APU_CORE Core voltage for APU ON OFF OFF S3 (Suspend to RAM) HIGH HIGH ON ON OFF OFF 45@ HDMI Logo Ryzen5_PC@ Ryzen5 CPU (PC Sample)
+APU_CORE_SOC Core voltage for APU ON OFF OFF 14_DAZ_R0@ 14" DAZ (Rev0 PCB) Ryzen7_ES@ Ryzen7 CPU (ES Sample)
S4 (Suspend to Disk) LOW HIGH ON OFF OFF OFF
+RTC_APU RTC power ON ON ON 15_DAZ_R0@ 15" DAZ (Rev0 PCB) Ryzen7_PC@ Ryzen7 CPU (PC Sample)
+3VALW 3.3V always on power rail ON ON ON S5 (Soft OFF) LOW LOW ON OFF OFF OFF X4E@ 43J X4E Level @ Un-Mount Components
1 1
+3VS 3.3V switched power rail ON OFF OFF X76RAM@ On Board RAM X76 Resistors @EMI@ EMI Un-Mount Components
+1.8VALW 1.8V always on power rail ON ON ON S4G_MD@ On Board RAM (Samsung 4GB) @ESD@ ESD Un-Mount Components
+1.8VS 1.8V switched power rail ON OFF OFF BOM STRUCTURE DESCRIPTION H4G_MD@ On Board RAM (Hynix 4GB) 20V_PRTCT@ 5448 EXT Voltage Protection
+0.8VALW 0.95V always on power rail ON ON ON 14@ 14" Only Components M4G_MD@ On Board RAM (Micron 4GB) FP@ Finger Printer (Reserved)
+0.8VS 0.95V switched power rail ON OFF OFF 15@ 15" Only Components HDT@ HDT Debugging ME@ ME Components
+1.2V_DDR 1.2V power rail for APU and DDR ON ON OFF OBR@ On Board RAM SKU Only EMI@ EMI Components EX_THM@ Thermal Sensor
+2.5V_MEM 2.5V power rail for DDR ON ON OFF NO_OBR@ No On Board RAM SKU Only ESD@ ESD Components HUB@ USB2.0 HUB
+0.6VS_VTT 0.6V switched power rail for DDR terminator ON OFF OFF SDP@ Memory Down - SDP Package RF@ RF Components DA_R0@ PCB Part Number (Rev0 PCB)
+5VALW 5V always on power rail ON ON ON DDP@ Memory Down - DDP Package TS@ Touch Screen DA_R1@ PCB Part Number (Rev1 PCB)
+5VS 5V switched power rail ON OFF OFF SINGLE_MIC@ MIC Select Strap (1 MIC) 14_DAZ_R1@ 14" DAZ (Rev1 PCB)
MULTI_MIC@ MIC Select Strap (2 MIC) 15_DAZ_R1@ 15" DAZ (Rev1 PCB)
KBL@ Keyboard Backlight RD@ USB3.0 Re-Driver BOM
TI@ TI Re-Driver Only
PARADE@ Parade Re-Driver Only
SMBUS Control Table PERICOM@ Pericom Re-Driver Only
X76_TI@ TI Re-Driver X76 Level
X76_PARADE@ Parade Re-Driver X76 Level
SOURCE APU BATT EC SODIMM WLAN
X76_PERICOM@ Pericom Re-Driver X76 Level
EC_SMB_CK1 9022
X V V X X
2 2
EC_SMB_DA1 +3VALW
+3VALW +3VALW
APU_SCLK0 APU
APU_SDATA0 +3VS
X X X V X
+3VS
EC_SMB_CK2 9022
EC_SMB_DA2
V X V X X
+3VS +1.8VS +3VALW
EC SM Bus1 address EC SM Bus2 address

Device Address HEX Device Address HEX
Smart Battery 0001 011x b 16H APU 1001 100X b 98H
GPP Port PCB ON BOARD RAM * 4 HDMI Logo
Charger 0001 0010 b 12H
ZZZ H4G_MD@ ZZZ M4G_MD@ ZZZ S4G_MD@ ZZZ 45@
ZZZ DA_R0@ ZZZ 14_DAZ_R0@ ZZZ 15_DAZ_R0@

PORT FUNCTION
APU SM Bus address GPP0 X76 HYNIX 4GB MD X76 MICRON 4GB MD X76 SAMSUNG 4GB MD HDMI Logo
X7680438L51 X7680438L52 X7680438L53
3
Device Address HEX
GPP1 Rev0 PCB Rev0 DAZ_14 Rev0 DAZ_15
RO0000003HM 3
SSD (PCIe x4) DA60023G000 DAZ2GH00100 DAZ2GD00100
SM Bus 0
DDR DIMM1 1010 001Xb A2H
GPP2
GPP3
ZZZ DA_R1@ ZZZ 14_DAZ_R1@ ZZZ 15_DAZ_R1@
GPP4 Card Reader (PCIe x1)
APU I2C Bus address GPP5 WLAN (PCIe x1) CARD READER (SUB BOARD) X4E
M*
*
au
nb
i
St
ot
ut
r
c-
eG
-e
Rn
ee
as
l
t
es
k
Device Address GPP6 SSD (SATA x1) ZZZ X4E@
S
s
i
u
e
y
Touch Pad (Synaptics) $2C Rev1 PCB Rev1 DAZ_14 Rev1 DAZ_15
I2C 3
Touch Pad (Elan) 0X15
GPP7 HDD (SATA x1) DA60023G010 DAZ2GH00101 DAZ2GD00101
X4E EMC
X4EAF938L01
USB3.0 Port (USB_0) USB2.0 Port Display Port
PORT FUNCTION PORT FUNCTION PORT FUNCTION CPU

0 Type-C 0 Type-C 0 eDP UC1 Ryzen5_PC@ UC1 Ryzen5_PR@ UC1 Ryzen3_PC@
1 Sub/B USB3.0 Type-A 1 Sub/B USB3.0 Type-A 1 HDMI
2 Sub/B USB3.0 Type-A 2 Sub/B USB3.0 Type-A
3 3 Camera S IC RYZEN5 ZM350SC4T4MFG 2G QS BGA APU S IC RYZEN5 YM3500C4T4MFG 2G BGA1140 APU S IC RYZEN3 ZM320SC4T2OFG 2.5G QS APU
SA0000CCR00 SA0000CCR20 SA0000CCS00
4 4 USB2.0 Hub
UC1 Ryzen7_ES@ UC1 Ryzen7_PC@ UC1 Ryzen7_PR@ UC1 Ryzen3_PR@
5 Bluetooth
4 4
USB2.0 Hub S IC RYZEN7 2M370SC4T4MFB 2.2G ES APU S IC RYZEN7 ZM370SC4T4MFG 2.2G QS APU S IC RYZEN7 YM3700C4T4MFG 2.2G BGA APU S IC RYZEN3 YM3200C4T2OFG 2.5G BGA 1140 APU
SA0000C7610 SA0000C7620 SA0000C7640 SA0000CCS20
PORT FUNCTION
TYPE1 TYPE2
1 Touch Screen Security Classification Compal Secret Data Compal Electronics, Inc.
2 Finger Printer Issued Date 2018/11/05 Deciphered Date 2019/11/05 Title
NOTES LIST
C 0.4
A B C D E
5 4 3 2 1
Shut
Power Sequence Boot Down
VCIN1_AC_IN VCIN1_AC_IN
EC Pin 110 Intput
D D
+3VLP +3VLP
EC_ON EC_ON
EC Pin 112 Output
+5VALW +5VALW
AC Plug
+3VALW +3VALW
3V/5VALW_PG 3V/5VALW_PG
+1.8VALW +1.8VALW
+0.8VALW +0.8VALW
ON/OFF# ON/OFF#
EC Pin 114 Intput T1_Min : 10ms
EC_RSMRST# EC_RSMRST#
EC Pin 100 Output T2 : 15ms~26ms
RTC_CLK RTC_CLK
PBTN_OUT# PBTN_OUT#
EC Pin 122 Output
PM_SLP_S5# PM_SLP_S5#
C
EC Pin 123 Intput T3 : 30us~64us
C
PM_SLP_S3# PM_SLP_S3#
EC Pin 6 Intput
SYSON SYSON
EC Pin 95 Output
+2.5V_MEM +2.5V_MEM
+1.2V_DDR +1.2V_DDR
SUSP# SUSP#
EC Pin 116 Output
0.8VS_PWR_EN 0.8VS_PWR_EN
EC Pin 99 Output
+5VS +5VS
+3VS +3VS
+1.8VS +1.8VS
+0.8VS +0.8VS
+0.6VS +0.6VS
VR_ON VR_ON
EC Pin 121 Output
B B
+APU_CORE +APU_CORE
+APU_CORE_SOC +APU_CORE_SOC
VGATE VGATE
EC Pin 36 Intput T5_Min : 1ms
PCH_PWROK PCH_PWROK
EC Pin 32 Output
APU_PWRGD APU_PWRGD
EC Pin 13 Intput PLT_RST# PLT_RST#

T8 : 15ms~17ms
PCIRST# PCIRST#
APU_RST# APU_RST#
CLK_PCIE CLK_PCIE
T9 : 12ms~14.6ms
A A

Power Sequence
C 0.4
5 4 3 2 1
5 4 3 2 1
Main Func = CPU
D D
UC1A
MEMORY A UC1I
<12> DDR_A_MA[13..0]
DDR_A_DQ[63..0] <12> MEMORY B
DDR_A_MA0 <13> DDR_B_MA[13..0]
AF25 MA_ADD0
DDR_A_MA1 DDR_A_DQ0 DDR_B_MA0 DDR_B_DQ[63..0] <13>
AE23 MA_ADD1 MA_DATA0 J21 AG30 MB_ADD0
DDR_A_MA2 AD27 H21 DDR_A_DQ1 DDR_B_MA1 AC32 B21 DDR_B_DQ0
MA_ADD2 MA_DATA1 MB_ADD1 MB_DATA0
DDR_A_MA3 AE21 F23 DDR_A_DQ2 DDR_B_MA2 AC30 D21 DDR_B_DQ1
DDR_A_MA4 AC24 H23 DDR_A_DQ3 DDR_B_MA3 AB29 B23 DDR_B_DQ2
DDR_A_MA5 AC26 G20 DDR_A_DQ4 DDR_B_MA4 AB31 D23 DDR_B_DQ3
DDR_A_MA6 AD21 F20 DDR_A_DQ5 DDR_B_MA5 AA30 A20 DDR_B_DQ4
DDR_A_MA7 AC27 J22 DDR_A_DQ6 DDR_B_MA6 AA29 C20 DDR_B_DQ5
DDR_A_MA8 AD22 J23 DDR_A_DQ7 DDR_B_MA7 Y30 A22 DDR_B_DQ6
DDR_A_MA9 AC21 DDR_B_MA8 AA31 C22 DDR_B_DQ7
MA_ADD9 MB_ADD8 MB_DATA7
DDR_A_MA10 AF22 G25 DDR_A_DQ8 DDR_B_MA9 W29
MA_ADD10 MA_DATA8 MB_ADD9
DDR_A_MA11 AA24 F26 DDR_A_DQ9 DDR_B_MA10 AH29 D24 DDR_B_DQ8
DDR_A_MA12 AC23 L24 DDR_A_DQ10 DDR_B_MA11 Y32 A25 DDR_B_DQ9
DDR_A_MA13 AJ25 L26 DDR_A_DQ11 DDR_B_MA12 W31 D27 DDR_B_DQ10
MA_ADD13_BANK2 MA_DATA11 MB_ADD12 MB_DATA10
AG27 L23 DDR_A_DQ12 DDR_B_MA13 AL30 C27 DDR_B_DQ11
MA_WE_L_ADD14 MA_DATA12 MB_ADD13_BANK2 MB_DATA11
<12> DDR_A_WE# DDR_A_DQ13 DDR_B_DQ12
AG23 MA_CAS_L_ADD15 MA_DATA13 F25 AK30 MB_WE_L_ADD14 MB_DATA12 C23
<12> DDR_A_CAS# DDR_A_DQ14 <13> DDR_B_WE# DDR_B_DQ13
AG26 MA_RAS_L_ADD16 MA_DATA14 K25 AK32 MB_CAS_L_ADD15 MB_DATA13 B24
<12> DDR_A_RAS# DDR_A_DQ15 <13> DDR_B_CAS# DDR_B_DQ14
MA_DATA15 K27 AJ30 MB_RAS_L_ADD16 MB_DATA14 C26
<13> DDR_B_RAS# DDR_B_DQ15
MB_DATA15 B27
AF21 M25 DDR_A_DQ16
MA_BANK0 MA_DATA16
<12> DDR_A_BA0 DDR_A_DQ17 DDR_B_DQ16
AF27 MA_BANK1 MA_DATA17 M27 AH31 MB_BANK0 MB_DATA16 C30
<12> DDR_A_BA1 DDR_A_DQ18 <13> DDR_B_BA0 DDR_B_DQ17
MA_DATA18 P27 AG32 MB_BANK1 MB_DATA17 E29
DDR_A_BG0 DDR_A_DQ19 <13> DDR_B_BA1 DDR_B_DQ18
AA21 MA_BG0 MA_DATA19 R24 MB_DATA18 H29
<12> DDR_A_BG0 DDR_A_BG1 DDR_A_DQ20 DDR_B_BG0 DDR_B_DQ19
AA27 MA_BG1 MA_DATA20 L27 V31 MB_BG0 MB_DATA19 H31
<12> DDR_A_BG1 DDR_A_DQ21 <13> DDR_B_BG0 DDR_B_BG1 DDR_B_DQ20
MA_DATA21 M24 V29 MB_BG1 MB_DATA20 A28
DDR_A_ACT# DDR_A_DQ22 <13> DDR_B_BG1 DDR_B_DQ21
AA22 MA_ACT_L MA_DATA22 P24 MB_DATA21 D28
<12> DDR_A_ACT# DDR_A_DQ23 DDR_B_ACT# DDR_B_DQ22
MA_DATA23 P25 V30 MB_ACT_L MB_DATA22 F31
<12> DDR_A_DM[7..0] DDR_A_DM0 <13> DDR_B_ACT# DDR_B_DQ23
F21 MA_DM0 MB_DATA23 G30
DDR_A_DM1 DDR_A_DQ24 <13> DDR_B_DM[7..0] DDR_B_DM0
G27 MA_DM1 MA_DATA24 M22 C21 MB_DM0
DDR_A_DM2 N24 N21 DDR_A_DQ25 DDR_B_DM1 C25 J29 DDR_B_DQ24
MA_DM2 MA_DATA25 MB_DM1 MB_DATA24
DDR_A_DM3 N23 T22 DDR_A_DQ26 DDR_B_DM2 E32 J31 DDR_B_DQ25
DDR_A_DM4 AL24 V21 DDR_A_DQ27 DDR_B_DM3 K30 L29 DDR_B_DQ26
C MA_DM4 MA_DATA27 MB_DM3 MB_DATA26 C
DDR_A_DM5 AN27 L21 DDR_A_DQ28 DDR_B_DM4 AP30 L31 DDR_B_DQ27
DDR_A_DM6 AW25 M20 DDR_A_DQ29 DDR_B_DM5 AW31 H30 DDR_B_DQ28
DDR_A_DM7 AT21 R23 DDR_A_DQ30 DDR_B_DM6 BB26 H32 DDR_B_DQ29
T27 T21 DDR_A_DQ31 DDR_B_DM7 BD22 L30 DDR_B_DQ30
RSVD_36 MA_DATA31 MB_DM7 MB_DATA30
N32 L32 DDR_B_DQ31
RSVD_21 MB_DATA31
F22 AL27 DDR_A_DQ32
MA_DQS_H0 MA_DATA32
<12> DDR_A_DQS0 DDR_A_DQ33 DDR_B_DQ32
G22 MA_DQS_L0 MA_DATA33 AL25 D22 MB_DQS_H0 MB_DATA32 AP29
<12> DDR_A_DQS0# DDR_A_DQ34 <13> DDR_B_DQS0 DDR_B_DQ33
H27 MA_DQS_H1 MA_DATA34 AP26 B22 MB_DQS_L0 MB_DATA33 AP32
<12> DDR_A_DQS1 DDR_A_DQ35 <13> DDR_B_DQS0# DDR_B_DQ34
H26 MA_DQS_L1 MA_DATA35 AR27 D25 MB_DQS_H1 MB_DATA34 AT29
N27 MA_DQS_H2 MA_DATA36 AK26 B25 MB_DQS_L1 MB_DATA35 AU32
N26 MA_DQS_L2 MA_DATA37 AK24 F29 MB_DQS_H2 MB_DATA36 AN30
R21 MA_DQS_H3 MA_DATA38 AM24 F30 MB_DQS_L2 MB_DATA37 AP31
P21 MA_DQS_L3 MA_DATA39 AP27 K31 MB_DQS_H3 MB_DATA38 AR30
<12> DDR_A_DQS3# <13> DDR_B_DQS3 DDR_B_DQ39
AM26 MA_DQS_H4 K29 MB_DQS_L3 MB_DATA39 AT31
<12> DDR_A_DQS4 DDR_A_DQ40 <13> DDR_B_DQS3#
AM27 MA_DQS_L4 MA_DATA40 AM23 AR29 MB_DQS_H4
AN24 MA_DQS_H5 MA_DATA41 AM21 AR31 MB_DQS_L4 MB_DATA40 AU29
AN25 MA_DQS_L5 MA_DATA42 AR25 AW30 MB_DQS_H5 MB_DATA41 AV30
AU23 MA_DQS_H6 MA_DATA43 AU27 AW29 MB_DQS_L5 MB_DATA42 BB30
AT23 MA_DQS_L6 MA_DATA44 AL22 BC25 MB_DQS_H6 MB_DATA43 BA28
AV20 MA_DQS_H7 MA_DATA45 AL21 BA25 MB_DQS_L6 MB_DATA44 AU30
AW20 MA_DQS_L7 MA_DATA46 AP24 BC22 MB_DQS_H7 MB_DATA45 AU31
V24 RSVD_41 MA_DATA47 AP23 BA22 MB_DQS_L7 MB_DATA46 AY32
<13> DDR_B_DQS7# DDR_B_DQ47
V23 RSVD_40 N31 RSVD_20 MB_DATA47 AY29
AW26 DDR_A_DQ48 N29
MA_DATA48 RSVD_18
AD25 AV25 DDR_A_DQ49 BA27 DDR_B_DQ48
MA_CLK_H0 MA_DATA49 MB_DATA48
<12> DDR_A_CLK0 DDR_A_DQ50 DDR_B_DQ49
AD24 MA_CLK_L0 MA_DATA50 AV22 AC31 MB_CLK_H0 MB_DATA49 BC27
<12> DDR_A_CLK0# DDR_A_DQ51 <13> DDR_B_CLK0 DDR_B_DQ50
AE26 MA_CLK_H1 MA_DATA51 AW22 AD30 MB_CLK_L0 MB_DATA50 BA24
DDR_A_DQ52 <13> DDR_B_CLK0# DDR_B_DQ51
AE27 MA_CLK_L1 MA_DATA52 AU26 AD29 MB_CLK_H1 MB_DATA51 BC24
DDR_A_DQ53 <13> DDR_B_CLK1 DDR_B_DQ52
MA_DATA53 AV27 AD31 MB_CLK_L1 MB_DATA52 BD28
DDR_A_DQ54 <13> DDR_B_CLK1# DDR_B_DQ53
MA_DATA54 AW23 AE30 MB_CLK_H2 MB_DATA53 BB27
AT22 DDR_A_DQ55 AE32 BB25 DDR_B_DQ54
MA_DATA55 MB_CLK_L2 MB_DATA54
AF29 BD25 DDR_B_DQ55
MB_CLK_H3 MB_DATA55
AW21 DDR_A_DQ56 AF31
MA_DATA56 MB_CLK_L3
AG21 AU21 DDR_A_DQ57 BC23 DDR_B_DQ56
MA_CS_L0 MA_DATA57 MB_DATA56
<12> DDR_A_CS0# DDR_A_DQ58 DDR_B_DQ57
AJ27 MA_CS_L1 MA_DATA58 AP21 AJ31 MB0_CS_L0 MB_DATA57 BB22
DDR_A_DQ59 <13> DDR_B_CS0# DDR_B_DQ58
MA_DATA59 AN20 AM31 MB0_CS_L1 MB_DATA58 BC21
DDR_A_DQ60 <13> DDR_B_CS1# DDR_B_DQ59
B MA_DATA60 AR22 AJ29 MB1_CS_L0 MB_DATA59 BD20 B
AN22 DDR_A_DQ61 AM29 BB23 DDR_B_DQ60
MA_DATA61 MB1_CS_L1 MB_DATA60
AT20 DDR_A_DQ62 BA23 DDR_B_DQ61
MA_DATA62 MB_DATA61
AR20 DDR_A_DQ63 BB21 DDR_B_DQ62
MA_DATA63 MB_DATA62
Y23 BA21 DDR_B_DQ63
MA_CKE0 MB_DATA63
<12> DDR_A_CKE0
Y26 MA_CKE1 RSVD_34 T24 U29 MB0_CKE0
<13> DDR_B_CKE0
RSVD_35 T25 T30 MB0_CKE1 RSVD_17 M31
<13> DDR_B_CKE1
RSVD_51 W25 V32 MB1_CKE0 RSVD_19 N30
RSVD_52 W27 U31 MB1_CKE1 RSVD_26 P31
AG24 MA_ODT0 RSVD_27 R26 RSVD_29 R32
<12> DDR_A_ODT0
AJ22 MA_ODT1 RSVD_28 R27 AL31 MB0_ODT0 RSVD_16 M30
<13> DDR_B_ODT0
RSVD_43 V27 AM32 MB0_ODT1 RSVD_15 M29
<13> DDR_B_ODT1
RSVD_42 V26 AL29 MB1_ODT0 RSVD_25 P30
AM30 MB1_ODT1 RSVD_24 P29
AA25 MA_ALERT_L
<12> DDR_A_ALERT# DDR_A_PAR
MA_PAROUT AF24 DDR_A_PAR <12>
W30 MB_ALERT_L
DDR_A_EVENT# <13> DDR_B_ALERT# DDR_B_PAR
AE24 MA_EVENT_L MB_PAROUT AG31
DDR_B_EVENT# DDR_B_PAR <13>
Y24 MA_RESET_L AG29 MB_EVENT_L
<12> DDR_A_RST# <13> DDR_B_EVENT#
FP5 REV 0.90 T31 MB_RESET_L
<13> DDR_B_RST#
PART 1 OF 13 FP5 REV 0.90
FP5_BGA1140~D PART 9 OF 13
@ FP5_BGA1140~D
@
EVENT# pull high
+1.2V
DDR_B_RST# 1 2
CC97 @ESD@
A 100P_0402_50V8J A
RC1 1 2 1K_0402_5% DDR_B_EVENT#
RC2 1 OBR@ 2 1K_0402_5% DDR_A_EVENT#
ESD
FP5 DDR4 MEMORY I/F
Custom 0.4
5 4 3 2 1
5 4 3 2 1
Main Func = CPU
UC1B @
D PCIE D
P8 P_GFX_RXP0 P_GFX_TXP0 N1
P9 P_GFX_RXN0 P_GFX_TXN0 N3
N6 P_GFX_RXP1 P_GFX_TXP1 M2
N7 P_GFX_RXN1 P_GFX_TXN1 M4
M8 P_GFX_RXP2 P_GFX_TXP2 L2
M9 P_GFX_RXN2 P_GFX_TXN2 L4
L6 P_GFX_RXP3 P_GFX_TXP3 L1
L7 P_GFX_RXN3 P_GFX_TXN3 L3
K11 P_GFX_RXP4 P_GFX_TXP4 K2

J11 P_GFX_RXN4 P_GFX_TXN4 K4
H6 P_GFX_RXP5 P_GFX_TXP5 J2
H7 P_GFX_RXN5 P_GFX_TXN5 J4
G6 P_GFX_RXP6 P_GFX_TXP6 H1
F7 P_GFX_RXN6 P_GFX_TXN6 H3
G8 P_GFX_RXP7 P_GFX_TXP7 H2
C C
F8 P_GFX_RXN7 P_GFX_TXN7 H4
PCIE_ARX_DTX_P0 N10 P_GPP_RXP0 P_GPP_TXP0 N2 PCIE_ATX_DRX_P0 CC1 1 2 0.22U_0402_6.3V6K PCIE_ATX_C_DRX_P0

PCIE_ARX_DTX_N0 N9 P_GPP_RXN0 P_GPP_TXN0 P3 PCIE_ATX_DRX_N0 CC2 1 2 0.22U_0402_6.3V6K PCIE_ATX_C_DRX_N0
PCIE_ARX_DTX_P1 L10 P_GPP_RXP1 P_GPP_TXP1 P4 PCIE_ATX_DRX_P1 CC3 1 2 0.22U_0402_6.3V6K PCIE_ATX_C_DRX_P1

PCIE_ARX_DTX_N1 L9 P_GPP_RXN1 P_GPP_TXN1 P2 PCIE_ATX_DRX_N1 CC4 1 2 0.22U_0402_6.3V6K PCIE_ATX_C_DRX_N1
PCIE_ARX_DTX_P2 L12 P_GPP_RXP2 P_GPP_TXP2 R3 PCIE_ATX_DRX_P2 CC5 1 2 0.22U_0402_6.3V6K PCIE_ATX_C_DRX_P2

PCIE_ARX_DTX_N2 M11 P_GPP_RXN2 P_GPP_TXN2 R1 PCIE_ATX_DRX_N2 CC6 1 2 0.22U_0402_6.3V6K PCIE_ATX_C_DRX_N2
PCIE_ARX_DTX_P3 P12 P_GPP_RXP3 P_GPP_TXP3 T4 PCIE_ATX_DRX_P3 CC7 1 2 0.22U_0402_6.3V6K PCIE_ATX_C_DRX_P3

PCIE_ARX_DTX_N3 P11 P_GPP_RXN3 P_GPP_TXN3 T2 PCIE_ATX_DRX_N3 CC8 1 2 0.22U_0402_6.3V6K PCIE_ATX_C_DRX_N3
PCIE_ARX_DTX_P4 V6 P_GPP_RXP4 P_GPP_TXP4 W2 PCIE_ATX_DRX_P4 CC9 1 2 0.1U_0201_10V6K

<20> PCIE_ARX_DTX_P4 PCIE_ARX_DTX_N4 PCIE_ATX_DRX_N4 CC10 1 PCIE_ATX_C_DRX_P4 <20>
CardReader V7 P_GPP_RXN4 P_GPP_TXN4 W4 2 0.1U_0201_10V6K PCIE_ATX_C_DRX_N4 <20> CardReader
<20> PCIE_ARX_DTX_N4
PCIE_ARX_DTX_P5 T8 P_GPP_RXP5 P_GPP_TXP5 W3 PCIE_ATX_DRX_P5 CC11 1 2 0.1U_0201_10V6K
<16> PCIE_ARX_DTX_P5 PCIE_ARX_DTX_N5 PCIE_ATX_DRX_N5 CC12 1 PCIE_ATX_C_DRX_P5 <16>
WLAN T9 P_GPP_RXN5 P_GPP_TXN5 V2 2 0.1U_0201_10V6K PCIE_ATX_C_DRX_N5 <16> WLAN
<16> PCIE_ARX_DTX_N5
B SATA_ARX_DTX_P0 R6 P_GPP_RXP6/SATA_RXP0 P_GPP_TXP6/SATA_TXP0 V1
SATA_ATX_DRX_P0 B
<17> SATA_ARX_DTX_P0 SATA_ARX_DTX_N0 SATA_ATX_DRX_N0 SATA_ATX_DRX_P0 <17>
NGFF_SATA R7 P_GPP_RXN6/SATA_RXN0 P_GPP_TXN6/SATA_TXN0V3 SATA_ATX_DRX_N0 <17> NGFF_SATA
<17> SATA_ARX_DTX_N0
SATA_ARX_DTX_P1 R9 P_GPP_RXP7/SATA_RXP1 P_GPP_TXP7/SATA_TXP1 U2
SATA_ATX_DRX_P1
<19> SATA_ARX_DTX_P1 SATA_ARX_DTX_N1 SATA_ATX_DRX_N1 SATA_ATX_DRX_P1 <19>
SATA HDD R10 P_GPP_RXN7/SATA_RXN1 P_GPP_TXN7/SATA_TXN1U4 SATA_ATX_DRX_N1 <19> SATA HDD
<19> SATA_ARX_DTX_N1
FP5 REV 0.90

PART 2 OF 13
FP5_BGA1140~D PCIE_ATX_C_DRX_P[0..3]
PCIE_ATX_C_DRX_P[0..3] <17>
PCIE_ATX_C_DRX_N[0..3]
Main_SSD
PCIE_ARX_DTX_P[0..3] PCIE_ATX_C_DRX_N[0..3] <17>
<17> PCIE_ARX_DTX_P[0..3]
Main_SSD PCIE_ARX_DTX_N[0..3]
<17> PCIE_ARX_DTX_N[0..3]
A A

FP5 PCIE/UMI
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Re v
Custom 0.4
5 4 3 2 1
A B C D E
Main Func = CPU

+1.8VS
DP0: eDP
DP1: HDMI
DP2: N/A QC1
2
DP3: N/A Gate
1 +3VS
Drain ENBKL <14,28>
UC1C @
ENBKL_R 3
DISPLAY/SVI2/JTAG/TEST
C8 G15 ENBKL_R Source
<14> EDP_TXP0 DP0_TXP0 DP_BLON
<14> EDP_TXN0 A8 DP0_TXN0 DP_DIGON F15 ENVDD +LCDVDD_CONN PWR switch enable pin VIH=1.2V LBSS139WT1G_SC70-3
L14 INVTPWM_R ENVDD <14> 1 2 4.7K_0402_5%
DP_VARY_BL SB00001GC00 INVTPWM RC4
1 <14> EDP_TXP1 D8 DP0_TXP1 ENBKL RC5 1 2 2.2K_0402_5% 1
<14> EDP_TXN1 B8 DP0_TXN1 DP0_AUXP D9 EDP_AUXP <14>
eDP DP0_AUXN B9 eDP
EDP_AUXN <14> +1.8VS
B6 DP0_TXP2 DP0_HPD C10
C7 EDP_HPD <14>
DP0_TXN2
DP1_AUXP G11 APU_DP1_CTRL_CLK <15>
5
C6 F11 ENBKL_R RC6 1 2 100K_0402_5%
DP0_TXP3 DP1_AUXN
APU_DP1_CTRL_DAT <15> HDMI
D6 DP0_TXN3 DP1_HPD G13 1 ENVDD RC8 1 2 100K_0402_5%
P
APU_DP1_HPD <15> NC INVTPWM_R
4 RC9 1 2 100K_0402_5%
INVTPWM_R Y INVTPWM <14> EDP_HPD
<15> APU_DP1_P0 E6 DP1_TXP0 DP2_AUXP J12 2 RC10 1 2 100K_0402_5%
A
G
<15> APU_DP1_N0 D5 DP1_TXN0 DP2_AUXN H12
DP2_HPD K13 UC6
3
<15> APU_DP1_P1 E1 DP1_TXP1 74AUP1G07GW_SC70-5
<15> APU_DP1_N1 C1 DP1_TXN1 DP3_AUXP J10 SA00005U600
HDMI DP3_AUXN H10
<15> APU_DP1_P2 F3 DP1_TXP2 DP3_HPD K8
<15> APU_DP1_N2 E4 DP1_TXN2
K15 DP_STEREOSYNC +1.8VS
DP_STEREOSYNC
<15> APU_DP1_P3 F4 DP1_TXP3
<15> APU_DP1_N3 F2 DP1_TXN3 RSVD_4 F14

RSVD_3 F12 QC4
2
F10 Gate
RSVD_2
1 INVTPWM
Drain
INVTPWM_R 3
Source
LBSS139WT1G_SC70-3
SB00001GC00
@
AP14 APU_TEST4
TEST4 T1
AN14 APU_TEST5
TEST5 T2
F13 APU_TEST6 +1.8VS
TEST6 T3
G18 APU_TEST14
TEST14 T4
H19 APU_TEST15 APU_TEST14 RC11 1 @ 2 10K_0402_5%
2 TEST15 T5 2
F18 APU_TEST16 APU_TEST15 RC12 1 @ 2 10K_0402_5%
TEST16 T6
F19 APU_TEST17 APU_TEST16 RC13 1 @ 2 10K_0402_5%
TEST17 T7 APU_TEST17 RC14 1 @ 2 10K_0402_5%
W24 APU_TEST31
TEST31 T8
+1.8VS
AR11 APU_TEST41
TEST41 T9
APU_TDI AU2 AJ21 APU_TEST470 APU_TEST31 RC15 1 @ 2 1K_0402_5%
TDI TEST470 T10
APU_TDO AU4 AK21 APU_TEST471 RC16 1 @ 2 1K_0402_5%
TDO TEST471 T11
APU_TCK AU1 TCK
APU_TMS AU3 TMS
APU_TRST# AV3 TRST_L
APU_DBREQ# AW3 DBREQ_L
+1.8VS
APU_RST# AW4 V4 SMU_ZVDDP

RESET_L SMU_ZVDD
APU_PWRGD AW2 DP_STEREOSYNC RC17 1 2 1K_0402_5%
<38> APU_PWRGD PWROK
T12 RC18 1 @ 2 1K_0402_5%

<26,28> EC_SMB_CK2 H14 SIC CORETYPE AW11 CORETYPE T13
J14 SID T14
<26,28> EC_SMB_DA2 APU_ALERT# J15 ALERT_L
RC21 1 @ 2 0_0402_5% THERMTRIP# AP16 AN11 APU_VDDP_RUN_FB_H
<28> EC_THERMTRIP# THERMTRIP_L VDDP_SENSE APU_VDDP_RUN_FB_H <37>
<28,38> H_PROCHOT# L19 PROCHOT_L VDDCR_SOC_SENSE J19 APU_VDDSOC_SEN <38>
VDDCR_SENSE K18 APU_VDDCR_SEN <38> +0.8VS
T15
<38> APU_SVC F16 SVC0
H16 J18 APU_VDD_RUN_FB_L
<38> APU_SVD SVD0 VSS_SENSE_A APU_VDD_RUN_FB_L <38>
J16 FP5 REV 0.90 AM11 APU_VDDP_RUN_FB_L SMU_ZVDDP RC22 1 2 196_0402_1%
<38> APU_SVT SVT0 VSS_SENSE_B APU_VDDP_RUN_FB_L <37>
PART 3 OF 13
FP5_BGA1140~D T16 +3VALW
CORETYPE RC23 1 @ 2 1K_0402_5%
3 3
+3VS
+1.8VS
HDT+ (debug + HDT@)

5
RC24 1 2 300_0402_5% APU_RST#

RC25 1 2 300_0402_5% APU_PWRGD 1
P
NC 4 APU_RST#
2 Y
<28> APU_RST#_EC A
G
+1.8VALW +1.8VALW
UC22
3
74AUP1G07GW_SC70-5
+3VS SA00007WE00 JHDT1
@ 1 2 APU_TCK APU_TRST# RHDT1 1 HDT@ 2 1K_0402_5%
1 2 APU_TCK RHDT2 1 HDT@ 2 1K_0402_5%
RC31 1 2 1K_0402_5% APU_ALERT# 3 4 APU_TMS APU_TMS RHDT3 1 HDT@ 2 1K_0402_5%
RC28 1 2 1K_0402_5% H_PROCHOT# RC111 2 @ 1 0_0402_5% 3 4 APU_TDI RHDT4 1 HDT@ 2 1K_0402_5%
RC29 1 2 1K_0402_5% THERMTRIP# 5 6 APU_TDI APU_DBREQ# RHDT5 1 HDT@ 2 1K_0402_5%
5 6
7 8 APU_TDO
7 8
APU_TRST# RHDT61 HDT@ 2 33_0402_5% APU_TRST#_R 9 10 APU_PWRGD
RC30 1 @ 2 220_0402_5% APU_PWRGD

Reserve for sequence tuning RHDT71 HDT@ 2 10K_0402_5% 11
9 10
12 APU_RST# @
11 12 APU_TDI CHDT1 1 2 0.01U_0402_16V7K
RHDT81 HDT@ 2 10K_0402_5% 13 14
13 14 HDT@
RHDT91 HDT@ 2 10K_0402_5% 15 16 APU_DBREQ# APU_DBREQ# CHDT2 1 2 0.01U_0402_16V7K
15 16
17 18 HDT@
17 18 APU_TRST# CHDT3 1 2 0.01U_0402_16V7K
19 20
19 20
ESD SAMTE_ASP-136446-07-B
4 DC021004270 4
ESD@ CC17 1 2 100P_0402_50V8J H_PROCHOT# ME@
ESD@ CC18 1 2 100P_0402_50V8J APU_PWRGD
ESD@ CC19 1 2 100P_0402_50V8J APU_RST#

FP5 DISP/MISC/HDT
Custom 0.4
A B C D E
A B C D E
Main Func = CPU
C
a
p
a
c
i
t
y
D
e
s
c
r
i
p
t
i
o
n
X
7
6
P
A
R
T
N
U
M
B
E
R
R
1
P
A
R
T
N
U
M
B
E
R
R
3
( ) ( )
W
I
T
H
O
U
T
O
N
-
B
O
A
R
D
R
A
M
N 6
A 0
/
N 0
A 0
/
N 0
A 0
/
S
A
M
S
U
N
G
2
6
6
6
M
H
z
K
4
A
8
G
1
6
5
W
C
-
B
C
T
D
X
7
8
4
3
8
L
5
3
S
A
0
0
B
6
F
0
0
S S S
A A A
0 0 0
0 0 0 N N N N
B A B A A A A
6 R M
F D N
1 3 1
0 0 0
( ) +3VALW
M
I
C
R
O
N
2
6
6
6
M
H
z
M
T
4
0
A
5
1
2
M
1
6
L
Y
-
0
7
5
:
E
X
7
6
8
0
4
3
8
L
5
2
S
A
0
0
0
0
A
R
D
2
0
0 0
0 0 / / / /
F
u
n
c
t
i
o
n
M
OA
DG
EP 0 1
LI
I
D9
( ) _
O
6
H N N N N
Y /
N A A A A
I
X
2
6
6
6
M
H
z
H
5
A
N
8
G
6
N
C
J
R
-
V
K
C
X
7
6 N N N N
8
0 /
4 A /
3
8
L
5
1
S
A
0
0 N N N N
0
0 /
B A A
M
N
0
0
( )
( )
4
G
B
S
3
4
0
-
1
4
1 1
S
3
4
0
-
1
5
/ / /
A /
/ /
2
+1.8VALW
RC37 RC38 RC39
A /
A A
10K_0402_5% 10K_0402_5% 10K_0402_5%
X76RAM@ X76RAM@ X76RAM@
/
+3VS
1
RC36 1 2 22K_0402_5% MEM_ID0
EC_RSMRST# <28> MEM_ID1
MEM_ID2
A
G
P
I
O
1
1
A
G
P
I
O
9
A
G
P
I
O
6
1
C
a
p
a
c
i
t
y
D
e
s
c
r
i
p
t
i
o
n
2
CC22
M
E
M
I
D
2
M
E
M
I
D
1
M
E
M
I
D
0
0.1U_0201_10V6K RC112
_ _ _
2
10K_0402_5%
W N N N N S M H
T /
I
H
O
U
T
O
N
-
B
O
A
R
D
R
A
M
0 0 0 0 1 1 1 1
0 0 1 1 0 0 1 1
0 1 0 1 0 1 0 1
2 RC42 RC41 RC43 15@
10K_0402_5% 10K_0402_5% 10K_0402_5%
1
A A
X76RAM@ X76RAM@ X76RAM@
RC41 NO_OBR@ MODEL_ID
1
/ /
10K_0402_5%
A A
RC42 NO_OBR@
4
G
B
10K_0402_5%
/ A I
ESD@
EC_RSMRST#
2
CC23 1 2 100P_0402_50V8J RC43 NO_OBR@
M C N
S R
U O X
N N 2
G 2 6
2 6
6 6 M
6 M H
6 H z
M
H
z
K T
4 4
A 0
8 A
G 1 N
1 2 C
6 M J
5 1 R
W 6 -
C L
- -
B
C 0
T 7
D 5
10K_0402_5% RC115
@ESD@
SYS_RESET# ( ) 10K_0402_5%
M 5
Y C
:
E
CC24 1 2 100P_0402_50V8J
No On Board RAM Straps (NO_OBR@) 14@
( )
1
Y
I
6
6
H
A
N
8
G
6
V
K
( )
ESD ON BOARD RAM ID
+3VALW
F
u
n
c
t
i
o
n
M
I
CA
SP
EI
L8
E4
C
T
PCIE_DET
RC45 1 2 10K_0402_5% UC1D @ _
G
O
PBTN_OUT#
RC47 1 2 10K_0402_5%
APU_PCIE_WAKE#
ACPI/AUDIO/I2C/GPIO/MISC ( )
1 2
M M
I
C I
0 1
2 RC48 1 @ 2 10K_0402_5% 2
RC61 1 2 2.2K_0402_5% I2C_3_SCL AW12
EGPIO41/SFI_S5_EGPIO41
I2C_3_SDA
C
RC62 1 2 2.2K_0402_5% AGPIO39/SFI_S5_AGPIO39 AU12
RC34 1 2 33_0402_5% APU_PCIE0_RST# BD5 PCIE_RST0_L/EGPIO26
APU_PCIE_RST#_R 1 2 33_0402_5% APU_PCIE1_RST# BB6
RC35 @ PCIE_RST1_L/EGPIO27 I2C0_SCL/SFI0_I2C_SCL/EGPIO151AR13 T22
EC_RSMRST# AT16 RSMRST_L I2C0_SDA/SFI0_I2C_SDA/EGPIO152AT13 T21
Not Implemented Need Pull down by SW
1 2 1K_0402_5% HDA_RST# PBTN_OUT# AR15 +3VS
RC50 CC21 1 2 CC20 <28> PBTN_OUT# PWR_BTN_L/AGPIO0 I2C1_SCL/SFI1_I2C_SCL/EGPIO149AN8 T23
1 2 10K_0402_5% HDA_SDIN0 APU_FCH_PWRGD_R AV6
RC53 @ PWR_GOOD I2C1_SDA/SFI1_I2C_SDA/EGPIO150AN9 T24
HDA_BIT_CLK SYS_RESET#
150P_0402_50V8J
150P_0402_50V8J
RC54 1 @ 2 10K_0402_5% @ AP10 SYS_RESET_L/AGPIO1
Not Implemented Need Pull down by SW
APU_PCIE_WAKE# AV11 I2C_2_SCL_R I2C_2_SCL
WAKE_L/AGPIO2 I2C2_SCL/EGPIO113/SCL0 BC20 RC117 1 @ 2 0_0402_5% I2C_2_SCL <13>
2 1 I2C_2_SDA_R I2C_2_SDA
I2C2_SDA/EGPIO114/SDA0 BA20 RC118 1 @ 2 0_0402_5% I2C_2_SDA <13>
PM_SLP_S3#
2
<28> PM_SLP_S3# AV13 SLP_S3_L
PM_SLP_S5# AT14 I2C_3_SCL
<28,33,36> PM_SLP_S5# SLP_S5_L I2C3_SCL/AGPIO19/SCL1 AM9 RC113
I2C_3_SDA
I2C3_SDA/AGPIO20/SDA1 AM10 10K_0402_5%
AR8 S0A3_GPIO/AGPIO10 MULTI_MIC@
PSA_I2C_SCL L16
1
+3VS AT10 AC_PRES/AGPIO23 PSA_I2C_SDA M16
AN6 LLB_L/AGPIO12
RC56 1 2 2.2K_0402_5% I2C_2_SCL MIC_SELECT
RC57 1 2 2.2K_0402_5% I2C_2_SDA AT15
AGPIO3
AW8 EGPIO42 AGPIO4/SATAE_IFDET AW10
AP9 PCIE_DET
AGPIO5/DEVSLP0 PCIE_DET <17>
MEM_ID0
2
AGPIO6/DEVSLP1 AU10
3.3VALW input
SATA_ACT_L/AGPIO130 AV15 RC116
10K_0402_5%
3.3VALW input AU7 MEM_ID1 SINGLE_MIC@
AGPIO9
3.3VALW input AGPIO40 AU6
1
3.3VALW input AW13 MODEL_ID
AGPIO69
3.3VS input AGPIO86 AW15
HDA_BIT_CLK AR2 AZ_BITCLK/TDM_BCLK_MIC
RC67 1 EMI@ 2 33_0402_5% HDA_BIT_CLK HDA_SDIN0 AP7
<21> HDA_BITCLK_AUDIO HDA_SDOUT <21> HDA_SDIN0 AZ_SDIN0/CODEC_GPI
RC68 1 2 33_0402_5% AP1 AZ_SDIN1/SW_DATA1B/TDM_BCLK_PLAYBACK INTRUDER_ALERT AU14
<21> HDA_SDOUT_AUDIO HDA_SYNC HDA_SPKR
RC69 1 2 33_0402_5% check list discuss unconnected if no used AP4 AZ_SDIN2/SW_DATA2/TDM_DATA_PLAYBACK 3.3VS Output SPKR/AGPIO91 AU16 HDA_SPKR <21>
<21> HDA_SYNC_AUDIO HDA_RST# MEM_ID2
AP3 AZ_RST_L/SW_DATA1A/SW_DATA3/TDM_DATA_MIC BLINK/AGPIO11 AV8
HDA_SYNC AR4
RC70 1
RC71 1
2 1K_0402_5%
2 1K_0402_5% EMI HDA_SDOUT AR3
AZ_SYNC/TDM_FRM_MIC
AZ_SDOUT/TDM_FRM_PLAYBACK
3.3VS input
3.3VS input
GENINT1_L/AGPIO89
GENINT2_L/AGPIO90
AW16
BD15
AT2 SW_MCLK/TDM_BCLK_BT
AT4 SW_DATA0/TDM_DOUT_BT
AR6 AR18 MIC_SELECT +1.8VALW +3VALW
AGPIO7/FCH_ACP_I2S_SDIN_BT FANIN0/AGPIO84
3 AP6 AGPIO8/FCH_ACP_I2S_LRCLK_BT FANOUT0/AGPIO85 AT18 TP_INT# <27>
3
FP5 REV 0.90
PART 4 OF 13
FP5_BGA1140~D
2
RC59 RC60
10K_0402_5% 10K_0402_5%
1
+3VALW
<9> APU_SPI_CLK_R
SYS_RESET#
+3VALW +3VALW
1
+3VS
1
@ RC65 RC66
1
CC26 2K_0402_5% 2K_0402_5%

0.1U_0201_10V6K @ @
QC3B RC55 2
2
5
2N7002KDW 2N SC88-6 8.2K_0402_5%

5
SB00000EO00 UC7
2
I2C_3_SCL
5
4 3 1
STRAPS
P
<27> I2C_3_SCL_R NC APU_FCH_PWRGD_R APU_PCIE_RST#_R

4 2
P
SYS_PWRGD_EC Y B
2
<28> SYS_PWRGD_EC 2 4 APU_PCIE_RST# <16,17,20>

A Y
G
1
I2C_3_SDA A
G
1
<27> I2C_3_SDA_R 1 6 74AUP1G07GW_SC70-5 UC8
3
SA00007WE00 MC74VHC1G08DFT2G SC70 5P
3
QC3A @ RC72 SA00000OH00 STRAPS
2N7002KDW 2N SC88-6 10K_0402_5% @ DEFINITION
SB00000EO00
2
RC64 2 @ 1 0_0402_5%
1 : Use 48MHZ Crystal Clock and Generate both internal
RC73 1 @ 2 0_0402_5% and external clocks (Default)
SPI_CLK
0 : Use 100MHZ PCIE clock as reference clock
and generate internal clocks only
1 : Normal reset mode (Default)

SYS_RST# 0 : short reset mode
4 4

2018/11/05 2019/11/05 Title
Issued Date Deciphered Date
FP4 GPIO/AZ/MISC/STRAPS
Custom 0.4
A B C D E
A B C D E
Main Func = CPU
48MHz CRYSTAL
UC1E @
CLK/LPC/EMMC/SD/SPI/eSPI/UART
1 1
AV18 CLK_REQ0_L/SATA_IS0_L/SATA_ZP0_L/AGPIO92
48M_X2_R RC74 1 EMI@ 2 33_0402_5% 48M_X2 CLKREQ_SSD1# AN19
<17> CLKREQ_SSD1# CLKREQ_SD#
CLK_REQ1_L/AGPIO115
<20> CLKREQ_SD# AP19 CLK_REQ2_L/AGPIO116

2 1 48M_X1_R RC76 1 EMI@ 2 33_0402_5% 48M_X1 CLKREQ_WLAN# AT19
<16> CLKREQ_WLAN# CLK_REQ3_L/SATA_IS1_L/SATA_ZP1_L/EGPIO131
RC75 1M_0402_5% AU19 CLK_REQ4_L/OSCIN/EGPIO132
AW18 CLK_REQ5_L/EGPIO120
APU_BT_OFF# AW19
<16> APU_BT_OFF# CLK_REQ6_L/EGPIO121
2
2 1
1
EMI EGPIO70/SD_CLK BD13
T17 Not Implemented Need Pull down by SW
LPC_PD_L/SD_CMD/AGPIO21BB14 LPCPD#
AK1 LPC_AD0_R
GPP_CLK0P LAD0/SD_DATA0/EGPIO104 BB12 RC77 2 1 10_0402_5% LPC_AD0 <28>
AK3 LPC_AD1_R
GPP_CLK0N LAD1/SD_DATA1/EGPIO105 BC11 RC78 2 1 10_0402_5% LPC_AD1 <28>
LPC_AD2_R
YC1 LAD2/SD_DATA2/EGPIO106 BB15 RC79 2 1 10_0402_5% LPC_AD2 <28>
CLK_PCIE_SSD1 AM2 LPC_AD3_R
48MHZ_8PF_7V48000010 <17> CLK_PCIE_SSD1 GPP_CLK1P LAD3/SD_DATA3/EGPIO107 BC15 RC80 2 1 10_0402_5% LPC_AD3 <28>
SJ10000JP00 CLK_PCIE_SSD1# AM4 BA15 LPC_CLK0 RC81 2 1 22_0402_5%
Main_SSD <17> CLK_PCIE_SSD1# GPP_CLK1N LPCCLK0/EGPIO74 LPC_CLK0_EC <28>
LPC_CLKRUN_L/AGPIO88BC13 CLKRUN# CLKRUN# <28>
CLK_PCIE_SD AM1
Vendor Tuning Value was 3.9pF, Lack Source <20> CLK_PCIE_SD GPP_CLK2P LPCCLK1/EGPIO75 BB13 Not Implemented Need Pull down by SW
3 4 CLK_PCIE_SD# AM3
CardReader <20> CLK_PCIE_SD# GPP_CLK2N SERIRQ/AGPIO87 BC12 SERIRQ <28>
3 4
1 1 LFRAME_L/EGPIO109 BA12 LPC_FRAME# <28>
CLK_PCIE_WLAN AL2
<16> CLK_PCIE_WLAN CLK_PCIE_WLAN#
GPP_CLK3P
LPC_RST#
CC27 CC28 WLAN <16> CLK_PCIE_WLAN# AL4 GPP_CLK3N LPC_RST_L/SD_WP_L/AGPIO32BD11 RC82 2 1 33_0402_5% LPC_RST#_R <28>
4.7P_0402_50V8C 4.7P_0402_50V8C BA11 LPC_RST# RC83 2 @ 1 100K_0402_5%
AGPIO68/SD_CD
2 SE07147AB80 2 SE07147AB80 AN2 GPP_CLK4P BA13
LPC_PME_L/SD_PWR_CTRL/AGPIO22 EC_SCI# <28>
AN4 GPP_CLK4N CC29 2 1 150P_0402_50V8J
AN3 GPP_CLK5P
AP2 GPP_CLK5N SPI_ROM_REQ/EGPIO67 BC8
SPI_ROM_GNT/AGPIO76 BB8
AJ2 GPP_CLK6P
AJ4 ESPI_RESET_L/KBRST_L/AGPIO129BB11
+3VS
GPP_CLK6N KB_RST# <28>
ESPI_ALERT_L/LDRQ0_L/EGPIO108BC6
AJ3 48M_OSC
BB7 APU_SPI_CLK RC84 2 EMI@ 1 10_0402_1% KB_RST# RC85 2 @ 1 10K_0402_5%
32.768KHz CRYSTAL 48M_X1 BB3 X48M_X1
SPI_CLK/ESPI_CLK
SPI_DI/ESPI_DATA BA9
SPI_DO BB10
APU_SPI_MISO
APU_SPI_MOSI
APU_SPI_CLK_R <8>
32K_X1
SPI_WP_L/ESPI_DAT2 BA10
SPI_HOLD_L/ESPI_DAT3 BC10
APU_SPI_WP#
APU_SPI_HOLD# EMI
APU_SPI_CS1#
SPI_CS1_L/EGPIO118 BC9
2 1 32K_X2 48M_X2 BA5 X48M_X2 SPI_CS2_L/ESPI_CS_L/AGPIO30BA8 Not Implemented Need Pull down by SW
RC86 20M_0402_5% SPI_CS3_L/AGPIO31 BA6
SPI_TPM_CS_L/AGPIO29 BD8
2 2
AF8 RSVD_76
1 2 AF9 UART_0_ARXD_DTXD
RSVD_77 UART0_RXD/EGPIO136 BA16 UART_0_ARXD_DTXD <16>
YC2 BB18 UART_0_ATXD_DRXD
UART0_TXD/EGPIO138
32.768KHZ_9PF_X1A000141000200 BC17 UART_0_ATXD_DRXD <16>
UART0_RTS_L/UART2_RXD/EGPIO137 T18
SJ10000PW00 UART0_CTS_L/UART2_TXD/EGPIO135BA18 T19
2 1 22 +-5% 0402 RTC_CLK AW14
1 1 <16> RTC_CLK_R RC87 @ RTCCLK UART0_INTR/AGPIO139 BD18 T20
CC30 CC31
10P_0402_50V8J 10P_0402_50V8J
32K_X1 AY1 X32K_X1 EGPIO141/UART1_RXD BC18
2 2 EGPIO143/UART1_TXD BA17
BC16 SSD_RST#
EGPIO142/UART1_RTS_L/UART3_RXD
SSD_RST# <17>
EGPIO140/UART1_CTS_L/UART3_TXDBB19
32K_X2 AY4 BB16 APU_WL_OFF#
X32K_X2 AGPIO144/UART1_INTR
APU_WL_OFF# <16>
FP5 REV 0.90

PART 5 OF 13
FP5_BGA1140~D
+3VS
RC89 2 1 10K_0402_5% CLKREQ_SSD1#

RC90 2 1 10K_0402_5% CLKREQ_SD#
RC91 2 1 10K_0402_5% CLKREQ_WLAN#
UC1J @
USB
3 3
USB20_P0 AE7 AD2 USB3_ATX_DRX_P0
<25> USB20_P0 USB20_N0
USB_0_DP0 USBC0_A2/USB_0_TXP0/DP3_TXP2
USB3_ATX_DRX_N0 USB3_ATX_DRX_P0 <24>
USB3.1 Type-C <25> USB20_N0 AE6 USB_0_DM0 AD4
USBC0_A3/USB_0_TXN0/DP3_TXN2 USB3_ATX_DRX_N0 <24>
USB20_P1 AG10 AC2 USB3_ARX_DTX_P0
<20> USB20_P1 USB20_N1
USB_0_DP1 USBC0_B11/USB_0_RXP0/DP3_TXP3
USB3_ARX_DTX_N0 USB3_ARX_DTX_P0 <24> TYPEC Right
USB3.1 Type-A Port 1 <20> USB20_N1 AG9 USB_0_DM1 AC4
USBC0_B10/USB_0_RXN0/DP3_TXN3 USB3_ARX_DTX_N0 <24>
USB20_P2 AF12
<20> USB20_P2 USB_0_DP2 USBC0_B2/DP3_TXP1 AF4
USB20_N2 AF11
USB3.1 Type-A Port 2 <20> USB20_N2 USB_0_DM2 USBC0_B3/DP3_TXN1 AF2
USB20_P3 AE10 USBC0_A11/DP3_TXP0 AE3

Camera
<14> USB20_P3
<14> USB20_N3
USB20_N3 AE9
USB_0_DP3
USB_0_DM3 USBC0_A10/DP3_TXN0AE1 SPI ROM (XMC)
USB20_P4 AJ12 AG3 USB3_ATX_DRX_P1 +1.8VALW
<22> USB20_P4 USB20_N4
USB_1_DP0 USB_0_TXP1
USB3_ATX_DRX_N1 USB3_ATX_DRX_P1 <20> +1.8VALW
USB2.0 Hub <22> USB20_N4 AJ11 USB_1_DM0 USB_0_TXN1 AG1 USB3_ATX_DRX_N1 <20>
Type-A left port1 UC2
USB20_P5 AD9 AJ9 USB3_ARX_DTX_P1 RC92 2 @ 1 10K_0402_5% APU_SPI_MOSI APU_SPI_CS1# 1 8
<16> USB20_P5 USB20_N5
USB_1_DP1 USB_0_RXP1
USB3_ARX_DTX_N1 USB3_ARX_DTX_P1 <20> APU_SPI_MISO APU_SPI_MISO CS# VCC 7 APU_SPI_HOLD#
NGFF_BT <16> USB20_N5 AD8 USB_1_DM1 USB_0_RXN1 AJ8 USB3_ARX_DTX_N1 <20> RC93 2 1 10K_0402_5% 2
RC94 2 1 10K_0402_5% APU_SPI_WP# APU_SPI_WP# 3 DO(IO1) HOLD#(IO3) 6 APU_SPI_CLK_R
USB3_ATX_DRX_P2 APU_SPI_HOLD# WP#(IO2) CLK 5 APU_SPI_MOSI 1
USB_0_TXP2 AG4 USB3_ATX_DRX_P2 <20> RC96 2 1 10K_0402_5% 4 CC32
AG2 USB3_ATX_DRX_N2 RC95 2 1 10K_0402_5% APU_SPI_CS1# GND DI(IO0) 0.1U_0201_10V6K
USB_0_TXN2 USB3_ATX_DRX_N2 <20>
Type-A left port2 S IC FL 64M XM25QU64AHIGT SOP 8P SPI ROM @
AG7 USB3_ARX_DTX_P2 SA0000BJU00 2
USB_0_RXP2
USB3_ARX_DTX_N2 USB3_ARX_DTX_P2 <20>
AM6 USBC_I2C_SCL USB_0_RXN2 AG6 USB3_ARX_DTX_N2 <20>
AM7 USBC_I2C_SDA AA2
USBC1_A2/USB_0_TXP3/DP2_TXP2
AA4
USBC1_A3/USB_0_TXN3/DP2_TXN2
RC97 2 @EMI@ 1 10_0402_5% APU_SPI_CLK
Y1
USBC1_B11/USB_0_RXP3/DP2_TXP3
+3VALW Y3
USBC1_B10/USB_0_RXN3/DP2_TXN3 1
CC33
USBC1_B2/DP2_TXP1 AC1 10P_0402_50V8J
USBC1_B3/DP2_TXN1 AC3 @EMI@
RC98 1 2 100K_0402_5% USB_OC0# USB_OC0# AK10 2
<20> USB_OC0# USB_OC0_L/AGPIO16
RC99 1 2 100K_0402_5% USB_OC1#
<20> USB_OC1#
USB_OC1# AK9
AL9
AL8
USB_OC1_L/AGPIO17
USB_OC2_L/AGPIO18
USBC1_A11/DP2_TXP0 AB2
USBC1_A10/DP2_TXN0AB4
EMI
USB_OC3_L/AGPIO24
AW7 AGPIO14/USB_OC4_L USB_1_TXP0 AH4
AT12 AGPIO13/USB_OC5_L USB_1_TXN0 AH2
Not Implemented Pull down by SW
USB_1_RXP0 AK7
USB_1_RXN0 AK6
4 FP5 REV 0.90
4
PART 10 OF 13
FP5_BGA1140~D

2018/11/05 2019/11/05 Title
FP5 SATA/CLK/USB/SPI
Custom 0.4
A B C D E
A B C D E
Main Func = CPU
+1.2V
+APU_CORE
+APU_CORE_SOC
UC1F @
1
All BU(on bottom side under SOC) Across VDDIO & VSS split. TDC :10A POWER TDC: 35A
1
EDC: 13A M15 VDDCR_SOC_1 VDDCR_1 G7 EDC: 45A

M18 VDDCR_SOC_2 VDDCR_2 G10
1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 M19 VDDCR_SOC_3 VDDCR_3 G12
22U_0603_6.3V6M
CC35
22U_0603_6.3V6M
CC36
22U_0603_6.3V6M
CC37
22U_0603_6.3V6M
CC38
22U_0603_6.3V6M
CC52
22U_0603_6.3V6M
CC39
22U_0603_6.3V6M
CC40
22U_0603_6.3V6M
CC41
22U_0603_6.3V6M
CC42
1U_0201_6.3V6M
CC43
1U_0201_6.3V6M
CC44
180P_0402_50V8J
CC45
180P_0402_50V8J
CC46
180P_0402_50V8J
CC47
.22U 6.3V K X5R 0402

CC48
.22U 6.3V K X5R 0402

CC49
.22U 6.3V K X5R 0402

CC50
.22U 6.3V K X5R 0402

CC51
N16 VDDCR_SOC_4 VDDCR_4 G14
N18 VDDCR_SOC_5 VDDCR_5 H8
N20 VDDCR_SOC_6 VDDCR_6 H11
2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 P17 VDDCR_SOC_7 VDDCR_7 H15
P19 VDDCR_SOC_8 VDDCR_8 K7
R18 VDDCR_SOC_9 VDDCR_9 K12
R20 VDDCR_SOC_10 VDDCR_10 K14
T19 VDDCR_SOC_11 VDDCR_11 L8
U18 VDDCR_SOC_12 VDDCR_12 M7
U20 VDDCR_SOC_13 VDDCR_13 M10
V19 VDDCR_SOC_14 VDDCR_14 N14
W18 VDDCR_SOC_15 VDDCR_15 P7
+1.2V W20 VDDCR_SOC_16 VDDCR_16 P10
Y19 VDDCR_SOC_17 VDDCR_17 P13
VDDCR_18 P15
TDC :6A T32 VDDIO_MEM_S3_1 VDDCR_19 R8
V28 VDDIO_MEM_S3_2 VDDCR_20 R14
+0.8VS +0.8VALW W28 VDDIO_MEM_S3_3 VDDCR_21 R16
W32 VDDIO_MEM_S3_4 VDDCR_22 T7
+1.8VS Y22 T10
+VDDP_ALW Y25
VDDIO_MEM_S3_5
VDDIO_MEM_S3_6
VDDCR_23
VDDCR_24 T13
Y28 VDDIO_MEM_S3_7 VDDCR_25 T15
AA20 VDDIO_MEM_S3_8 VDDCR_26 T17
AA23 VDDIO_MEM_S3_9 VDDCR_27 U14
RC101 1 @ 2 0_0402_5% VDDIO_AUDIO AA26 VDDIO_MEM_S3_10 VDDCR_28 U16
1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 AA28 VDDIO_MEM_S3_11 VDDCR_29 V13
22U_0603_6.3V6M
CC53
22U_0603_6.3V6M
CC54
1U_0201_6.3V6M
CC55
1U_0201_6.3V6M
CC56
1U_0201_6.3V6M
CC57
1U_0201_6.3V6M
CC58
1U_0201_6.3V6M
CC59
1U_0201_6.3V6M
CC60
1U_0201_6.3V6M
CC61
1U_0201_6.3V6M
CC62
180P_0402_50V8J
CC63
22U_0603_6.3V6M
CC64
1U_0201_6.3V6M
CC65
1U_0201_6.3V6M
CC66
1U_0201_6.3V6M
CC67
1 1 AA32 VDDIO_MEM_S3_12 VDDCR_30 V15
CC68 CC69 AC20 VDDIO_MEM_S3_13 VDDCR_31 V17
AC22 VDDIO_MEM_S3_14 VDDCR_32 W7
2 2 2 2 2 2 2 2 2 2 2 2 2 2 2
22U_0603_6.3V6M
1U_0201_6.3V6M
2 2 2 2
@
@
AD23 VDDIO_MEM_S3_17 VDDCR_35 W16
AD26 VDDIO_MEM_S3_18 VDDCR_36 Y8
AE20 VDDIO_MEM_S3_21 VDDCR_39 Y17
AE22 VDDIO_MEM_S3_22 VDDCR_40 AA7
AE25 AA10
BO BU AE28
VDDIO_MEM_S3_23
VDDIO_MEM_S3_24
VDDCR_41
VDDCR_42 AA14
AF23 VDDIO_MEM_S3_25 VDDCR_43 AA16
AF26 VDDIO_MEM_S3_26 VDDCR_44 AA18
AF28 VDDIO_MEM_S3_27 VDDCR_45 AB13
AF32 VDDIO_MEM_S3_28 VDDCR_46 AB15
+1.8VALW +1.8VS AG20 VDDIO_MEM_S3_29 VDDCR_47 AB17
+3VALW AG22 VDDIO_MEM_S3_30 VDDCR_48 AB19
+3VS AG25 VDDIO_MEM_S3_31 VDDCR_49 AC14
AG28 VDDIO_MEM_S3_32 VDDCR_50 AC16
AJ20 VDDIO_MEM_S3_33 VDDCR_51 AC18
AJ23 VDDIO_MEM_S3_34 VDDCR_52 AD7
1 1 1 1 1 1 AJ32 VDDIO_MEM_S3_37 VDDCR_55 AD15
CC70
CC71
CC72
CC73
C1
CC74
22U_0603_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
22U_0603_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1 1 1 1 1 1 AK28 VDDIO_MEM_S3_38 VDDCR_56 AD17

CC75
CC76
CC77
CC78
CC79
CC80
22U_0603_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
10U_0402_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
AL28 VDDIO_MEM_S3_39 VDDCR_57 AD19
AL32 VDDIO_MEM_S3_40 VDDCR_58 AE8
2 2 2 2 2 2
@
VDDCR_59 AE14
2 2 2 2 2 2 +3VS VDDIO_AUDIO TDC :0.2A AP12 VDDIO_AUDIO VDDCR_60 AE16
@
@ VDDCR_61 AE18
TDC :0.25A AL18 VDD_33_1 VDDCR_62 AF7
AM17 VDD_33_2 VDDCR_63 AF10
+1.8VS VDDCR_64 AF13
TDC :2A AL20 VDD_18_1 VDDCR_65 AF15
+1.8VALW AM19 VDD_18_2 VDDCR_66 AF17
AF19
3
BO BU BO BU TDC :0.5A AL19 VDD_18_S5_1
VDDCR_67
VDDCR_68 AG14 3
+3VALW AM18 VDD_18_S5_2 VDDCR_69 AG16
VDDCR_70 AG18
+0.8VALW TDC :0.25A AL17 VDD_33_S5_1 VDDCR_71 AH13
AM16 VDD_33_S5_2 VDDCR_72 AH15
VDDCR_73 AH17
TDC :1A AL14 VDDP_S5_1 VDDCR_74 AH19
AL15 AJ7
Note : Cap placemet need to close APU +0.8VS AM14
VDDP_S5_2
VDDP_S5_3
VDDCR_75
VDDCR_76 AJ10
AJ14
VDDCR_77
TDC :4A AL13 VDDP_1 VDDCR_78 AJ16
AM12 VDDP_2 VDDCR_79 AJ18
AM13 VDDP_3 VDDCR_80 AK13
AN12 VDDP_4 VDDCR_81 AK15
+RTC_APU AN13 VDDP_5 VDDCR_82 AK17
VDDCR_83 AK19
TDC :4.5uA AT11 VDDBT_RTC_G
+RTC_APU +RTCBATT
1.5V FP5 REV 0.90
PART 6 OF 13
UC11 FP5_BGA1140~D
<28> EC_CLEAR_CMOS# RC106 1 @ 2 0_0402_5% RC107 1 2 10K_0402_5% +RTCBATT_R 3
Vout 1
2 Vin
@ GND
1
1 AP2138N-1.5TRG1_SOT23-3 CC82
CLRP1 CC81 SA000066U00 1U_0201_6.3V6M
SHORT PADS 0.22U_0402_6.3V6K
2
4 4

FP4 PWR
Custom 0.4
A B C D E
5 4 3 2 1
Main Func = CPU
UC1L @
D UC1G @ UC1H @ UC1K @ RSVD D
GND GND GND/RSVD T11 RSVD_32 RSVD_62 AA9
N12 VSS_316 VSS_62 K32 V8 VSS_124 VSS_186 AG8 AR5 VSS_248 VSS_310 BD16 RSVD_61 AA8
A3 VSS_1 VSS_63 L5 V11 VSS_125 VSS_187 AG11 AR7 VSS_249 VSS_311 BD19 AC7 RSVD_66 RSVD_65 AC6
A5 VSS_2 VSS_64 L13 V12 VSS_126 VSS_188 AG12 AR12 VSS_250 VSS_312 BD21
A7 VSS_3 VSS_65 L15 V14 VSS_127 VSS_189 AG13 AR14 VSS_251 VSS_313 BD23
A10 VSS_4 VSS_66 L18 V16 VSS_128 VSS_190 AG15 AR16 VSS_252 VSS_314 BD26 Y9 RSVD_55
A12 VSS_5 VSS_67 L20 V18 VSS_129 VSS_191 AG17 AR19 VSS_253 VSS_315 BD30 Y10 RSVD_56 RSVD_72 AD11
A14 VSS_6 VSS_68 L25 V20 VSS_130 VSS_192 AG19 AR21 VSS_254
A16 VSS_7 VSS_69 L28 V22 VSS_131 VSS_193 AH14 AR26 VSS_255 W11 RSVD_47 RSVD_67 AC9
A19 VSS_8 VSS_70 M1 V25 VSS_132 VSS_194 AH16 AR28 VSS_256 W12 RSVD_48 RSVD_63 AA11
A21 VSS_9 VSS_71 M5 W1 VSS_133 VSS_195 AH18 AR32 VSS_257
A23 VSS_10 VSS_72 M12 W5 VSS_134 VSS_196 AH20 AU5 VSS_258 V9 RSVD_38 RSVD_33 T12
A26 VSS_11 VSS_73 M21 W13 VSS_135 VSS_197 AJ1 AU8 VSS_259 V10 RSVD_39 RSVD_73 AD12
A30 VSS_12 VSS_74 M23 W15 VSS_136 VSS_198 AJ5 AU11 VSS_260
C3 VSS_13 VSS_75 M26 W17 VSS_137 VSS_199 AJ13 AU13 VSS_261 RSVD_53 Y6
C32 VSS_14 VSS_76 M28 W19 VSS_138 VSS_200 AJ15 AU15 VSS_262 RSVD_54 Y7
D16 VSS_15 VSS_77 M32 W23 VSS_139 VSS_201 AJ17 AU18 VSS_263
D18 VSS_16 VSS_78 N4 W26 VSS_140 VSS_202 AJ19 AU20 VSS_264 AA12 RSVD_64 RSVD_45 W8
D20 VSS_17 VSS_79 N5 Y5 VSS_141 VSS_203 AK5 AU22 VSS_265 AC10 RSVD_68 RSVD_46 W9
E7 VSS_18 VSS_80 N8 Y11 VSS_142 VSS_204 AK8 AU25 VSS_266 RSVD_1 B20
E8 VSS_19 VSS_81 N11 Y12 VSS_143 VSS_205 AK11 AU28 VSS_267 RSVD_5 G3
E10 VSS_20 VSS_82 N13 Y14 VSS_144 VSS_206 AK12 AV1 VSS_268 RSVD_7 J20 FP5 REV 0.90
E11 VSS_21 VSS_83 N15 Y16 VSS_145 VSS_207 AK14 AV5 VSS_269 RSVD_8 K3 PART 12 OF 13
E12 VSS_22 VSS_84 N17 Y18 VSS_146 VSS_208 AK16 AV7 VSS_270 RSVD_9 K6 FP5_BGA1140~D
C C
E13 VSS_23 VSS_85 N19 Y20 VSS_147 VSS_209 AK18 AV10 VSS_271 RSVD_10 K20
E14 VSS_24 VSS_86 N22 AA1 VSS_148 VSS_210 AK20 AV12 VSS_272 RSVD_11 M3
E18 VSS_27 VSS_89 P1 AA15 VSS_151 VSS_213 AL1 AV19 VSS_275 RSVD_22 P6
E19 VSS_28 VSS_90 P5 AA17 VSS_152 VSS_214 AL5 AV21 VSS_276 RSVD_23 P22
E20 VSS_29 VSS_91 P14 AA19 VSS_153 VSS_215 AL7 AV23 VSS_277 RSVD_30 T3 UC1M @
E21 VSS_30 VSS_92 P16 AB14 VSS_154 VSS_216 AL10 AV26 VSS_278 RSVD_31 T6 CAMERAS
E22 VSS_31 VSS_93 P18 AB16 VSS_155 VSS_217 AL12 AV28 VSS_279 RSVD_37 T29
E23 VSS_32 VSS_94 P20 AB18 VSS_156 VSS_218 AL16 AV32 VSS_280 RSVD_44 W6 A18 CAM0_CSI2_CLOCKP CAM0_CLK B15
E25 VSS_33 VSS_95 P23 AB20 VSS_157 VSS_219 AL23 AW5 VSS_281 RSVD_49 W21 C18 CAM0_CSI2_CLOCKN
E26 VSS_34 VSS_96 P26 AC5 VSS_158 VSS_220 AL26 AW28 VSS_282 RSVD_50 W22 CAM0_I2C_SCL D15
E27 VSS_35 VSS_97 P28 AC8 VSS_159 VSS_221 AM5 AY6 VSS_283 RSVD_57 Y21 A15 CAM0_CSI2_DATAP0 CAM0_I2C_SDA C14
F5 VSS_36 VSS_98 P32 AC11 VSS_160 VSS_222 AM8 AY7 VSS_284 RSVD_58 Y27 C15 CAM0_CSI2_DATAN0
F28 VSS_37 VSS_99 R5 AC12 VSS_161 VSS_223 AM15 AY8 VSS_285 RSVD_59 AA3 CAM0_SHUTDOWN B13
G1 VSS_38 VSS_100 R11 AC13 VSS_162 VSS_224 AM20 AY10 VSS_286 RSVD_60 AA6 B16 CAM0_CSI2_DATAP1
G5 VSS_39 VSS_101 R12 AC15 VSS_163 VSS_225 AM22 AY11 VSS_287 RSVD_69 AC29 C16 CAM0_CSI2_DATAN1
G16 VSS_40 VSS_102 R13 AC17 VSS_164 VSS_226 AM25 AY12 VSS_288 RSVD_70 AD3
G19 VSS_41 VSS_103 R15 AC19 VSS_165 VSS_227 AM28 AY13 VSS_289 RSVD_71 AD6 C19 CAM0_CSI2_DATAP2
G21 VSS_42 VSS_104 R17 AD1 VSS_166 VSS_228 AN1 AY14 VSS_290 RSVD_74 AF3 B18 CAM0_CSI2_DATAN2
G23 VSS_43 VSS_105 R19 AD5 VSS_167 VSS_229 AN5 AY15 VSS_291 RSVD_75 AF6
G26 VSS_44 VSS_106 R22 AD14 VSS_168 VSS_230 AN7 AY16 VSS_292 RSVD_78 AF30 B17 CAM0_CSI2_DATAP3
G28 VSS_45 VSS_107 R25 AD16 VSS_169 VSS_231 AN10 AY18 VSS_293 RSVD_79 AJ6 D17 CAM0_CSI2_DATAN3
G32 VSS_46 VSS_108 R28 AD18 VSS_170 VSS_232 AN15 AY19 VSS_294 RSVD_80 AJ24
B H5 VSS_47 VSS_109 R30 AD20 VSS_171 VSS_233 AN18 AY20 VSS_295 RSVD_81 AK23 D12 CAM1_CSI2_CLOCKP CAM1_CLK B10 B
H13 VSS_48 VSS_110 T1 AE5 VSS_172 VSS_234 AN21 AY21 VSS_296 RSVD_82 AK27 B12 CAM1_CSI2_CLOCKN
H18 VSS_49 VSS_111 T5 AE11 VSS_173 VSS_235 AN23 AY22 VSS_297 RSVD_83 AL3 CAM1_I2C_SCL A11
H20 VSS_50 VSS_112 T14 AE12 VSS_174 VSS_236 AN26 AY23 VSS_298 RSVD_87 AN29 C13 CAM1_CSI2_DATAP0 CAM1_I2C_SDA C11
H22 VSS_51 VSS_113 T16 AE13 VSS_175 VSS_237 AN28 AY25 VSS_299 RSVD_88 AN31 A13 CAM1_CSI2_DATAN0
H25 VSS_52 VSS_114 T18 AE15 VSS_176 VSS_238 AN32 AY26 VSS_300 CAM1_SHUTDOWN D11
H28 VSS_53 VSS_115 T20 AE17 VSS_177 VSS_239 AP5 AY27 VSS_301 B11 CAM1_CSI2_DATAP1
K1 VSS_54 VSS_116 T23 AE19 VSS_178 VSS_240 AP8 BB1 VSS_302 C12 CAM1_CSI2_DATAN1 CAM_PRIV_LED D13
K5 VSS_55 VSS_117 T26 AF1 VSS_179 VSS_241 AP13 BB20 VSS_303 CAM_IR_ILLU D10
K16 VSS_56 VSS_118 T28 AF5 VSS_180 VSS_242 AP15 BB32 VSS_304 RSVD_14 M14 J13 RSVD_6 FP5 REV 0.90
K19 VSS_57 VSS_119 U13 AF14 VSS_181 VSS_243 AP18 BD3 VSS_305 RSVD_84 AL6 PART 13 OF 13
K21 VSS_58 VSS_120 U15 AF16 VSS_182 VSS_244 AP20 BD7 VSS_306 RSVD_85 AL11 FP5_BGA1140~D
K22 VSS_59 VSS_121 U17 AF18 VSS_183 VSS_245 AP25 BD10 VSS_307 RSVD_86 AN16
K26 VSS_60 VSS_122 U19 AF20 VSS_184 VSS_246 AP28 BD12 VSS_308
K28 VSS_61 VSS_123 V5 AG5 VSS_185 VSS_247 AR1 BD14 VSS_309
FP5 REV 0.90 FP5 REV 0.90 FP5 REV 0.90
PART 7 OF 13 PART 8 OF 13 PART 11 OF 13
FP5_BGA1140~D FP5_BGA1140~D FP5_BGA1140~D
A A

FP5 GND
Custom 0.4
5 4 3 2 1
5 4 3 2 1
DDR4 - MEMORY DOWN (MEMORY CHANNEL A, x16 x4 PCS)

+0.6V_DDRA_VREFCA +0.6V_DDRA_VREFCA
+0.6VS
DDR_A_DQ[63..0]
UD1 UD2
DDR_A_DQ[63..0] <5> RD3 1 OBR@ 2 39_0402_5% DDR_A_MA0
DDR_A_DM[7..0] DDR_A_DQ1 DDR_A_DQ16 DDR_A_MA1
M1 G2 M1 G2 RD4 1 OBR@ 2 39_0402_5%
DDR_A_DM[7..0] <5> VREFCA DQL0 DDR_A_DQ7 VREFCA DQL0 DDR_A_DQ19 DDR_A_MA2
F7 F7 RD5 1 OBR@ 2 39_0402_5%
DQL1 DDR_A_DQ4 DQL1 DDR_A_DQ21 DDR_A_MA3
OBR@
CD2
OBR@
CD1
1 H3 1 H3 RD6 1 OBR@ 2 39_0402_5%
P3 DQL2 H7 DDR_A_DQ6 DDR_A_MA0 P3 DQL2 H7 DDR_A_DQ22 RD7 1 OBR@ 2 39_0402_5% DDR_A_MA4
<5> DDR_A_MA0 A0 DQL3 DDR_A_DQ5 DDR_A_MA1 A0 DQL3 DDR_A_DQ20 DDR_A_MA5
P7 H2 P7 H2 RD8 1 OBR@ 2 39_0402_5%
.047U_0402_16V7K
.047U_0402_16V7K
R3 H8 R3 H8 RD9 1 OBR@ 2 39_0402_5%
+1.2V 2 <5> DDR_A_MA2 A2 DQL5 DDR_A_DQ0 2 DDR_A_MA3 A2 DQL5 DDR_A_DQ17 DDR_A_MA7
N7 J3 N7 J3 RD10 1 OBR@ 2 39_0402_5%
D N3 J7 N3 J7 RD11 1 OBR@ 2 39_0402_5% D
<5> DDR_A_MA4 A4 DQL7 DDR_A_MA5 A4 DQL7 DDR_A_MA9
P8 P8 RD12 1 OBR@ 2 39_0402_5%
<5> DDR_A_MA5
RD1 1 OBR@ 2 1K_0402_5% DDR_A_ALERT# P2 A5 DDR_A_MA6 P2 A5 RD13 1 OBR@ 2 39_0402_5% DDR_A_MA10
<5> DDR_A_MA6 A6 DDR_A_DQ12 DDR_A_MA7 A6 DDR_A_DQ25 DDR_A_MA11
R8 A3 R8 A3 RD14 1 OBR@ 2 39_0402_5%
<5> DDR_A_MA7 A7 DQU0 DDR_A_DQ11 DDR_A_MA8 A7 DQU0 DDR_A_DQ31 DDR_A_MA12
R2 B8 R2 B8 RD15 1 OBR@ 2 39_0402_5%
+0.6VS <5> DDR_A_MA8 A8 DQU1 DDR_A_DQ9 DDR_A_MA9 A8 DQU1 DDR_A_DQ30 DDR_A_MA13
R7 C3 R7 C3 RD16 1 OBR@ 2 39_0402_5%
<5> DDR_A_MA9 A9 DQU2 DDR_A_DQ14 DDR_A_MA10 A9 DQU2 DDR_A_DQ26
M3 C7 M3 C7
<5> DDR_A_MA10 A10/AP DQU3 DDR_A_DQ8 DDR_A_MA11 A10/AP DQU3 DDR_A_DQ24
T2 C2 T2 C2
DDR_A_PAR <5> DDR_A_MA11 A11 DQU4 DDR_A_DQ15 DDR_A_MA12 A11 DQU4 DDR_A_DQ29 DDR_A_WE#
RD2 1 OBR@ 2 39_0402_5% M7 C8 M7 C8 RD17 1 OBR@ 2 39_0402_5%
<5> DDR_A_MA12 A12/BC DQU5 DDR_A_DQ13 DDR_A_MA13 A12/BC DQU5 DDR_A_DQ28 DDR_A_CAS#
T8 D3 T8 D3 RD18 1 OBR@ 2 39_0402_5%
+1.2V <5> DDR_A_MA13 A13 DQU6 DDR_A_DQ10 DDR_A_WE# A13 DQU6 DDR_A_DQ27 DDR_A_RAS#
L2 D7 L2 D7 RD19 1 OBR@ 2 39_0402_5%
<5> DDR_A_WE# A14/WE DQU7 A14/WE DQU7
N2 DDR_A_BA0 N2
<5> DDR_A_BA0 BA0 DDR_A_BA1 BA0 DDR_A_ODT0
N8 B3 N8 B3 RD20 1 OBR@ 2 39_0402_5%
OBR@
<5> DDR_A_BA1 BA1 VDD B9 +1.2V BA1 VDD B9 +1.2V RD21 1 OBR@ 2 39_0402_5% DDR_A_CS0#
CD3 1 2 0.1U_0201_10V6K RD28 1 OBR@ 2 39_0402_5% DDR_A_CLK0 DDR_A_DM1 E2 VDD D1 DDR_A_DM3 E2 VDD D1 RD22 1 OBR@ 2 39_0402_5% DDR_A_CKE0
DDR_A_DM0 E7 DMU/DBIU VDD G7 DDR_A_DM2 E7 DMU/DBIU VDD G7
DML/DBIL VDD J1 DML/DBIL VDD J1 RD23 1 OBR@ 2 39_0402_5% DDR_A_ACT#
@ VDD J9 VDD J9 RD24 1 OBR@ 2 39_0402_5% DDR_A_BA0
CD4 1 2 0.1U_0201_10V6K RD29 1 OBR@ 2 39_0402_5% DDR_A_CLK0# VDD L1 VDD L1 RD25 1 OBR@ 2 39_0402_5% DDR_A_BA1
K7 VDD L9 DDR_A_CLK0 K7 VDD L9 RD26 1 OBR@ 2 39_0402_5% DDR_A_BG0
<5> DDR_A_CLK0 CK_t VDD DDR_A_CLK0# CK_t VDD
K8 R1 K8 R1
<5> DDR_A_CLK0# CK_c VDD DDR_A_CKE0 CK_c VDD
K2 T9 K2 T9
<5> DDR_A_CKE0 CKE VDD CKE VDD RD27 1 DDP@ 2 39_0402_5% RD30 1 DDP@ 2 0_0201_5%
DDR_A_BG1 <5>
A1 A1 RD31 1 SDP@ 2 0_0201_5% DDR_A_BG1_R
VDDQ A9 VDDQ A9
VDDQ C1 VDDQ C1
VDDQ D9 VDDQ D9
+1.2V VDDQ F2 VDDQ F2
VDDQ F8 VDDQ F8
K3 VDDQ G1 DDR_A_ODT0 K3 VDDQ G1
<5> DDR_A_ODT0 ODT VDDQ DDR_A_CS0# ODT VDDQ
L7 G9 L7 G9
<5> DDR_A_CS0# CS VDDQ DDR_A_RAS# CS VDDQ
L8 J2 L8 J2
<5> DDR_A_RAS# RAS VDDQ DDR_A_CAS# RAS VDDQ
M8 J8 M8 J8
<5> DDR_A_CAS# CAS VDDQ CAS VDDQ
Memory Side VSS
B2
VSS
B2
2
2 E1 E1
CD5 RD32 VSS E9 RD33 1 DDP@ 2 0_0201_5% VSS E9 RD34 1 DDP@ 2 0_0201_5%
0.1U_0201_10V6K 1K_0402_1% VSS G8 VSS G8
@ OBR@ +0.6V_DDRA_VREFCA A7 VSS K1 A7 VSS K1
1 <5> DDR_A_DQS1# DQSU_c VSS <5> DDR_A_DQS3# DQSU_c VSS
B7 K9 B7 K9
<5> DDR_A_DQS1 DQSU_t VSS DDR_A_BG1_R <5> DDR_A_DQS3 DQSU_t VSS DDR_A_BG1_R
1
F3 M9 F3 M9
<5> DDR_A_DQS0# DQSL_c VSS <5> DDR_A_DQS2# DQSL_c VSS
G3 N1 G3 N1
<5> DDR_A_DQS0 DQSL_t VSS <5> DDR_A_DQS2 DQSL_t VSS
T1 T1
P1 VSS DDR_A_RST# P1 VSS
<5> DDR_A_RST# RESET RESET
2
2 2 RD35 1 OBR@ 2 F9 RD36 1 OBR@ 2 F9

CD6 RD37 CD7 240_0201_1% ZQ 240_0201_1% ZQ
0.1U_0201_10V6K 1K_0402_1% 0.1U_0201_10V6K
C OBR@ OBR@ OBR@ L3 A2 DDR_A_ACT# L3 A2 C
1 1 <5> DDR_A_ACT# ACT VSSQ A8 DDR_A_BG0 ACT VSSQ A8
M2 M2
<5> DDR_A_BG0 BG0 VSSQ C9 BG0 VSSQ C9
1
N9 N9
P9 TEN VSSQ D2 DDR_A_ALERT# P9 TEN VSSQ D2
<5> DDR_A_ALERT# ALERT VSSQ D8 DDR_A_PAR ALERT VSSQ D8
T3 T3
<5> DDR_A_PAR PAR VSSQ E3 PAR VSSQ E3
T7 VSSQ E8 T7 VSSQ E8
B1 NC VSSQ F1 B1 NC VSSQ F1
+2.5V R9 VPP VSSQ H1 +2.5V R9 VPP VSSQ H1
VPP VSSQ H9 VPP VSSQ H9
VREF traces should be at least 20mils wide 96-BALL VSSQ 96-BALL VSSQ
20mils spacing to other signals SDRAM DDR4 SDRAM DDR4
K4A8G165WB-BCPB_FBGA96 K4A8G165WB-BCPB_FBGA96
SA00008Z000 SA00008Z000
@ @
DRAM DOWN DECOUPLING

+1.2V +0.6VS
CD10
CD11
CD12
CD13
CD14
CD15
CD16
CD17
CD18
CD19
CD20
CD21
CD22
CD23
CD24
CD25
CD26
CD27
CD28
CD29
CD30
CD31
CD32
1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1
+0.6V_DDRA_VREFCA +0.6V_DDRA_VREFCA
0.22U_0402_6.3V6K
0.22U_0402_6.3V6K
0.22U_0402_6.3V6K
0.22U_0402_6.3V6K
0.22U_0402_6.3V6K
0.22U_0402_6.3V6K
0.22U_0402_6.3V6K
0.22U_0402_6.3V6K
0.22U_0402_6.3V6K
0.22U_0402_6.3V6K
0.22U_0402_6.3V6K
0.22U_0402_6.3V6K
0.22U_0402_6.3V6K
0.22U_0402_6.3V6K
0.22U_0402_6.3V6K
0.22U_0402_6.3V6K
0.22U_0402_6.3V6K
0.22U_0402_6.3V6K
0.22U_0402_6.3V6K
0.22U_0402_6.3V6K
0.22U_0402_6.3V6K
0.22U_0402_6.3V6K
0.22U_0402_6.3V6K
UD3 UD4
2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2
M1 G2 DDR_A_DQ32 M1 G2 DDR_A_DQ48
VREFCA DQL0 F7 DDR_A_DQ39 VREFCA DQL0 F7 DDR_A_DQ51
DQL1 DDR_A_DQ33 DQL1 DDR_A_DQ49
OBR@
CD8
OBR@
CD9
1 H3 1 H3
DDR_A_MA0 P3 DQL2 H7 DDR_A_DQ37 DDR_A_MA0 P3 DQL2 H7 DDR_A_DQ55
DDR_A_MA1 P7 A0 DQL3 H2 DDR_A_DQ38 DDR_A_MA1 P7 A0 DQL3 H2 DDR_A_DQ53
DDR_A_MA2 A1 DQL4 DDR_A_DQ35 DDR_A_MA2 A1 DQL4 DDR_A_DQ50
.047U_0402_16V7K
.047U_0402_16V7K
R3 H8 R3 H8
2 DDR_A_MA3 N7 A2 DQL5 J3 DDR_A_DQ36 2 DDR_A_MA3 N7 A2 DQL5 J3 DDR_A_DQ52
DDR_A_MA4 A3 DQL6 DDR_A_DQ34 DDR_A_MA4 A3 DQL6 DDR_A_DQ54
OBR@
OBR@
OBR@
OBR@
OBR@
OBR@
OBR@
OBR@
OBR@
OBR@
OBR@
OBR@
OBR@
OBR@
OBR@
OBR@
OBR@
OBR@
OBR@
OBR@
OBR@
N3 J7 N3 J7
DDR_A_MA5 P8 A4 DQL7 DDR_A_MA5 P8 A4 DQL7
DDR_A_MA6 P2 A5 DDR_A_MA6 P2 A5
DDR_A_MA7 R8 A6 A3 DDR_A_DQ44 DDR_A_MA7 R8 A6 A3 DDR_A_DQ56
DDR_A_MA8 R2 A7 DQU0 B8 DDR_A_DQ42 DDR_A_MA8 R2 A7 DQU0 B8 DDR_A_DQ62
DDR_A_MA9 R7 A8 DQU1 C3 DDR_A_DQ45 DDR_A_MA9 R7 A8 DQU1 C3 DDR_A_DQ60
DDR_A_MA10 M3 A9 DQU2 C7 DDR_A_DQ47 DDR_A_MA10 M3 A9 DQU2 C7 DDR_A_DQ63
DDR_A_MA11 T2 A10/AP DQU3 C2 DDR_A_DQ40 DDR_A_MA11 T2 A10/AP DQU3 C2 DDR_A_DQ57
B DDR_A_MA12 M7 A11 DQU4 C8 DDR_A_DQ43 DDR_A_MA12 M7 A11 DQU4 C8 DDR_A_DQ58 B
DDR_A_MA13 T8 A12/BC DQU5 D3 DDR_A_DQ41 DDR_A_MA13 T8 A12/BC DQU5 D3 DDR_A_DQ61
DDR_A_WE# L2 A13 DQU6 D7 DDR_A_DQ46 DDR_A_WE# L2 A13 DQU6 D7 DDR_A_DQ59
A14/WE DQU7 A14/WE DQU7
DDR_A_BA0 N2 DDR_A_BA0 N2
DDR_A_BA1 N8 BA0 B3 DDR_A_BA1 N8 BA0 B3 +1.2V +0.6VS
BA1 VDD B9 +1.2V BA1 VDD B9 +1.2V +0.6V_DDRA_VREFCA +1.2V
DDR_A_DM5 E2 VDD D1 DDR_A_DM7 E2 VDD D1
DDR_A_DM4 E7 DMU/DBIU VDD G7 DDR_A_DM6 E7 DMU/DBIU VDD G7 CD33 1 2 0.22U_0402_6.3V6K OBR@
DML/DBIL VDD J1 DML/DBIL VDD J1 CD34 1 2 0.1U_0201_10V6K OBR@
VDD J9 VDD J9 CD35 1 2 0.22U_0402_6.3V6K OBR@
VDD L1 VDD L1 CD36 1 2 0.1U_0201_10V6K OBR@
DDR_A_CLK0 K7 VDD L9 DDR_A_CLK0 K7 VDD L9 CD37 1 2 0.22U_0402_6.3V6K OBR@
DDR_A_CLK0# K8 CK_t VDD R1 DDR_A_CLK0# K8 CK_t VDD R1 CD38 1 2 0.1U_0201_10V6K OBR@
DDR_A_CKE0 K2 CK_c VDD T9 DDR_A_CKE0 K2 CK_c VDD T9 CD39 1 2 0.22U_0402_6.3V6K OBR@
CKE VDD CKE VDD CD40 1 2 0.1U_0201_10V6K OBR@
CD41 1 2 0.22U_0402_6.3V6K OBR@
A1 A1
VDDQ A9 VDDQ A9
VDDQ C1 VDDQ C1
VDDQ D9 VDDQ D9
VDDQ F2 VDDQ F2
VDDQ F8 VDDQ F8
DDR_A_ODT0 K3 VDDQ G1 DDR_A_ODT0 K3 VDDQ G1
DDR_A_CS0# L7 ODT VDDQ G9 DDR_A_CS0# L7 ODT VDDQ G9
DDR_A_RAS# L8 CS VDDQ J2 DDR_A_RAS# L8 CS VDDQ J2
DDR_A_CAS# M8 RAS VDDQ J8 DDR_A_CAS# M8 RAS VDDQ J8
CAS VDDQ CAS VDDQ
B2 B2
VSS E1 VSS E1 +2.5V +2.5V +2.5V +2.5V
VSS E9 RD38 1 DDP@ 2 0_0201_5% VSS E9 RD39 1 DDP@ 2 0_0201_5%
VSS G8 VSS G8
A7 VSS K1 A7 VSS K1
<5> DDR_A_DQS5# DQSU_c VSS <5> DDR_A_DQS7# DQSU_c VSS
B7 K9 B7 K9
<5> DDR_A_DQS5 DQSU_t VSS DDR_A_BG1_R <5> DDR_A_DQS7 DQSU_t VSS DDR_A_BG1_R
1U_0201_6.3V6M
CD42 OBR@
1U_0201_6.3V6M
CD43 OBR@
10U 6.3V M X5R 0402

CD44 @
1U_0201_6.3V6M
CD45 @
1U_0201_6.3V6M
CD46 OBR@
10U 6.3V M X5R 0402

CD47 OBR@
1U_0201_6.3V6M
CD48 OBR@
1U_0201_6.3V6M
CD49 OBR@
10U 6.3V M X5R 0402

CD50 @
1U_0201_6.3V6M
CD51 OBR@
1U_0201_6.3V6M
CD52 @
10U 6.3V M X5R 0402

CD53 OBR@
F3 M9 F3 M9 1 1 1 1 1 1 1 1 1 1 1 1
<5> DDR_A_DQS4# DQSL_c VSS <5> DDR_A_DQS6# DQSL_c VSS
G3 N1 G3 N1
<5> DDR_A_DQS4 DQSL_t VSS <5> DDR_A_DQS6 DQSL_t VSS
T1 T1
DDR_A_RST# P1 VSS DDR_A_RST# P1 VSS
RESET RESET 2 2 2 2 2 2 2 2 2 2 2 2
RD40 1 OBR@ 2 F9 RD41 1 OBR@ 2 F9
240_0201_1% ZQ 240_0201_1% ZQ
DDR_A_ACT# L3 A2 DDR_A_ACT# L3 A2
DDR_A_BG0 ACT VSSQ A8 DDR_A_BG0 ACT VSSQ A8
M2
N9 BG0 VSSQ C9
M2
N9 BG0 VSSQ C9 Closed to UD1 Closed to UD2 Closed to UD3 Closed to UD4
DDR_A_ALERT# P9 TEN VSSQ D2 DDR_A_ALERT# P9 TEN VSSQ D2
DDR_A_PAR T3 ALERT VSSQ D8 DDR_A_PAR T3 ALERT VSSQ D8
PAR VSSQ E3 PAR VSSQ E3
T7 VSSQ E8 T7 VSSQ E8
B1 NC VSSQ F1 B1 NC VSSQ F1
A +2.5V R9 VPP VSSQ H1 +2.5V R9 VPP VSSQ H1 A
VPP VSSQ H9 VPP VSSQ H9
96-BALL VSSQ 96-BALL VSSQ
SDRAM DDR4 SDRAM DDR4
K4A8G165WB-BCPB_FBGA96 K4A8G165WB-BCPB_FBGA96
SA00008Z000 SA00008Z000
@ @

2018/11/05 2019/11/05 Title
DDR4_CHA Onboard
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS 0.4
5 4 3 2 1
A B C D E
DDR4 - SO-DIMM (MEMORY CHANNEL B) DDR_B_DQ[0..63]

JDIMM1A DDR_B_DQ[0..63] <5>
DDR_B_CLK0 137 REVERSE 8 DDR_B_DQ1 DDR_B_DM[0..7]
<5> DDR_B_CLK0 DDR_B_CLK0# CK0(T) DQ0 DDR_B_DQ4 DDR_B_DM[0..7] <5>
139 7
<5> DDR_B_CLK0# DDR_B_CLK1 138 CK0#(C) DQ1 20 DDR_B_DQ3 DDR_B_MA[0..13]
<5> DDR_B_CLK1 DDR_B_CLK1# CK1(T) DQ2 DDR_B_DQ6 DDR_B_MA[0..13] <5>
140 21
<5> DDR_B_CLK1# CK1#(C) DQ3 4 DDR_B_DQ0
DDR_B_CKE0 109 DQ4 3 DDR_B_DQ5
<5> DDR_B_CKE0 DDR_B_CKE1 110 CKE0 DQ5 16 DDR_B_DQ7
<5> DDR_B_CKE1 CKE1 DQ6 DDR_B_DQ2
17
1 DDR_B_CS0# 149 DQ7 13 DDR_B_DQS0 1
<5> DDR_B_CS0# DDR_B_CS1# 157 S0# DQS0(T) 11 DDR_B_DQS0# DDR_B_DQS0 <5> +1.2V +1.2V
<5> DDR_B_CS1# S1# DQS0#(C) DDR_B_DQS0# <5>
162
165 S2#/C0 28 DDR_B_DQ12 JDIMM1B
S3#/C1 DQ8 29 DDR_B_DQ13 REVERSE
DDR_B_ODT0 155 DQ9 41 DDR_B_DQ10 111 141
<5> DDR_B_ODT0 DDR_B_ODT1 161 ODT0 DQ10 42 DDR_B_DQ14 112 VDD1 VDD11 142
<5> DDR_B_ODT1 ODT1 DQ11 24 DDR_B_DQ8 117 VDD2 VDD12 147
DDR_B_BG0 115 DQ12 25 DDR_B_DQ9 118 VDD3 VDD13 148
<5> DDR_B_BG0 DDR_B_BG1 BG0 DQ13 DDR_B_DQ11 VDD4 VDD14
113 38 123 153
<5> DDR_B_BG1 DDR_B_BA0 BG1 DQ14 DDR_B_DQ15 +3VS VDD5 VDD15 +0.6VS
150 37 124 154
<5> DDR_B_BA0 DDR_B_BA1 145 BA0 DQ15 34 DDR_B_DQS1 129 VDD6 VDD16 159
<5> DDR_B_BA1 BA1 DQS1(T) DDR_B_DQS1# DDR_B_DQS1 <5> VDD7 VDD17
32 130 160
DDR_B_MA0 144 DQS1#(C) DDR_B_DQS1# <5> 135 VDD8 VDD18 163
DDR_B_MA1 133 A0 50 DDR_B_DQ21 136 VDD9 VDD19 +2.5V
DDR_B_MA2 132 A1 DQ16 49 DDR_B_DQ16 +VREFB_CA VDD10
DDR_B_MA3 131 A2 DQ17 62 DDR_B_DQ23 255 258
DDR_B_MA4 128 A3 DQ18 63 DDR_B_DQ19 VDDSPD VTT
DDR_B_MA6 127 A5 DQ20 45 DDR_B_DQ20 VREFCA VPP1 259
DDR_B_MA7 A6 DQ21 DDR_B_DQ22 VPP2
1000P_0402_50V7K
CD81
122 58 1
DDR_B_MA9 121 A8 DQ23 55 DDR_B_DQS2 2 VSS1 VSS48 102
DDR_B_MA10 146 A9 DQS2(T) 53 DDR_B_DQS2# DDR_B_DQS2 <5> 5 VSS2 VSS49 103
DDR_B_MA11 A10_AP DQS2#(C) DDR_B_DQS2# <5> 2 VSS3 VSS50
120 6 106
DDR_B_MA12 119 A11 70 DDR_B_DQ25 9 VSS4 VSS51 107
DDR_B_MA13 158 A12 DQ24 71 DDR_B_DQ28 10 VSS5 VSS52 167
DDR_B_WE# 151 A13 DQ25 83 DDR_B_DQ26 14 VSS6 VSS53 168
<5> DDR_B_WE# DDR_B_CAS# 156 A14_WE# DQ26 84 DDR_B_DQ27 15 VSS7 VSS54 171
<5> DDR_B_CAS# DDR_B_RAS# 152 A15_CAS# DQ27 66 DDR_B_DQ24 18 VSS8 VSS55 172
<5> DDR_B_RAS# A16_RAS# DQ28 67 DDR_B_DQ29 19 VSS9 VSS56 175
DDR_B_ACT# 114 DQ29 79 DDR_B_DQ30 22 VSS10 VSS57 176
<5> DDR_B_ACT# ACT# DQ30 80 DDR_B_DQ31 23 VSS11 VSS58 180
DDR_B_PAR 143 DQ31 76 DDR_B_DQS3 26 VSS12 VSS59 181
<5> DDR_B_PAR DDR_B_ALERT# PARITY DQS3(T) DDR_B_DQS3# DDR_B_DQS3 <5> VSS13 VSS60
116 74 27 184
<5> DDR_B_ALERT# DDR_B_EVENT# ALERT# DQS3#(C) DDR_B_DQS3# <5> VSS14 VSS61
134 30 185
<5> DDR_B_EVENT# DDR_B_RST# 108 EVENT# 174 DDR_B_DQ32 31 VSS15 VSS62 188
<5> DDR_B_RST# RESET# DQ32 173 DDR_B_DQ33 35 VSS16 VSS63 189
2 2
DQ33 187 DDR_B_DQ34 36 VSS17 VSS64 192
254 DQ34 186 DDR_B_DQ35 39 VSS18 VSS65 193
<8> I2C_2_SDA SDA DQ35 DDR_B_DQ37 VSS19 VSS66
253 170 40 196
<8> I2C_2_SCL SCL DQ36 169 DDR_B_DQ36 43 VSS20 VSS67 197
166 DQ37 183 DDR_B_DQ38 44 VSS21 VSS68 201
260 SA2 DQ38 182 DDR_B_DQ39 47 VSS22 VSS69 202
256 SA1 DQ39 179 DDR_B_DQS4 48 VSS23 VSS70 205
+3VS SA0 DQS4(T) DDR_B_DQS4# DDR_B_DQS4 <5> VSS24 VSS71
177 51 206
DQS4#(C) DDR_B_DQS4# <5> 52 VSS25 VSS72 209
92 195 DDR_B_DQ40 56 VSS26 VSS73 210
91 CB0_NC DQ40 194 DDR_B_DQ41 57 VSS27 VSS74 213
97 CB7_NC DQ47 200 DDR_B_DQS5 72 VSS34 VSS81 227
95 DQS8(T) DQS5(T) 198 DDR_B_DQS5# DDR_B_DQS5 <5> 73 VSS35 VSS82 230
DQS8#(C) DQS5#(C) DDR_B_DQS5# <5> VSS36 VSS83
77 231
216 DDR_B_DQ48 78 VSS37 VSS84 234
DDR_B_DM0 12 DQ48 215 DDR_B_DQ53 81 VSS38 VSS85 235
DDR_B_DM1 33 DM0#/DBI0# DQ49 228 DDR_B_DQ50 82 VSS39 VSS86 238
DDR_B_DM7 241 DM6#/DBI6# DQ55 221 DDR_B_DQS6 94 VSS45 VSS92 251
DDR_B_RST# DM7#/DBI7# DQS6(T) DDR_B_DQS6# DDR_B_DQS6 <5> VSS46 VSS93
1 2 96 219 98 252
DM8#/DBI8# DQS6#(C) DDR_B_DQS6# <5> VSS47 VSS94
CD69 ESD@
100P_0402_50V8J 262 261
GND1 GND2
237 DDR_B_DQ56
DQ56 236 DDR_B_DQ57 LOTES_ADDR0205-P001A02~D
DQ57 249 DDR_B_DQ58 SP07001HW0L
3 ESD DQ58
DQ59
DQ60
250
232
233
DDR_B_DQ59
DDR_B_DQ60
DDR_B_DQ61
ME@
3
DQ61 245 DDR_B_DQ62

DQ62 246 DDR_B_DQ63
DQ63 242 DDR_B_DQS7
DQS7(T) DDR_B_DQS7# DDR_B_DQS7 <5>
240
DQS7#(C) DDR_B_DQS7# <5>
LOTES_ADDR0205-P001A02~D
SP07001HW0L
ME@
+1.2V
Layout Note: Layout Note:
+1.2V
Place near JDIMM1.257,259 Place near JDIMM1.258 DIMM Side
2
RD42
+1.2V +VREFB_CA 1K_0402_1%
+2.5V +0.6VS +3VS
1
10U 6.3V M X5R 0402
CD54
10U 6.3V M X5R 0402

CD55
10U 6.3V M X5R 0402

CD56
10U 6.3V M X5R 0402

CD57
10U 6.3V M X5R 0402

CD58
10U 6.3V M X5R 0402

CD59
1 1 1 1 1 1 1
1
1
1U_0201_6.3V6M
CD60
1U_0201_6.3V6M
CD61
1U_0201_6.3V6M
CD62
1U_0201_6.3V6M
CD63
1U_0201_6.3V6M
CD64
1U_0201_6.3V6M
CD65 NO_OBR@
1U_0201_6.3V6M
CD66 NO_OBR@
1U_0201_6.3V6M
CD67 NO_OBR@
+ CD68 +VREFB_CA
330U_D3_2.5VY_R6M
2
2 2 2 2 2 2
NO_OBR@
NO_OBR@
NO_OBR@
10U 6.3V M X5R 0402

CD70
10U 6.3V M X5R 0402

CD71
1U_0201_6.3V6M
CD72
0.1U_0201_10V6K
CD73
1U_0201_6.3V6M
CD74
10U 6.3V M X5R 0402

CD75
10U 6.3V M X5R 0402

CD76
0.1U_0201_10V6K
CD77
2.2U_0402_6.3V6M
CD78
0.1U_0201_10V6K
CD79
0.1U_0201_10V6K
CD80
@ 1 1 1 1 1 1
2 1 2 2 2 2
2
@ @
2
2 2 2 2 2 2
@
RD43
1 1 1 1 1K_0402_1%
1
4 4

DDR4 SO-DIMM
C 0.4
A B C D E
5 4 3 2 1
CAMERA POWER CIRCUIT LCD POWER SWITCH

+3VS +3VS_CMOS +3VS +LCDVDD_CONN
W=60mils U5
5 1 +LCDVDD R2 1 @ 2 0_0805_5%
D R3 1 @ 2 0_0603_5% IN OUT D
2
W=60mils
GND 1
1
W=20mils 1 1 C4
C5 C6 1U_0201_6.3V6M 4 3 C3
<7> ENVDD EN OC 4.7U_0402_6.3V6M
0.1U_0201_10V6K 10U_0603_6.3V6M
2
@ EM5203AJ-20 SOT23 5P 2
2 2 SA00008R900
DISPLAY OFF EDP CONNECTOR

+3VS
B+ +LEDVDD +LCDVDD_CONN
U2
U74AHC1G08G-AL5-R_SOT353-5
C
SA00000OH00 C
5
@ R9 1 @ 2 0_0805_5%
From PCH 2
P
<7,28> ENBKL B 4 DISPOFF# 1 JEDP1
1 Y C7 1
From EC <28> BKOFF# A 1
G
4.7U_0805_25V6-K 2
2
2
@ 3
3 3
2
R7 2 4
R265 100K_0402_5% 5 4
<7> INVTPWM 6 5
100K_0402_5% DISPOFF#
@ EDP_HPD 7 6
<7> EDP_HPD
1
8 7
1
9 8
R1 1 @ 2 0_0402_5% C8 1 2 0.1U_0201_10V K X5R EDP_AUXN_C 10 9
eDP <7> EDP_AUXN
C9 1 2 0.1U_0201_10V K X5R EDP_AUXP_C 11 10
<7> EDP_AUXP 11
12
C10 1 2 0.1U_0201_10V K X5R EDP_TXP0_C 13 12
<7> EDP_TXP0 13
C11 1 2 0.1U_0201_10V K X5R EDP_TXN0_C 14
<7> EDP_TXN0 14
TOUCH SCREEN POWER CIRCUIT

15
C12 1 2 0.1U_0201_10V K X5R EDP_TXP1_C 16 15
<7> EDP_TXP1 16
C13 1 2 0.1U_0201_10V K X5R EDP_TXN1_C 17
<7> EDP_TXN1 18 17
19 18
+3VS +3VS_TS 20 19
21 20
B B
22 21
23 22
24 23
R264 1 @ 2 0_0603_5% 25 24
26 25
<22> HUB_USB20_N1 26
W=20mils 1 1 27
C230 C231 Touch Screen <22> HUB_USB20_P1 28 27
+3VS_TS 28
0.1U_0201_10V6K 10U_0603_6.3V6M 29
<28> TS_DISABLE# 30 29
@
2 2 <9> USB20_N3 31 30
Camera <9> USB20_P3
32 31
+3VS_CMOS 32
33
34 33
35 34
36 35 41
36 GND
ESD COMPONENTS
+3VS 37 42
38 37 GND 43
Microphone <21> DMIC_CLK
39 38 GND 44
<21> DMIC_DAT 39 GND
40 45
40 GND
DT6
USB20_N3 3 6 DMIC_DAT CVILU_CVS3402M1RM-NH
I/O2 I/O4 SP01002FV00
ME@
A A
2 5
GND VDD
DMIC_CLK 1 4 USB20_P3 Issued Date 2018/11/05 Deciphered Date 2019/11/05 Title
I/O1 I/O3
L30ESDL5V0C6-4_SOT23-6 THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
eDP/CAMERA
SC300004W00
B 0.4
@ESD@ DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
5 4 3 2 1
5 4 3 2 1
HDMI DIFFERENTIAL SIGNALS HDMI POWER CIRCUIT
LH1
CH1 1 2 0.1U_0201_10V K X5R HDMI_CLKP 4 3 HDMI_L_CLKP
<7> APU_DP1_P3
D D
CH2 1 2 0.1U_0201_10V K X5R HDMI_CLKN 1 2 HDMI_L_CLKN

<7> APU_DP1_N3
HCM1012GH900BP_4P
SM070002R00 +5VS +5V_Display
EMI@
UH1
3
W=40mils
OUT
LH2 1 1
CH3 1 2 0.1U_0201_10V K X5R HDMI_TX_P0 4 3 HDMI_L_TX_P0 IN CH10
<7> APU_DP1_P2 1
CH9 2 0.1U_0201_10V K X5R
GND
0.1U_0201_10V K X5R
CH4 1 2 0.1U_0201_10V K X5R HDMI_TX_N0 1 2 HDMI_L_TX_N0 @ 2
<7> APU_DP1_N2 2 S IC AP2330W-7 SC59 3P PWR SW
HCM1012GH900BP_4P SA00004ZA00
SM070002R00
EMI@
LH3
CH5 1 2 0.1U_0201_10V K X5R HDMI_TX_P1 4 3 HDMI_L_TX_P1
<7> APU_DP1_P1
CH6 1 2 0.1U_0201_10V K X5R HDMI_TX_N1 1 2 HDMI_L_TX_N1

<7> APU_DP1_N1
HCM1012GH900BP_4P
SM070002R00
EMI@
LH4
HDMI_TX_P2 HDMI_L_TX_P2
HDMI CONNECTOR
C <7> APU_DP1_P0 CH7 1 2 0.1U_0201_10V K X5R 4 3 C
CH8 1 2 0.1U_0201_10V K X5R HDMI_TX_N2 1 2 HDMI_L_TX_N2

<7> APU_DP1_N0
HCM1012GH900BP_4P
SM070002R00
EMI@
+3VS
EMI
RH4 1 2 499_0402_1%
1
RH5 1 2 499_0402_1% C JHDMI1
1 2 QH1 2 HDMI_HPD_R 1 2 150K_0402_5% HDMI_HPD 19
RH6 499_0402_1% RH1
MMBT3904_NL_SOT23-3 HP_DET
RH7 1 2 499_0402_1% B
+5V_Display 18
SB000014T00 E 17 +5V
3
HDMI_CTRL_DAT 16 DDC/CEC_GND
HDMI_CTRL_CLK 15 SDA
14 SCL
13 Reserved
<7> APU_DP1_HPD HDMI_L_CLKN CEC
RH8 1 2 499_0402_1% 12
RH9 1 2 499_0402_1% 11 CK- 23
CK_shield GND
2
RH10 1 2 499_0402_1% HDMI_L_CLKP 10 22
RH11 1 2 499_0402_1% HDMI_L_TX_N0 9 CK+ GND 21
RH3 RH2 8 D0- GND 20
100K_0402_5% 200K_0402_5% HDMI_L_TX_P0 7 D0_shield GND
@ HDMI_L_TX_N1 6 D0+
1
+3VS 5 D1-
HDMI_L_TX_P1 4 D1_shield
D1+
1
D HDMI_L_TX_N2 3
2 2 D2-
G HDMI_L_TX_P2 1 D2_shield
D2+
S LOTES_AHDM0064-P001A
3
QH2 DC232007B00
B B
2N7002KW_SOT323-3 ME@
SB000009Q80
AUX LEVEL SHIFTER ESD COMPONENTS

+3VS +3VS +5V_Display
DH1 DH2 DH3

HDMI_CTRL_CLK 9 10 1 HDMI_CTRL_CLK HDMI_L_CLKP 9 10 1 HDMI_L_CLKP HDMI_L_TX_P2 9 10 1 HDMI_L_TX_P2
1 1 1
1
HDMI_CTRL_DAT 8 9 2 HDMI_CTRL_DAT HDMI_L_CLKN 8 9 2 HDMI_L_CLKN HDMI_L_TX_N2 8 9 2 HDMI_L_TX_N2

2 2 2
RH12 RH13 QH3A RH14 RH15
4.7K_0402_5% 4.7K_0402_5% 2N7002KDW 2N SC88-6 2.2K_0402_5% 2.2K_0402_5% HDMI_HPD 7 7 4 HDMI_HPD HDMI_L_TX_P0 7 7 4 HDMI_L_TX_P0 HDMI_L_TX_P1 7 7 4 HDMI_L_TX_P1
4 4 4
2
SB00000EO00
+5V_Display 6 6 5 +5V_Display HDMI_L_TX_N0 6 6 5 HDMI_L_TX_N0 HDMI_L_TX_N1 6 6 5 HDMI_L_TX_N1
5 5 5
2
1 6 HDMI_CTRL_CLK
<7> APU_DP1_CTRL_CLK
3 3 3 3 3 3
5
8 8 8
4 3 HDMI_CTRL_DAT
<7> APU_DP1_CTRL_DAT
L05ESDL5V0NA-4 SLP2510P8 ESD L05ESDL5V0NA-4 SLP2510P8 ESD L05ESDL5V0NA-4 SLP2510P8 ESD
QH3B SC300002C00 SC300002C00 SC300002C00
2N7002KDW 2N SC88-6 @ESD@ @ESD@ @ESD@
SB00000EO00
A A

HDMI
C 0.4
5 4 3 2 1
A B C D E
WLAN POWER CIRCUIT

+3VS +3VS_WLAN
1 1
RWL1 1 @ 2 0_0805_5%
1 1
CWL1 CWL2
4.7U_0402_6.3V6M 0.1U_0201_10V K X5R
2 2 @
NGFF - WLAN / BT CONNECTOR (KEY-E)

+3VS_WLAN
2 2
JWLAN1
1 2
3 GND_1 3.3VAUX_2 4
<9> USB20_P5 USB_D+ 3.3VAUX_4
BT <9> USB20_N5
5
USB_D- LED1#
6
7 8
9 GND_7 PCM_CLK 10
11 SDIO_CLK PCM_SYNC 12
13 SDIO_CMD PCM_OUT 14
15 SDIO_DAT0 PCM_IN 16
17 SDIO_DAT1 LED2# 18
19 SDIO_DAT2 GND_18 20
21 SDIO_DAT3 UART_WAKE 22 UART_0_ARXD_R_DTXD RWL4 1 @ 2 0_0402_5%
23 SDIO_WAKE UART_TX UART_0_ARXD_DTXD <9>
SDIO_RST
24 UART_0_ATXD_R_DRXD RWL5 1 @ 2 0_0402_5%
25 UART_RX 26 UART_0_ATXD_DRXD <9>
27 GND_33 UART_RTS 28
<6> PCIE_ATX_C_DRX_P5 29 PET_RX_P0 UART_CTS 30 RWL6 1 @ 2 0_0402_5%
<6> PCIE_ATX_C_DRX_N5 31 PET_RX_N0 CLink_RST 32 EC_TX <28>
RWL7 1 @ 2 0_0402_5%
33 GND_39 CLink_DATA 34 EC_RX <28>
<6> PCIE_ARX_DTX_P5 35 PER_TX_P0 CLink_CLK 36
<6> PCIE_ARX_DTX_N5 PER_TX_N0 COEX3
WLAN 37 38
39 GND_45 COEX2 40
<9> CLK_PCIE_WLAN REFCLK_P0 COEX1 SUSCLK_R
3 41 42 RWL8 1 @ 2 0_0402_5% 3
<9> CLK_PCIE_WLAN# REFCLK_N0 SUSCLK(32KHz) WL_RST# RTC_CLK_R <9>
43 44 RWL9 1 @ 2 0_0402_5%
2 0_0402_5% CLKREQ_WLAN#_R GND_51 PERST0# BT_DISABLE_R APU_PCIE_RST# <8,17,20>
<9> CLKREQ_WLAN# RWL2 1 @ 45 46 RWL101 @ 2 0_0402_5%
CLKREQ0# W_DISABLE2# WLAN_DISABLE_R APU_BT_OFF# <9>
47 48 RWL111 @ 2 0_0402_5%
49 PEWAKE0# W_DISABLE1# 50 APU_WL_OFF# <9>
51 GND_57 I2C_DAT 52
53 RSVD/PCIE_RX_P1 I2C_CLK 54
55 RSVD/PCIE_RX_N1 I2C_IRQ 56
Note: The real behavior of BT_DISABLE are
57 GND_63 RSVD_64 58 BT_DISABLE=LOW, BT=OFF
RSVD/PCIE_TX_P1 RSVD_66
2
59 60 BT_DISABLE=HIGH, BT=ON
61 RSVD/PCIE_TX_N1 RSVD_68 62 RWL12
63 GND_69 RSVD_70 64 100K_0402_5%
65 RSVD_71 3.3VAUX_72 66
67 RSVD_73 3.3VAUX_74
1
GND_75 68
69 GND1
GND2
BELLW_80152-3221
SP070013E00
ME@
4 4

WLAN/BT
0.4
A B C D E
A B C D E
PCIE / SATA MUX (PERICOM PI3PCIE3212ZBEX)

+3VS
1 1
2 2 2
CSSD4 @ CSSD5 @ CSSD6
0.1U_0201_10V6K 0.1U_0201_10V6K 0.1U_0201_10V6K
UMUX1 1 1 1
SATA_ARX_DTX_P0 CHD24 1 2 0.01U_0402_16V7K SATA_ARX_C_DTX_P0 19 1
<6> SATA_ARX_DTX_P0 SATA_ARX_DTX_N0 1 2 0.01U_0402_16V7K SATA_ARX_C_DTX_N0 18 B0+ VDD 6
CHD25
<6> SATA_ARX_DTX_N0 SATA_ATX_DRX_P0 SATA_ATX_C_DRX_P0 B0- VDD
CHD27 1 2 0.01U_0402_16V7K 17 10
<6> SATA_ATX_DRX_P0 SATA_ATX_DRX_N0 SATA_ATX_C_DRX_N0 B1+ VDD
CHD26 1 2 0.01U_0402_16V7K 16
<6> SATA_ATX_DRX_N0 B1-
PCIE_ARX_DTX_P0 15 3 PCIE_ARX_RD_DTX_P6
<6> PCIE_ARX_DTX_P0 PCIE_ARX_DTX_N0 14 C0+ A0+ 4 PCIE_ARX_RD_DTX_N6
<6> PCIE_ARX_DTX_N0 PCIE_ATX_C_DRX_P0 C0- A0- PCIE_ATX_RD_DRX_P6
13 7
<6> PCIE_ATX_C_DRX_P0 PCIE_ATX_C_DRX_N0 C1+ A1+ PCIE_ATX_RD_DRX_N6
12 8
<6> PCIE_ATX_C_DRX_N0 C1- A1-
PCIE_DET RSSD8 1 @ 2 0_0402_5% PCIE_DET_R 9 5
<8> PCIE_DET SEL GND 11
2 GND 20
PD GND
21
PGND
PI3PCIE3212ZBEX_TQFN20_2P5X4P5
+3VS SA00006EJ00
Function PD SEL
RSSD9 1 @ 2 10K_0402_5% PCIE_DET_R
Ax to Bx L L (SATA)
Ax to Cx L H (PCIe)
Reserved prevent power leakage.
Hi-Z H X
2 2
SSD POWER CIRCUIT NGFF - SSD CONNECTOR (KEY-M)

+3VS_SSD1
+3VS +3VS_SSD1
JSSD1
RSSD1 1 @ 2 0_0805_5% 1 2
3 GND 3P3VAUX 4
PCIE_ARX_DTX_N3 5 GND 3P3VAUX 6
<6> PCIE_ARX_DTX_N3 PCIE_ARX_DTX_P3 PERn3 NC
1 1 1 7 8
<6> PCIE_ARX_DTX_P3 PERp3 NC
CSSD1 CSSD2 CSSD3 9 10
10U 6.3V M X5R 0402 0.1U_0201_10V6K 0.01U_0402_16V7K PCIE_ATX_C_DRX_N3 11 GND DAS/DSS# 12
<6> PCIE_ATX_C_DRX_N3 PCIE_ATX_C_DRX_P3 PETn3 3P3VAUX
@ 13 14
2 2 2 <6> PCIE_ATX_C_DRX_P3 15 PETp3 3P3VAUX 16
PCIE_ARX_DTX_N2 17 GND 3P3VAUX 18
3 <6> PCIE_ARX_DTX_N2 PCIE_ARX_DTX_P2 PERn2 3P3VAUX 3
19 20
<6> PCIE_ARX_DTX_P2 21 PERp2 NC 22
PCIE_ATX_C_DRX_N2 23 GND NC 24
<6> PCIE_ATX_C_DRX_N2 PCIE_ATX_C_DRX_P2 25 PETn2 NC 26
<6> PCIE_ATX_C_DRX_P2 PETp2 NC
27 28
PCIE_ARX_DTX_N1 29 GND NC 30
<6> PCIE_ARX_DTX_N1 PCIE_ARX_DTX_P1 31 PERn1 NC 32
<6> PCIE_ARX_DTX_P1 PERp1 NC
33 34
PCIE_ATX_C_DRX_N1 35 GND NC 36
<6> PCIE_ATX_C_DRX_N1 PCIE_ATX_C_DRX_P1 PETn1 NC
37 38
<6> PCIE_ATX_C_DRX_P1 PETp1 DEVSLP
39 40
PCIE_ARX_RD_DTX_P6 41 GND NC 42
PCIE_ARX_RD_DTX_N6 43 PERn0/SATA-B+ NC 44
45 PERp0/SATA-B- NC 46
PCIE_ATX_RD_DRX_N6 47 GND NC 48
PCIE_ATX_RD_DRX_P6 49 PETn0/SATA-A- NC 50 PLT_RST_SSD#
PETp0/SATA-A+ PERST#
PCIE RESET
51 52
CLK_PCIE_SSD1# GND CLKREQ# CLKREQ_SSD1# <9>
53 54
<9> CLK_PCIE_SSD1# CLK_PCIE_SSD1 55 REFCLKN PEWake# 56
<9> CLK_PCIE_SSD1 REFCLKP NC
57 58
GND NC
+3VS_SSD1
59 60
PCIE_DET 61 NC SUSCLK(32kHz) 62
+3VS_SSD1 63 PEDET(NC-PCIE/GND-SATA) 3P3VAUX 64
65 GND 3P3VAUX 66
PU at APU side
67 GND 3P3VAUX
U3 GND 68
MC74VHC1G08DFT2G_SC70-5 GND1 69
SA00000OH00 GND2
5
@ BELLW_80159-3221
1 SP070018L00
P
<9> SSD_RST# IN1 PLT_RST_SSD#

4 ME@
2 O
<8,16,20> APU_PCIE_RST# IN2
G
4 4
3
@
RSSD3
100K_0402_5%
2
RSSD2 1 @ 2 0_0402_5%

Title
Issued Date 2018/11/05 Deciphered Date 2019/11/05
SSD
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS C 0.4
A B C D E
A B C D E
1 1
2 2
3 3
4 4

Title
Reserved
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS B 0.4
A B C D E
A B C D E
1
HDD POWER CIRCUIT 1
+5VS 580mA +5VS_HDD
RHD5 1 @ 2 0_0805_5%
1 1
CHD5 CHD6
10U_0402_6.3V6M 0.1U_0201_10V6K
2 2
2 2
HDD CONNECTOR
JHDD1
1
SATA_ATX_DRX_P1 CHD16 1 2 0.01U_0402_16V7K SATA_ATX_C_DRX_P1 2 GND
<6> SATA_ATX_DRX_P1 SATA_ATX_DRX_N1 SATA_ATX_C_DRX_N1 A+
CHD18 1 2 0.01U_0402_16V7K 3
<6> SATA_ATX_DRX_N1 4 A-
SATA_ARX_DTX_N1 CHD17 1 2 0.01U_0402_16V7K SATA_ARX_C_DTX_N1 5 GND
<6> SATA_ARX_DTX_N1 SATA_ARX_DTX_P1 1 2 0.01U_0402_16V7K SATA_ARX_C_DTX_P1 6 B-
CHD19
<6> SATA_ARX_DTX_P1 B+
7
GND
+3V_HDD 8
T2408 9 V33
10 V33
3
11 V33 3
12 GND
13 GND
+5VS_HDD 14 GND
15 V5
16 V5
17 V5
18 GND
19 Reserved
20 GND
21 V12 24
22 V12 GND 23
V12 GND
SDAN_603006-022041
DC01000CE00
ME@
4 4

Title
HDD
A B C D E
USB Charger For Sub Board USB3.0 Connector IO Connector
+5VALW_CHG +5VALW_USB1
+3VL
JIO1
1
47
10K_0402_5%
10K_0402_5%
45 G2 46
+5VALW_USB1 45 G1
44
43 44
R110
R108
42 43
80mil
2
U7 41 42
1 12 USB20_N1_C 40 41
9 IN OUT 10 USB20_P1_C USB20_P1_C 39 40
<28> USB_CHG_STATUS# USB_OC0#_R STATUS# DP_IN USB20_N1_C 39
R112 2 @ 1 0_0402_5% 13 11 38
<9> USB_OC0# FAULT# DM_IN USB3_ARX_DTX_P1 38
<28> USB_CHG_ILIM_SEL 4 2 <9> USB3_ARX_DTX_P1 37
ILIM_SEL DM_OUT USB20_N1 <9> USB3_ARX_DTX_N1 37
<28> USB_CHG_EN 5 3 <9> USB3_ARX_DTX_N1 36
EN DP_OUT USB20_P1 <9> 36
<28> USB_CHG_CTL1 6 15 R113 1 2 2.7M_0402_1% 35
7 CTL1 ILIM_LO 16 R114 1 2 24.9K_0402_1% USB3_ATX_DRX_P1 34 35
<28> USB_CHG_CTL2 CTL2 ILIM_HI <9> USB3_ATX_DRX_P1 USB3_ATX_DRX_N1 34
<28> USB_CHG_CTL3 8 14 <9> USB3_ATX_DRX_N1 33
CTL3 GND 17 32 33
T-PAD USB3_ARX_DTX_P2 31 32
<9> USB3_ARX_DTX_P2 USB3_ARX_DTX_N2 31
S IC SN1702001RTER WQFN 16P LOAD SWITCH <9> USB3_ARX_DTX_N2 30
30
1
SA0000B0V00 29
10K_0402_5%
USB3_ATX_DRX_P2 28 29
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
<9> USB3_ATX_DRX_P2 USB3_ATX_DRX_N2 28
<9> USB3_ATX_DRX_N2 27
27
C48 @
C49 @
26
R117
1 1 1 USB20_N2 26
25
<9> USB20_N2
2
USB20_P2 24 25
C50
+VL +5VALW_CHG <9> USB20_P2 24
+5VALW +5VALW_USB2 23
2 2 2 22 23
21 22
Q2 20 21
+3VALW 20
ME2301DC-G_SOT23-3 +3VS 19
SB000013I00 18 19
LID_SW# 17 18
<26,28> LID_SW# APU_PCIE_RST# 17
R111 1 @ 2 0_0603_5% 3 1 16
D
<8,16,17> APU_PCIE_RST# PCIE_ATX_C_DRX_P4 16
1 <6> PCIE_ATX_C_DRX_P4 15
1 PCIE_ATX_C_DRX_N4 14 15
C51 C52 <6> PCIE_ATX_C_DRX_N4 14
13
G
4.7U_0402_6.3V6M 22U_0603_6.3V6M
2
PCIE_ARX_DTX_P4 12 13
2 <6> PCIE_ARX_DTX_P4 PCIE_ARX_DTX_N4 12
2 <6> PCIE_ARX_DTX_N4 11
10 11
CLK_PCIE_SD 9 10
<9> CLK_PCIE_SD CLK_PCIE_SD# 9
<9> CLK_PCIE_SD# 8
CLKREQ_SD# 7 8
<9> CLKREQ_SD# 7
<28> NOVO# NOVO# 6
+VL ON/OFF# 5 6
<28,29> ON/OFF# 5
+VL 4
PWR_LED# 3 4
<28> PWR_LED# PWR_BATT_LOW# 3
R115 1 2 100K_0402_5% <28> PWR_BATT_LOW# 2
1 2
+CHGRTC_R 1
1 ACES_51619-04501-001
1
D SP011807060
+5VALW EC_ON_R C53
R118 1 @ 2 0_0402_5% 2 0.1U_0201_10V K X5R ME@
<28,29,34,36> 3V/5VALW_PG G
2 @
SQ3
3
2N7002KW_SOT323-3
22U_0603_6.3V6M
C55
22U_0603_6.3V6M
C56
22U_0603_6.3V6M
C57
10U 6.3V M X5R 0402

C58
10U 6.3V M X5R 0402

C59
47U_0805_6.3V6M
C60
22U_0603_6.3V6M
C61
22U_0603_6.3V6M
C62
22U_0603_6.3V6M
C63
22U_0603_6.3V6M
C64
1 1 1 1 1 1 1 1 1 1 SB000009Q80
1
@ @ @ @ @ @ @ @ @ @ C54
2 2 2 2 2 2 2 2 2 2 0.1U_0201_10V K X5R
@
2
Improve +5VALW Power Ripple USB Charger Power Switches
USB Power Switch For Sub Board USB3.0 Connector (Non-AOU Port)
+5VALW +5VALW_USB2
2A/Active Low
W=80mils W=80mils
U9
5 1
IN OUT
2
GND
USB_EN# 4 3 R122 1 @ 2 0_0402_5%
<28> USB_EN# EN(EN#) OC# USB_OC1# <9>
0.1U_0201_10V K X5R
C66
1 G524B2T11U_SOT23-5
SA00007BW00
Caps on Sub Board

2018/11/05 2019/11/05 Title
Issued Date Deciphered Date USB3.0 Type-A/IO_CONN
Custom 0.4
A B C D E
ALC3287 SPEAKER
Speaker Connector PN
SP02000RR00
UAUDIO1
EMI wide 40MIL
34 PC_BEEP
6 PCBEEP
I2C_DATA 30 EXT_MIC_RING2 SPEAK 4 ohm : 40MIL
7 MIC2-L/RING2 SPEAK 8 ohm : 20MIL
I2C_CLK 31 EXT_MIC_SLEEVE JSPK1
<8> HDA_SYNC_AUDIO MIC2-R/SLEEVE SPK_L1- SPK_L1-_CONN
15 RA1 1 @ 2 0_0603_5% 1
@EMI@ @EMI@ SYNC 36 SPK_L2+ RA2 1 @ 2 0_0603_5% SPK_L2+_CONN 2 1
CA1 22P_0402_50V8J RA3 2 1 33_0402_5% 14 LINE2-L SPK_R1- RA4 1 @ 2 0_0603_5% SPK_R1-_CONN 3 2
1 BCLK 35 SPK_R2+ RA5 1 @ 2 0_0603_5% SPK_R2+_CONN 4 3 1
<8> HDA_BITCLK_AUDIO LINE2-R 4
17
<8> HDA_SDOUT_AUDIO SDATA-OUT SPK_L2+
42 5
1000P_0402_50V7K
1000P_0402_50V7K
1000P_0402_50V7K
1000P_0402_50V7K
13 SPK-OUT-L+ 6 GND1
DC_DET/EPAD 43 SPK_L1- GND2
HDA_SDIN0_AUDIO SPK-OUT-L- 1 1 1 1
1 RA6 2 16
CA2
EMI@ CA3
EMI@ CA4
EMI@ CA5
<8> HDA_SDIN0 Speaker ACES_50271-0040N-001
33_0402_5% SDATA-IN 44 SPK_R1- SP02000TS00
11 SPK-OUT-R- ME@
NC SPK_R2+ 2 2 2 2
EMI@
45
10 SPK-OUT-R+
NC 27 HP_OUTL
HPOUT-L
9 26 HP_OUTR Headphone
NC HPOUT-R ESD protection needs to be placed near connector side
12
NC +1.8VDD_CODEC
8
1
NC ESD
SPDIF-OUT/GPIO2/DMIC-DATA34/DMIC-CLK-IN +5VS
DMIC_DAT 4
2.2U_0402_6.3V6M
<14> DMIC_DAT GPIO0/DMIC-DATA12 DA1
DMIC_CLK_R SPK_R2+_CONN SPK_L2+_CONN
1
RA7 1 EMI@ 2 BLM15PX221SN1D_2P 5 6 3
<14> DMIC_CLK GPIO1/DMIC-CLK I/O4 I/O2
SM01000NY00 CA6
<28> EC_MUTE# 1 2 PDB 2
2
RA8 @ 0_0402_5% PDB
PLUG_IN 48 5 2
JD1 VDD GND
47
JD2
Place near Pin20 SPK_R1-_CONN 4 1 SPK_L1-_CONN
I/O3 I/O1
+5VDDA_CODEC
GNDA
CA7 1 2 2.2U_0402_6.3V6M 38 AZC099-04S.R7G_SOT23-6

VREF SC300001G00
GNDA
CA8 1 2 2.2U_0402_6.3V6M 39 GNDA @ESD@

LDO1-CAP
+5VDDA_CODEC_5VSTB
GNDA
CA9 1 2 2.2U_0402_6.3V6M 32 33 1 2
MIC2-CAP 5VSTB RA9 10K_0402_5%
2 2
40
EXT_MIC_SLEEVE RA10 1 2 2.2K_0402_5% 29 AVDD1
MIC2-VREFO-R 20
EXT_MIC_RING2 CPVDD/AVDD2 +1.8VDD_CODEC
RA11 1 2 2.2K_0402_5% 28
MIC2-VREFO-L 3
DVDD +3VDD_CODEC
COMBO JACK (NORMAL OPEN)

18 +5VS
+IOVDD_CODEC
wide 40MIL DVDD-IO
+5VS_PVDD
GNDA
CA10 1 2 1U_0201_6.3V6M 25 41 RA12 1 @ 2 0_0805_5%

CPVEE PVDD1
24 46
CBN PVDD2
CA11 1 2 1U_0201_6.3V6M 23 49 1
CBP Thermal_Pad CA14
GNDA
CA13 1 2 2.2U_0402_6.3V6M LDO2 21 37 0.1U_0201_10V K X5R

LDO2-CAP AVSS1
CA15 1 2 2.2U_0402_6.3V6M LDO3 19
LDO3-CAP AVSS2
22 2 EMI
ALC3287-CG_MQFN48_6X6 EXT_MIC_SLEEVE EMI@ RA14 2 1 BLM15BD121SN1D_2P SM010009U00 HGNDB
W=40mils EXT_MIC_RING2 2 1 BLM15BD121SN1D_2P SM010009U00
SA0000BYY00 W=40mils EMI@ RA13 HGNDA
GNDA HP_OUTL EMI@ RA15 1 2 47_0402_5% SD028470A80 HPOUT_L
HP_OUTR EMI@ RA16 1 2 47_0402_5% SD028470A80 HPOUT_R
220P_0402_50V7K
220P_0402_50V7K
1000P_0402_50V7K
1000P_0402_50V7K
2
2
1 1
2
RA17
RA18
CA16
CA17
CA18
CA19
10K_0402_5%
10K_0402_5%
@ @
+5VS --> +5VDDA_CODEC +1.8VS --> +IOVDD_CODEC +3VS --> +3VDD_CODEC
1
2 2
1
GNDA GNDA GNDA GNDA GNDA GNDA
EMI@ EMI@ EMI@ EMI@
3 +5VS +5VDDA_CODEC +3VS +3VDD_CODEC 3
+1.8VS +IOVDD_CODEC
RA19 1 @ 2 0_0603_5% RA20 1 @ 2 0_0603_5% RA21 1 @ 2 0_0402_5%

2.2U_0402_6.3V6M
0.1U_0201_10V K X5R
0.1U_0201_10V K X5R
0.1U_0201_10V K X5R
1 1 1
1
CA20 CA21 CA28 CA22

2
2 2 2
HGNDA / HGNDB , W=60mils JHP1
HGNDA 3 G/M
HPOUT_L 1 L/R
Place near Pin40 Place near Pin18 Place near Pin3 5
5
GNDA
PLUG_IN 6 6
HPOUT_R 2 R/L
+1.8VS --> +1.8VDD_CODEC MISC.

7
HGNDB 4 M/G GND
YUQIU_PJ567-F07M1BE-F
2
DA3 SCA00004300
DA4 SCA00004300
S ZEN ROW CEST23LC5VB C/A SOT-23 USB2.0
S ZEN ROW CEST23LC5VB C/A SOT-23 USB2.0

SP011609088
ME@
1
+1.8VS +1.8VDD_CODEC CA30
RA31 1 @ 2 0_0402_5% 1000P_0402_50V7K
PC_BEEP
@ESD@
RA25 1 @ 2 0_0402_5%
<28> BEEP#
1 2 1 2 @ESD@
2
ESD@
RA27 4.7K_0402_5% CA29 0.1U_0201_10V K X5R
RA26 1 @ 2 0_0402_5% 1 2
0.1U_0201_10V K X5R
<8> HDA_SPKR
1 RA29 4.7K_0402_5%
1
1
4 CA25 RA28 1 @ 2 0_0402_5% RA30 4

0_0402_5%
2 @
RA32 1 @ 2 0_0402_5%
2
Place near Pin20 GND GNDA

EMI PC Beep
GNDA Security Classification Compal Secret Data Compal Electronics, Inc.
HD Audio Codec_ALC3287-CG
Custom 0.4
A B C D E
5 4 3 2 1
USB HUB POWER CIRCUIT CRYSTAL (12 MHz)

D
+3VS +3VALW +3VS_HUB D
HUB@ 1
RHUB1 2 0_0603_5%
Close to P14 Close to P28 Y1
RHUB2 2 @ 1 0_0603_5% 12MHZ_12PF_7V12000011
SJ10000C210
HUB@ Should Replace with 33pF
1U_0201_6.3V6M
CHUB1 HUB@
0.1U_0201_10V6K
CHUB2 HUB@
1U_0201_6.3V6M
CHUB3 HUB@
0.1U_0201_10V6K
CHUB4 HUB@
0.1U_0201_10V6K
CHUB5 HUB@
0.1U_0201_10V6K
CHUB6 HUB@
10U_0402_6.3V6M
CHUB7 HUB@
0.1U_0201_10V6K
CHUB11HUB@
1 1 1 1 1 1 1 1
HUB_X1 1 3 HUB_X2
1 3
CHUB9 1 GND GND 1 CHUB10
2 2 2 2 2 2 2 2 20P_0402_50V8 20P_0402_50V8
HUB@ 2 4 HUB@
2 2
Close to P9 Close to P5 Close to P21 Should Replace with 33pF
C C
USB 2.0 HUB (GENESYS GL850G-OHY50) HUB MISC.

USB20_TS_N1 RHUB10 1 TS@ 2 0_0201_5% USB20_N4
USB20_TS_P1 RHUB11 1 TS@ 2 0_0201_5% USB20_P4
USB20_TS_N1 RHUB12 1 TS@ 2 0_0201_5% HUB_USB20_N1
USB20_TS_P1 RHUB13 1 TS@ 2 0_0201_5% HUB_USB20_P1
+3VS_HUB
Touch Screen By Pass Circuit (Co-Layout with USB HUB) HUB_RSELF
RHUB6 1 HUB@ 2 10K_0402_5%
(Mount this BOM Structure (TS@) when USB HUB (HUB@) is not used) +3VS_HUB
B B
UHUB1
5 1
AVDD DM0 USB20_N4 <9>
9
AVDD DP0
2
USB20_P4 <9> APU RHUB7 1 HUB@ 2 1K_0402_5% HUB_RESET#
14
21 AVDD 3
HUB_USB20_N1 <14>
DVDD DM1
TOUCH SCREEN
1
27 4 1
28 V5 DP1 HUB_USB20_P1 <14>
CHUB8 RHUB3
V33 6 1U_0201_6.3V6M 47K_0402_5%
HUB_USB20_N2 <27>
DM2
DP2
7
HUB_USB20_P2 <27>
FINGER PRINTER HUB@ @
18 2
2
26 TEST/SCL 12
SDA DM3 13
HUB_RESET# 17 DP3
RESET# 15
HUB_X1 10 DM4 16
HUB_X2 11 X1 DP4
X2 25
HUB_RSELF 22 OVCUR1#/SMC 24 Pin 18 TEST:
23 PSELF OVCUR2#/SMD 20 0 : Switch mode.
PGANG OVCUR3# 1 : Chip will be put in test mode.
19 NC : Normal hub operation.
OVCUR4#
1
29 8 RREF
RHUB4 GND RREF
1
A 100K_0402_5% A
HUB@ GL850G-OHY50_QFN28_5X5 RHUB5
SA000066320 680_0402_1%
2
HUB@ HUB@
2
USB2.0 HUB
B 0.4
5 4 3 2 1
5 4 3 2 1
TI@ UT4 TI@ RT28 TI@ RT20 TI@ RT33 TI@ RT35 TI@ RT18 TI@
SN65LVPE512RGER 0_0402_5% 0_0402_5% 4.7K_0402_5% 4.7K_0402_5% 4.7K_0402_5%
SA00008M500
PARADE@ UT4 PARADE@ RT23 PARADE@

PS8713BTQFN24GTR2-A2 4.7K_0402_5%
SA00005OR30
D D
PERICOM@ UT4 PERICOM@ RT33 PERICOM@ RT22 PERICOM@ RT26 PERICOM@

PI3EQX7502AIZDEX TQFN24 4.7K_0402_5% 4.7K_0402_5% 4.7K_0402_5%
SA00006WV00
+3VALW +3VALW
ZZZ X76_TI@ ZZZ X76_PARADE@ ZZZ X76_PERICOM@

UT4
1 1 1
VDD 13 CT34 CT37
VDD 0.01U_0402_16V7K 0.1U_0201_10V K X5R
P3_U1_A_EQ1 4 RD@ RD@
P3_U1_A_DE0 3 NC 15 P3_U1_B_EQ1 2 2
USB3.0 Re-Driver_TI USB3.0 Re-Driver_PARADE USB3.0 Re-Driver_PERICOM DE_A NC
X76XXXXXXXX X76XXXXXXXX X76XXXXXXXX P3_U1_A_EQ0 2 16 P3_U1_B_DE0
P3_U1_A_DE1 6 EQ_A DE_B 17 P3_U1_B_EQ0
NC EQ_B 18 P3_U1_B_DE1
NC
CT38 1 2 0.33U_0402_10V6K RD@ USB3_ARX_C_RD_DTX_P0 12 19 USB3_ARX_RD_DTX_P0 RT38 1 @ 2 0_0402_5%
CT40 1 2 0.33U_0402_10V6K RD@ USB3_ARX_C_RD_DTX_N0 11 TXB+ RXB+ 20 USB3_ARX_RD_DTX_N0 RT39 1 @ 2 0_0402_5%
C TXB- RXB- C
CT39 2 1 0.22U_0402_6.3V6K RD@ USB3_ATX_C_RD_DRX_P0 9 22 USB3_ATX_RD_DRX_P0 CT35 1 2 0.1U_0201_10V K X5R RD@

CT41 2 1 0.22U_0402_6.3V6K RD@ USB3_ATX_C_RD_DRX_N0 8 RXA+ TXA+ 23 USB3_ATX_RD_DRX_N0 CT36 1 2 0.1U_0201_10V K X5R RD@
RXA- TXA-
5 PD#_1_U1
10 RXD_EN 7
21 EN_A# NC 14 TEST3_U1
25 EN_B# NC 24 I2C_EN1_U1
GPAD NC
1
PI3EQX7502AIZDEX_TQFN24_4X4 RT36 RT37
SA00006WV00 4.99K_0402_1% 4.7K_0402_5%
@ @ @
2
B
+3VALW +3VALW +3VALW +3VALW +3VALW +3VALW +3VALW +3VALW +3VALW +3VALW +3VALW B
1
1
RT32 RT34 RT17 RT19 RT21 RT23 RT25 RT27 RT29 RT30 RT31
4.7K_0402_5% 4.7K_0402_5% 4.7K_0402_5% 4.7K_0402_5% 4.7K_0402_5% 4.7K_0402_5% 4.7K_0402_5% 4.7K_0402_5% 4.7K_0402_5% 4.7K_0402_5% 4.7K_0402_5%
@ @ @ @ @ @ @ @ @ @ @
2
2
P3_U1_B_EQ0 P3_U1_B_EQ1 P3_U1_B_DE0 P3_U1_B_DE1 P3_U1_A_EQ0 P3_U1_A_EQ1 P3_U1_A_DE0 P3_U1_A_DE1 TEST3_U1 I2C_EN1_U1 PD#_1_U1
1
1
RT33 RT35 RT18 RT20 RT22 RT24 RT26 RT28
4.7K_0402_5% 4.7K_0402_5% 4.7K_0402_5% 4.7K_0402_5% 4.7K_0402_5% 4.7K_0402_5% 4.7K_0402_5% 4.7K_0402_5%
@ @ @ @ @ @ @ @
2
2
A A

Type-C_USB3.0_Re-Driver
B 0.4
5 4 3 2 1
5 4 3 2 1
TYPE-C - CC+MUX (RTS5448-GR)

+5VALW +VCON_IN_5448 +5VALW +5V_IN_5448
RT1 1 @ 2 0_0603_5% RT2 1 @ 2 0_0603_5%
+5V_IN_5448
D CC1_5448_CONN CC2_5448_CONN D
+VCON_IN_5448 +LDO_3V3_5448
1 1
1
CT3 CT4
CT1 CT2 10U_0402_6.3V6M 0.1U_0201_10V K X5R
220P_0402_50V8J 220P_0402_50V8J 1 1 SE00000UD00
2
CT5 CT6 2 2
0.1U_0201_10V K X5R 4.7U_0402_6.3V6M
SE00000SO00
2 2
13
19
20
UT1
USB3_MRX_DTX_P2 CT23 1 2 0.33U_0402_10V6K USB3_MRX_C_DTX_P2 1
LDO_3V3
VCON_IN
5V_IN
<25> USB3_MRX_DTX_P2 USB3_MRX_DTX_N1 1 2 USB3_MRX_C_DTX_N1 2 C_RX2_1N/2P 14 CC2_5448_CONN
CT24 0.33U_0402_10V6K CC2_5448_CONN <25>
<25> USB3_MRX_DTX_N1 USB3_MRX_DTX_P1 USB3_MRX_C_DTX_P1 C_RX1_1P/2N CC2 VBUS_EN_5448
CT25 1 2 0.33U_0402_10V6K 3 15 VBUS_EN_5448 <25>
<25> USB3_MRX_DTX_P1 USB3_ARX_DTX_N0 1 2 USB3_ARX_C_MTX_N0 4 C_RX1_1N/2P VBUS_EN 16 OCP_DET_5448_R
CT7 0.33U_0402_10V6K
<9> USB3_ARX_DTX_N0 USB3_ARX_DTX_P0 USB3_ARX_C_MTX_P0 SSRX_1P/2N OCP_DET VMON_5448
CT8 1 2 0.33U_0402_10V6K 5 17
<9> USB3_ARX_DTX_P0 USB3_ATX_DRX_N0 USB3_ATX_C_MRX_N0 SSRX_1N/2P INPUT VMON
CT9 1 2 0.22U_0402_6.3V6K 6 18 RT3 1 2 6.2K_0402_1%
<9> USB3_ATX_DRX_N0 USB3_ATX_DRX_P0 USB3_ATX_C_MRX_P0 SSTX_1P/2N REXT
CT10 1 2 0.22U_0402_6.3V6K 7
<9> USB3_ATX_DRX_P0 USB3_MTX_C_DRX_N1 USB3_MTX_DRX_N1 SSTX_1N/2P
CT11 1 2 0.1U_0201_10V6K 8
<25> USB3_MTX_C_DRX_N1 USB3_MTX_C_DRX_P1 1 2 USB3_MTX_DRX_P1 9 C_TX1_1P/2N 21 TYPEC_LIMIT_CTL1
CT12 0.1U_0201_10V6K TYPEC_LIMIT_CTL1 <28>
<25> USB3_MTX_C_DRX_P1 USB3_MTX_C_DRX_P2 USB3_MTX_DRX_P2 C_TX1_1N/2P RP_SEL_M1 TYPEC_LIMIT_CTL2
CT13 1 2 0.1U_0201_10V6K 10 22 TYPEC_LIMIT_CTL2 <28>
<25> USB3_MTX_C_DRX_P2 USB3_MTX_C_DRX_N2 USB3_MTX_DRX_N2 C_TX2_1N/2P RP_SEL_M0 DIR_SET
CT14 1 2 0.1U_0201_10V6K 11 23
<25> USB3_MTX_C_DRX_N2 CC1_5448_CONN 12 C_TX2_1P/2N NC 24 USB3_MRX_C_DTX_N2 1 2
<25> CC1_5448_CONN CC1 C_RX2_1P/2N USB3_MRX_DTX_N2 <25>
25 CT26 0.33U_0402_10V6K
GND
DIR_SET
2
USB3_MRX_DTX_P2 RT62 1 2 220K_0402_5% RTS5448-GR QFN 24P TYPE-C
USB3_MRX_DTX_N1 RT63 1 2 220K_0402_5% SA0000AXR00 RT61
USB3_MRX_DTX_P1 RT64 1 2 220K_0402_5% 10K_0402_5%
USB3_MRX_DTX_N2 RT65 1 2 220K_0402_5%
1
C C
MUX MISC.
+LDO_3V3_5448 +LDO_3V3_5448
2
RT4 RT5
10K_0402_5% 10K_0402_5%
1
TYPEC_LIMIT_CTL1 TYPEC_LIMIT_CTL2
1
RT6 @ RT7 @
10K_0402_5% 10K_0402_5%
2
B B
Rp Configuration
+VBUS_5448 +5V_IN_5448 +5V_IN_5448

1
RT8 RT9 RT10

200K_0402_1% 4.7K_0402_5% @ 4.7K_0402_5%
2
VMON_5448 VBUS_EN_5448 OCP_DET_5448 1 @ 2 OCP_DET_5448_R

OCP_DET_5448_R <25>
RT11 0_0603_5%
1
1
RT12 RT14 @
10K_0402_1% RT13 10K_0402_5%
10K_0402_5%
2
2
For C_VBUS For C_VBUS

(Power Switch Enable Pin) (Power Switch OCP Pin)
A A

Type-C_RTS5448
5 4 3 2 1
5 4 3 2 1
ESD COMPONENTS TYPE-C CONNECTOR

DT1
USB3_MTX_C_DRX_N1 9 10 1 1 USB3_MTX_C_DRX_N1 +VBUS_5448 +VBUS_5448_R
Over Current Protection Pin: JT1 @
D USB3_MTX_C_DRX_P1 USB3_MTX_C_DRX_P1 If Over Current Occurred - From High to Low. D
8 9 2 2 1 2
1 2
1
USB3_MTX_C_DRX_P2 USB3_MTX_C_DRX_P2
20V_PRTCT@
10U_0603_25V6M
CT16
150U_B2_6.3VM_R35M
CT33 SGA00001E10 @
7 7 4 4 JUMP_43X79 1 +
1
USB3_MTX_C_DRX_N2 6 6 5 5 USB3_MTX_C_DRX_N2 +5VALW +VBUS_5448 CT15 UT3
10U_0402_6.3V6M
3 3 SE00000UD00 B1 C2 2 2
2 C1 VINT VBUS D1
8 B2 VINT VBUS D2
VINT VBUS
1
L05ESDL5V0NA-4 SLP2510P8 ESD UT2 CT17
SC300005900 5 1 10U_0603_25V6M A3
ESD@ IN OUT @ +VBUS_5448 A2 ILIM
3 2 FAULT B3
<24> OCP_DET_5448_R 4 FLAG 2 A1 GND C3
<24> VBUS_EN_5448 EN(#EN) GND EN GND
DT2 D3
GND
1
USB3_MRX_DTX_P1 9 10 1 1 USB3_MRX_DTX_P1 G517G1TO1U_TSOT23-5
1
SA00009XD00 NX5P3090UK_WLCSP12 RT16
USB3_MRX_DTX_N1 8 9 2 2 USB3_MRX_DTX_N1 RT15 SA00009LF00 16K_0402_1%
1
CT18 10K_0402_5% 20V_PRTCT@ 20V_PRTCT@
USB3_MRX_DTX_P2 7 7 4 4 USB3_MRX_DTX_P2 10U_0402_6.3V6M 20V_PRTCT@
2
2
USB3_MRX_DTX_N2 6 6 5 5 USB3_MRX_DTX_N2 2
C C
3 3
L05ESDL5V0NA-4 SLP2510P8 ESD 20 Volts Protection Circuit

SC300005900
ESD@
+VBUS_5448_R +VBUS_5448_R
DT4
USB20_P0_R 3 6 CC1_5448_CONN
I/O2 I/O4
JUSBC1
A1 B12
2 5 GND GND
GND VDD USB3_MTX_C_DRX_P1 A2 B11 USB3_MRX_DTX_P1
<24> USB3_MTX_C_DRX_P1 USB3_MTX_C_DRX_N1 SSTXP1 SSRXP1 USB3_MRX_DTX_N1 USB3_MRX_DTX_P1 <24>
A3 B10
<24> USB3_MTX_C_DRX_N1 SSTXN1 SSRXN1 USB3_MRX_DTX_N1 <24>
CC2_5448_CONN 1 4 USB20_N0_R CT19 1 2 0.47U_0402_25V6K A4 B9 CT20 1 2 0.47U_0402_25V6K
I/O1 I/O3 VBUS VBUS
AZC099-04S.R7G_SOT23-6 CC1_5448_CONN A5 B8
<24> CC1_5448_CONN CC1 SBU2
SC300005Y00
ESD@ USB20_P0_R A6 B7 USB20_N0_R
USB20_N0_R A7 DP1 DN2 B6 USB20_P0_R
B B
DN1 DP2
A8 B5 CC2_5448_CONN
SBU1 CC2 CC2_5448_CONN <24>
CT21 1 2 0.47U_0402_25V6K A9 B4 CT22 1 2 10U_0402_6.3V6M
VBUS VBUS
USB2.0
USB3_MRX_DTX_N2 A10 B3 USB3_MTX_C_DRX_N2
<24> USB3_MRX_DTX_N2 USB3_MRX_DTX_P2 SSRXN2 SSTXN2 USB3_MTX_C_DRX_P2 USB3_MTX_C_DRX_N2 <24>
A11 B2
<24> USB3_MRX_DTX_P2 SSRXP2 SSTXP2 USB3_MTX_C_DRX_P2 <24>
A12 B1
GND GND
ESD
3
1 4 DT5
LT1 EMI@ 2 GND GND 5 L30ESD24VC3-2_SOT23-3
USB20_P0 2 1 USB20_P0_R 3 GND GND 6 SCA00001G00
<9> USB20_P0 2 1 GND GND
ESD@
1
USB20_N0 3 4 USB20_N0_R
<9> USB20_N0 3 4 DRAPH_UB11245-B200B-1H
DLM0NSN900HY2D_4P SP061806060
SM070005U00 ME@
A A

Type-C_CONNECTOR
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS B 0.4
5 4 3 2 1
FAN LID
+5VS
+3VALW
UHS1 14@
RF1 1 @ 2 0_0603_5%
APX8132AI-TRG_SOT23-3
1 SA00008K800
CF1
10U 6.3V M X5R 0402
LID_SW# 3 2
GND
2 <20,28> LID_SW# VOUT VDD
2 1 CHS2
JFAN1
CHS1 0.1U_0201_10V6K
1
6
5 GND2 10P_0402_50V8J 14@
GND1 1 14@ 2
4
3 4
<28> EC_FAN_PWM1 3
2
<28> EC_FAN_SPEED1 +5VS_FAN1 1 2
1
ACES_50271-0040N-001
SP02000TS00
ME@
THERMISTOR THERMAL SENSOR

+3VS +3VS
+EC_VCCA +EC_VCCA
1
RTS7
10K_0402_5%
UTS1 EX_THM@
1
1
@
RTS1 RTS2
16.5K_0402_1% 16.5K_0402_1%
2
1 10
VDD SMCLK EC_SMB_CK2 <7,28>
REMOTE1+ 2 9
2
2
DP1 SMDATA EC_SMB_DA2 <7,28>
1 CTS5
CUST_TEMP1 CUST_TEMP2 REMOTE1- 3 8
0.1U_0201_10V6K DN1 ALERT#
<28> CUST_TEMP1 <28> CUST_TEMP2
EX_THM@
REMOTE2+ 4 7
2 DP2 THERM#
1
1
REMOTE2- 5 6
RTS4 RTS5 DN2 GND
100K +-1% 0402 B25/50 4250K 100K +-1% 0402 B25/50 4250K
SL200002H00 SL200002H00
EMC1403-2-AIZL-TR_MSOP10
2
SA000046C00
Address 1001_101xb
ECAGND ECAGND
Close to APU Close to DDR

REMOTE1+ REMOTE1+
1
C QTS1
1
MMST3904-7-F_SOT323-3
+EC_VCCA CTS3 @ CTS1 2
B SB000002R00
2200P_0402_25V7K 2200P_0402_25V7K
EX_THM@
2
EX_THM@ 2 REMOTE1- E
3
REMOTE1-
1
RTS3
16.5K_0402_1%
Close to VRAM
2
REMOTE2+ REMOTE2+
CUST_TEMP3 1
C QTS2
1
<28> CUST_TEMP3
MMST3904-7-F_SOT323-3
CTS4 @ CTS2 2
B SB000002R00
2200P_0402_25V7K 2200P_0402_25V7K
1
EX_THM@
2
EX_THM@ 2 REMOTE2- E
RTS6
3
REMOTE2-
100K +-1% 0402 B25/50 4250K
SL200002H00
2
Close to UTS1 Close to Charger CHOKE

ECAGND FAN/THERMISTOR
Close to Charger AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
Custom 0.4
TOUCH PAD KEYBOARD BACKLIGHT
+3VS
+3VS RTP1 1 @ 2 0_0402_5%
1
CTP1
1
1U_0201_6.3V6M
RTP3 RTP4 RTP2 @
1K_0402_5% 1K_0402_5% 4.7K_0402_5% 2
2
JTP1
+TP_VCC 8
7 8 10 +5VS +5VS_KBL
<8> I2C_3_SCL_R 7 G2
6 9
<8> I2C_3_SDA_R 5 6 G1 +5VALW QKBL1
4 5 ME2301DC-G_SOT23-3
3 4 KBL@
3
1
TP_INT# 2 JKBL1
<8> TP_INT# 2
1 3 1 1
D
RKBL1
<28> TP_DISABLE# 1 2 1
10K_0402_5%
ACES_51522-00801-001 KBL@ 3 2 5
1 1 3 G1
CTP2 CTP3 SP01001AE00 4 6
G
1 2
2
150P_0402_50V8J 150P_0402_50V8J ME@ CKBL1 CKBL2 4 G2
<28> KB_BL_PWM RKBL2 1 2 30K_0402_1% 10U_0402_6.3V6M 0.1U_0201_10V K X5R ACES_52501-00401-W01
2 2 KBL@ @ KBL@ SP011806072
2 1 ME@
1
2
CKBL3
DTP1 0.01U_0402_16V7K
PSOT24C_SOT23-3 KBL@
2
@ESD@ S340_15"
1
ESD
+5VS_KBL
JKBL2
1
2 1
2
FINGER PRINTER (RESERVED)

3
4 3
5 4
6 G1
G2
ACES_51570-00401-P02
SP01002LF00
ME@
S340_14"
JFP1
1
2 1
3 2
4 3
5 4
6 5 9
<22> HUB_USB20_P2 7 6 G1 10
<22> HUB_USB20_N2 +3VALW_3VS_FP 7 G2
+3VS RFP1 1 @ 2 0_0402_5% 8
8
+3VALW RFP2 1 @ 2 0_0402_5% ACES_51522-00801-001
SP01001AE00
CFP1 ME@
0.1U_0201_10V K X5R
FP@
3
DFP1
KEYBOARD
L03ESDL5V0CC3-2_SOT23-3
@ESD@
1
ESD
JKB2
34
GND2 33
RKB1 1 @ 2 0_0402_5% PWR_CAPS_LED 32 GND1
+5VS CAPS_LED#_R 32
RKB2 1 2 470_0402_5% 31
<28> CAPS_LED# 30 31
KSO15
KSO10 29 30
KSO11 28 29
1 28
BATTERY LED
CKB1 KSO14 27
0.1U_0201_10V K X5R KSO13 26 27
@ESD@ KSO12 25 26
2 KSO3 24 25
KSO6 23 24
KSO8 22 23
KSO7 21 22
KSO4 20 21
KSO2 19 20
KSI[0..7] KSI0 18 19
KSI[0..7] <28> 18
KSO1 17
KSO[0..17] KSO5 16 17
KSO[0..17] <28> 15 16
KSI3
KSI2 14 15
KSO0 13 14
KSI5 12 13
KSI4 11 12
KSO9 10 11
LED1 KSI6 9 10
KSI7 8 9
BATT_CHG_LED# RS1 1 2 412_0402_1% 1 2 KSI1 7 8
<28> BATT_CHG_LED# 7
KSO16 6
KSO17 5 6
LTW-C193TS5-C_WHITE RKB5 1 2 470_0402_5% NUM_LED#_R 4 5
<28> NUM_LED# 3 4
SC50000BB10
+VL 3
2
<28> KB_MUTLI_KEY 2
LED2 1
1
BATT_LOW_LED# RS3 1 2 523_0402_1% 1 2 ACES_51612-0320M-001
<28> BATT_LOW_LED#
A SP011410151
ME@
LTST-C191KFKT-2CA_ORANGE
SC500005930
Place on Top

KB/KBL/FP/TP/LED
Embedded Controller KB_MUTLI_KEY R79 1 2 10K_0402_5%
+3VL
+3VL +3VL
+3VALW_EC +5VALW
R53 1 @ 2 0_0603_5% +3VALW_EC L1
BLM15AX601SN1D_0402_2P
1 2 USB_EN# R54 1 2 10K_0402_5%
1 +EC_VCCA
C234 @ SM01000KL00 1
1 1 1 1 100P_0402_50V8J C67
0.1U_0201_10V6K
C235
0.1U_0201_10V6K
C233
1000P_0402_50V7K
C68
1000P_0402_50V7K
C69
0.1U_0201_10V6K
2 +3VALW
1 2 2
2 2 @ 2 @ 2 L2
+EC_VCCA BLM15AX601SN1D_0402_2P LID_SW# R55 1 2 100K_0402_5%
SM01000KL00
EC_MUTE# R56 1 @ 2 10K_0402_5%
111
125
ECAGND
22
33
96
67
9
UEC1 EC_PCIE_WAKE# R57 1 2 10K_0402_5%
VCC0
VCC_LPC
VCC
VCC
VCC
VCC
AVCC
1 21
ESD C71
@ESD@
2 1 0.1U_0201_10V6K
<27> KB_MUTLI_KEY GATEA20/GPIO00 EC_VCCST_PG/GPIO0F
2 23
<9> KB_RST# BEEP# <21>
EMI <9>
<9>
SERIRQ
LPC_FRAME#
3
4
5
KBRST#/GPIO01
SERIRQ
LPC_FRAME# PWM Output
BEEP#/GPIO10
EC_FAN_PWM/GPIO12
AC_OFF/GPIO13
26
27 EC_FAN_PWM1 <26>
<9> LPC_AD3 7 LPC_AD3 VCIN1_BATT_TEMP C72 1 2 100P_0402_50V8J

@EMI@ @EMI@
<9> LPC_AD2 LPC_AD2
C73 2 1 22P_0402_50V8J R58 2 1 10_0402_5% 8 63
<9> LPC_AD1 LPC_AD1 VCIN1_BATT_TEMP/AD0/GPIO38 VCIN1_BATT_TEMP <32,33> VCIN1_AC_IN
10 64 1 2 100P_0402_50V8J
LPC_AD0LPC & MISC
C74
<9> LPC_AD0 VCIN1_BATT_DROP/AD1/GPIO39 65
ADP_I/AD2/GPIO3A ADP_I <33>
12 AD Input 66 R59 1 @ 2 4.7K_0402_5%
<9> LPC_CLK0_EC LPC_RST#_R 13 CLK_PCI_EC AD_BID/AD3/GPIO3B 75 CUST_TEMP3 <26>
<9> LPC_RST#_R EC_RST# PCIRST#/GPIO05 AD4/GPIO42 TS_DISABLE# <14>
+3VALW_EC R60 2 @ 1 47K_0402_5% 37 76
EC_RST# AD5/GPIO43 CUST_TEMP2 <26>
20
<9> EC_SCI# 38 EC_SCI#/GPIO0E
2 CLKRUN#
<9> CLKRUN# CLKRUN#/GPIO1D
C70 68
DA0/GPIO3C NOVO# <20>
0.1U_0201_10V6K DA Output EN_DFAN1/DA1/GPIO3D 70
1 TP_DISABLE# <27>
KSI0 55 71
KSI1 56 KSI0/GPIO30 DA2/GPIO3E 72 3V/5VALW_PG_R R61 1 @ 2 0_0402_5%
KSI1/GPIO31 DA3/GPIO3F USB_EN# <20> 3V/5VALW_PG <20,29,34,36>
KSI2 57
KSI3 58 KSI2/GPIO32 83
KSI4 59 KSI3/GPIO33 EC_MUTE#/PSCLK1/GPIO4A 84
KSI5 60 KSI4/GPIO34 USB_EN#/PSDAT1/GPIO4B 85 ESD@
KSI6 61 KSI5/GPIO35 PSCLK2/GPIO4C 86 1 2 0.1U_0201_10V K X5R
KSI6/GPIO36 PS2 Interface PSDAT2/GPIO4D
C75
KSI7 62 87
39 KSI7/GPIO37 TP_CLK/GPIO4E 88 USB_CHG_ILIM_SEL <20>
KSO0
<27> KSO[0..17]
KSO[0..17]
KSI[0..7]
KSO1
KSO2
KSO3
40
41
42
KSO0/GPIO20
KSO1/GPIO21
KSO2/GPIO22
TP_DATA/GPIO4F
97
ESD
<27> KSI[0..7] KSO3/GPIO23 ENKBL/GPXIOA00 0.8VS_PWR_EN ENBKL <7,14>
KSO4 43 98
44 KSO4/GPIO24 WOL_EN/GPXIOA01 99 1.8VS_PWR_EN 0.8VS_PWR_EN <29>
KSO5
KSO6 45 KSO5/GPIO25 Int. K/B ME_EN/GPXIOA02 109
1.8VS_PWR_EN <29>
KSO7 46 KSO6/GPIO26 Matrix VCIN0_PH1/GPXIOD00 VCIN0_PH1 <32>
+3VL KSO8 47 KSO7/GPIO27
KSO8/GPIO28 SPI Device Interface
KSO9 48 119
KSO10 49 KSO9/GPIO29 MISO/GPIO5B 120
R62 1 2 2.2K_0402_5% EC_SMB_DA1 KSO11 50 KSO10/GPIO2A MOSI/GPIO5C 126
EC_SMB_CK1 KSO11/GPIO2B SPI Flash ROM SPICLK/GPIO58
R63 1 2 2.2K_0402_5% KSO12 51 128
KSO13 52 KSO12/GPIO2C SPICS#/GPIO5A
KSO14 53 KSO13/GPIO2D
KSO15 54 KSO14/GPIO2E 73
KSO15/GPIO2F EC_CIR_RX/AD6/GPIO40 CUST_TEMP1 <26>
KSO16 81 74
+3VS KSO17 82 KSO16/GPIO48 SYS_PWROK/AD7/GPIO41 89
KSO17/GPIO49 GPIO50 90 EC_MUTE# <21>
BATT_CHG_LED# <27>
R64 2 1 10K_0402_5% EC_FAN_SPEED1 <32,33> EC_SMB_CK1

EC_SMB_CK1
EC_SMB_DA1
77
78 EC_SMB_CLK1/GPIO44 GPIO
BATT_CHG_LED#/GPIO52
CAPS_LED#/GPIO53
PWR_LED#/GPIO54
91
92
93
CAPS_LED# <27>
PWR_LED# <20>
ESD
EC_SMB_CK2 <32,33> EC_SMB_DA1 EC_SMB_CK2 EC_SMB_DAT1/GPIO45 BATT_LOW_LED#/GPIO55 BATT_LOW_LED# <27>
R273 1 2 1K_0402_5% 79 95 @ESD@
1 2 1K_0402_5% EC_SMB_DA2 <7,26> EC_SMB_CK2 EC_SMB_DA2 80 EC_SMB_CLK2/GPIO46 SYSON/GPIO56 121 SYSON <35,36> KB_RST# 1 2 0.1U_0201_10V6K
R274 C76
<7,26> EC_SMB_DA2 EC_SMB_DAT2/GPIO47 VR_ON/GPIO57 VR_ON <37,38>
127
DPWROK_EC/GPIO59 APU_RST#_EC <7>
SM Bus LPC_RST#_R
ESD@
C77 1 2 100P_0402_50V8J
6 100
<8> PM_SLP_S3# 14 PM_SLP_S3#/GPIO04 EC_RSMRST#/GPXIOA03 101 3V/5VALW_PG_R EC_RSMRST# <8>
ESD@
<20> USB_CHG_CTL1 GPIO07 GPXIOA04 SYS_PWRGD_EC
15 102 C78 1 2 100P_0402_50V8J
<10> EC_CLEAR_CMOS# 16 GPIO08 VCIN1_ADP_PROCHOT/GPXIOA05 103 VCOUT1_PROCHOT#
+3VL <20> USB_CHG_CTL3 GPIO0A VCOUT1_PROCHOT#/GPXIOA06
17 104 ESD@
<20> USB_CHG_EN GPIO0B VCOUT0_MAIN_PWR_ON/GPXIOA07 VCOUT0_MAIN_PWR_ON <34> EC_RSMRST#
18 105 C79 1 2 100P_0402_50V8J
<20> USB_CHG_CTL2 19 GPIO0C BKOFF#/GPXIOA08 106 BKOFF# <14>
<20> USB_CHG_STATUS# AC_PRESENT/GPIO0D GPIO GPO GPXIOA09 TYPEC_LIMIT_CTL1 <24>
R65 1 2 100K_0402_5% NOVO# 25 107 @ESD@
1 2 <27> KB_BL_PWM EC_FAN_SPEED1 28 PWM2/GPIO11 PCH_PWR_EN/GPXIOA10 108 EC_PCIE_WAKE# TYPEC_LIMIT_CTL2 <24> 1 2 0.1U_0201_10V6K
R66 100K_0402_5% ON/OFF# SYSON C80
1.8VS_PWR_EN <26> EC_FAN_SPEED1 FAN_SPEED1/GPIO14 PWR_VCCST_PG/GPXIOA11
R67 1 @ 2 100K_0402_5% 29
R68 1 2 100K_0402_5% SUSP# 30 FANFB1/GPIO15 @ESD@
1 2 <16> EC_TX 31 EC_TX/GPIO16 110 1 2 100P_0402_50V8J
R69 100K_0402_5% SYSON ON/OFF# C81
0.8VS_PWR_EN <16> EC_RX SYS_PWRGD_EC EC_RX/GPIO17 VCIN1_AC_IN/GPXIOD01 VCIN1_AC_IN <33>
R70 1 @ 2 100K_0402_5% 32 112
<8> SYS_PWRGD_EC PWR_BATT_LOW# 34 PCH_PWROK/GPIO18 EC_ON/GPXIOD02 114 EC_ON <34>
@ESD@
<20> PWR_BATT_LOW# EC_THERMTRIP# SUSP_LED#/GPIO19 ON/OFF#/GPXIOD03 ON/OFF# <20,29> LID_SW#
36 GPI 115 C82 2 1 100P_0402_50V8J
<7> EC_THERMTRIP# NUM_LED#/GPIO1A LID_SW#/GPXIOD04 LID_SW# <20,26>
116
SUSP#/GPXIOD05 117 SUSP# <29,35>
GPXIOD06 NUM_LED# <27>
118
122 PECI/GPXIOD07
<8> PBTN_OUT# PBTN_OUT#/GPIO5D +VCC_IO2
123 124 R71 1 @ 2 0_0402_5% +3VALW_EC
<8,33,36> PM_SLP_S5# PM_SLP_S4#/GPIO5E V18R/VCC_IO2
AGND
GND
GND
GND
GND
GND
4.7U_0402_6.3V6M
1
C84
KB9022QD_LQFP128_14X14
11
24
35
94
113
69
SA000075S30
2
20mil
ECAGND VCOUT1_PROCHOT# R270 1 @ 2 0_0402_5%

<33> VCOUT1_PROCHOT# H_PROCHOT# <7,38>
1
C232
100P_0402_50V8J
@
2

EC_ENE_KB9022
A B C D E
+3VALW to +3VS / +5VALW to +5VS +1.8VALW to +1.8VS / +0.8VALW to +0.8VS
+1.8VALW +VL
1 +3VALW +VL 1
0.1U_0201_10V K X5R
C239
10U_0402_6.3V6M
C238
1 1 +1.8VS
+3VS
@ J5
0.1U_0201_10V K X5R
C95
10U_0402_6.3V6M
C96
1 1 J3 2 2 +1.8VALW_1.8VS
+3VALW_3VS 2 1
2 1 2 1
2 1
10U_0402_6.3V6M
C240
0.1U_0201_10V K X5R
C241
U19 JUMP_43X79 1 1
10U_0402_6.3V6M
C97
0.1U_0201_10V K X5R
C98
@ U10 JUMP_43X79 1 1
2 2 1 14 @
1 14 @ VIN1 VOUT1
VIN1 VOUT1 2 13
2 13 VIN1 VOUT1
VIN1 VOUT1 @
@ 1.8VS_PWR_EN 2 2
2 2 3 12 C244 1 2 1000P_0402_50V7K
3 12 C94 1 2 1000P_0402_50V7K <28> 1.8VS_PWR_EN ON1 CT1
ON1 CT1
4 11
4 11 VBIAS GND
VBIAS GND
0.8VS_PWR_EN 5 10 C245 1 2 1000P_0402_50V7K
+5VALW 5 10 C93 1 2 2200P_0402_25V7K <28> 0.8VS_PWR_EN ON2 CT2
<28,35> SUSP# ON2 CT2 +0.8VS
+5VS 6 9 J6
6 9 J2 VIN2 VOUT2 +0.8VALW_0.8VS
VIN2 VOUT2 +5VALW_5VS 7 8 2 1
7 8 2 1 VIN2 VOUT2 2 1
VIN2 VOUT2 2 1 +0.8VALW
10U_0402_6.3V6M
C242
0.1U_0201_10V K X5R
C243
15 JUMP_43X79 1 1
0.1U_0201_10V K X5R
C88
10U_0402_6.3V6M
C89
10U_0402_6.3V6M
C90
0.1U_0201_10V K X5R
C91
1 1 15 JUMP_43X79 1 1 GPAD
GPAD @
@ S IC JW7110DFNC#TRPBF DFN14 DUAL LOAD SW
S IC JW7110DFNC#TRPBF DFN14 DUAL LOAD SW
SA0000BEL00 @
@ SA0000BEL00 @ 2 2
0.1U_0201_10V K X5R
C237
10U_0402_6.3V6M
C236
2 2 2 2 1 1
@
2 2
2 2
DISCHARGE CIRCUIT MISC.

+5VALW +1.8VALW
1
1
R75 CLIP1 CLIP3 CLIP4 CLIP12

R74 22_0603_1% HOLEA HOLEA HOLEA HOLEA
100K_0402_1% @ CODE1 @ CODE2 @ FD1 FD2 FD3 FD4 @
@ JP2 2 1 ON/OFF#
ON/OFF# <20,28>
6 2
@ @ @ @
2
1
D SHORT PADS
1
1.8VALW_PWR_EN# 2 Q5A
G 2N7002KDW_SOT363-6
SB00000EO00 BARCODE_8X8 BARCODE_12X4
3
D S @
1
<20,28,34,36> 3V/5VALW_PG
5 Q5B DDR Shielding Clip (Large) Optical Orientation Checking Point
G 2N7002KDW_SOT363-6
SB00000EO00 @
S @ CODE3 @ CODE4 @ JP3 2 1 ON/OFF#
4
CLIP2 CLIP5 CLIP6 CLIP7 CLIP8 CLIP10 CLIP11 CLIP13 SHORT PADS
3 3
HOLEA HOLEA HOLEA HOLEA HOLEA HOLEA HOLEA HOLEA
+1.8VALW Discharge Circuit (Reserved)

BARCODE_10X10 BARCODE_6X6 @ @ @ @ @ @ @ @
1
Laser Barcode Area DDR Shielding Clip (Small) ON/OFF# Short Pads
RF - BY PASS / CROSS MOAT CAPS

+1.8VS +VL +3VS +1.8VS +3VALW +3VS +3VALW
H1 H2 H3 H8 H9 H10 H11 H12 H13 H14 H16 H17 H7 H5
HOLEA HOLEA HOLEA HOLEA HOLEA HOLEA HOLEA HOLEA HOLEA HOLEA HOLEA HOLEA HOLEA HOLEA
1 1 1 1 1 1 1
CC83 CC84 CC85 CC86 CC87 CC88 CC89
0.1U_0201_10V6K 0.1U_0201_10V6K 0.1U_0201_10V6K 0.1U_0201_10V6K 0.1U_0201_10V6K 0.1U_0201_10V6K 0.1U_0201_10V6K
1
1
RF@ RF@ RF@ RF@ RF@ RF@ RF@
2 2 2 2 2 2 2
H_3P3 H_3P3 H_3P3 H_2P8 H_2P3 H_2P5 H_2P5 H_2P5 H_3P0X2P5 H_5P7X4P5 H_4P4 H_6P0 H_3P2 H_3P2
+5VALW +1.8VS +1.8VALW +1.8VS +3VALW +VL +3VALW CPU Screw Hole MISC. Screw Hole SSD Screw Hole WLAN Screw Hole
1 1 1 1 1 1 1
CC90 CC91 CC92 CC93 CC94 CC95 CC96
0.1U_0201_10V6K 0.1U_0201_10V6K 0.1U_0201_10V6K 0.1U_0201_10V6K 0.1U_0201_10V6K 0.1U_0201_10V6K 0.1U_0201_10V6K
RF@ RF@ RF@ RF@ RF@ RF@ RF@
4 2 2 2 2 2 2 2 4
+3VALW +1.8VS +3VS
+19VB_CHG LX_DDR +5VALW +3VALW +3VS +5VS +19VB_3V
1 1 1 1 1 1 1
CC98 CC99 CC100 CC101 CC102 CC103 CC104
0.1U_0201_10V6K 0.1U_0201_10V6K 10P_0402_50V8J 10P_0402_50V8J 0.1U_0201_10V6K 0.1U_0201_10V6K 10P_0402_50V8J
2
@RF@
2
@RF@
2
@RF@
2
@RF@
2
@RF@
2
@RF@
2
@RF@
DC_DC/DISCHARGE/RF/MISC.
A B C D E
5 4 3 2 1
D D
C C
B B
A A

Reserved
Custom 0.4
5 4 3 2 1
5 4 3 2 1
D D
ACES_50278-00401-001 PL101 EMI@

6
G2 5 PF101
5A_Z80_0805_2P
1 2
+19V_VIN
G1 4 7A_32VDC_0437007.WRML
4 3 APDIN 1 2 +19V_APDIN
3 2 PL102 EMI@
2 1 5A_Z80_0805_2P
1
1000P_0402_50V7K
1000P_0402_50V7K
100P_0402_50V8J
100P_0402_50V8J
1 2
JDCIN1
CONN@
1
EMI@ PC101
EMI@ PC102
EMI@ PC103
EMI@ PC104
C C
2
2
PR107
+CHGRTC
45.3K_0603_1%
PR108
1.5K_0603_5%
1
1 2
+3VL
PD101
3 +CHGRTC_R
B 1 B
+RTCBATT
2 PR109
1K_0603_5%
LRB715FT1G_SOT323-3 1 2
A A

PWR- DCIN / Vin Detector
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number R ev
Custom 0.4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-G241P
5 4 3 2 1
5 4 3 2 1
D D
PL201 EMI@
VMB2 +8.4V_VMB 5A_Z80_0805_2P
Conn@ PF201 1 2
JBAT1 F1206HB12V024TM 12A 24V UL FAST
1 1 2
1 2 PL202 EMI@ +12.6V_BATT+
2 3 EC_SMCA 5A_Z80_0805_2P
3 4 EC_SMDA 1 2
4 5
5 6
6
1
7
7
1
100_0402_1%
100_0402_1%
8
8 9 PC201 EMI@ PC202 EMI@
G1 10 1000P_0402_50V7K 0.01U_0402_25V7K
2
G2
PR201
PR202
11
2
G3 12
G4
ACES_60757-00802-001
+EC_VCCA
EC_SMB_CK1 <28,33>
16.5K_0402_1%
1
EC_SMB_DA1 <28,33>
PR206
C C
1 2
+3VL
PR203
1 2 200K_0402_1% +3VALW
2
PR204
@ 200K_0402_1% <28> VCIN0_PH1
1 2
VCIN1_BATT_TEMP <28,33>
PR205
1
10K_0402_5%
PH201
100K +-1% 0402 B25/50 4250K
2
ECAGND
PH201 under CPU botten side :

CPU thermal protection at 93 +-3 degree C
B B
Recovery at 56 +-3 degree C
A A

PWR- BATTERY CONN/OTP
Custom 0.4
5 4 3 2 1
A B C D
Module model information

ISL95520A_Hybrid_Boost_V2.mdd
Protection for reverse input

Vgs = 20V
Vds = 60V
1 1
Id = 250mA
1
D
2 PQ707
G 2N7002KW_SOT323-3
3
max Power loss 0.22W for 90W;0.12W for 65W system;0.05W for 45W B+
Rds(on) = 15.8mohm max CSR rating: 1W
1 2 1 2
Vgs = 20V VCSIP-VCSIN spec < 81mV
PR738 PR737 Vds = 30V
1M_0402_1% 3M_0402_5% ID = 10.5A (Ta=70C)
PQ740 PQ712
EMB04N03H_EDFN5X6-8-5 +19V_P1
AON7506_DFN3X3-8-5
Need check the SOA for inrush 1 PR703
2 1 +19V_P2 0.01_1206_1% +19VB_CHG
5 3 2 @ PJP701
+19V_VIN 3 5 1 4 1 2
1 2
PC765 @EMI@
EMI@
2 3 JUMP_43X118
2200P_0402_25V7K
4
10U_0603_25V6M
10U_0603_25V6M
0.1U_0402_25V7K
CSIP_CHG_R
4
1
PC760
PC762
CSIN_CHG_R
PC705
2
2
1
1
2_0402_5%
0_0402_5%
PR772
PR740
1
287K_0402_1%
PR729
2
ASGATE_CHG_R
2
@ PC783 PC747 @PC782
PQ705
2
1 2 1 2 1 2
4.02K_0402_1%
4.02K_0402_1%
2 AON7506_DFN3X3-8-5 2
1
0.1U_0402_25V6 0.1U_0402_25V6
1
0.033U_0402_25V7K 2
5 3
PR745
PR729 and PR732 are ACDET set t i ng base on your proj ect to set. 100_0402_1%
PC750 0.22U_0603_25V7K
2
4
PR762
PR763
1 2 +12.6V_BATT+ Rds(on) = 32mohm max
Vgs = 20V
Vds = 30V
1
CMSRC_CHG @ PC779
2200P_0402_50V7K
49.9K_0402_1%
ID = 8A (Ta=70C)
1
PR732
PC715
ASGATE_CHG
1
1 2
2
BGATE_CHG
2
OPCN_CHG 2
0.1U_0402_25V7K
CSIN_CHG
CSIP_CHG
OPCP_CHG
VBAT_CHG
0x3CH <BIT9> PSYS current gain
Rs1 = 10mΩ and Rs2 = 5mΩ or Rs1 = 10mΩ and Rs2 = 10m
Ω Rds(on) = 32mohm max
1 VDD_CHG
BIT0 = 1.14uA/W Vgs = 20V

BIT1 = 0.285uA/W Vds = 30V
5
========================================================= ID = 8A (Ta=70C) PQ704
Rs1 = 20mΩ and Rs2 = 10mΩ or Rs1 = 20mΩ and Rs2 = 20 mΩ PU703
100K_0402_1%
support Turbo boost : 2200P Support max charge 3.5A
32
31
30
29
28
27
26
25
BIT0 = 2.28uA/W no support Turbo boost : 0.1u S IC ISL88739AHRZ-T QFN 32P CHARGER
BIT1 = 0.57uA/W AON7408L_DFN8-5 Power loss: 0.245W
PR741
7X7X3
CSIN
CMSRC
OPCN
VBAT
CSIP
ASGATE
QPCP
BGATE
PC721 4 CSR rating: 1W
Isat: 6.5A VCSPP-VCSON spec < 81mV
PR771 0_0603_5% 0.22U_0603_25V7K
ACIN_CHG 1 24 BST_CHG 1 2 BST_CHG_R 1 2 DCR: 28mohm
2
Ipsys = KPSYS  ACIN BOOT

x  T
( VAD P x IAD P + VBA T x IBA ) PL700 PR765
2 23 UG_CHG 0.01_1206_1%
R_Psys = 1.2V / Ipsys
3
2
1
KPSYS = 1.14uA/W <28> VCIN1_AC_IN ACOK UGATE 4.7UH_5.5A_20%_7X7X3_M +12.6V_BATT+
@ PR769 2 0_0402_5%
1
1 3 22 LX_CHG 1 2 +17.4V_BATT_CHG 1 4
158K_0402_1%
adapter wattage = 45W <28,32> EC_SMB_DA1 SDA PHASE

PR731
Battery wattage = 40Wh @ PR770 1 2 0_0402_5% 4 21 LG_CHG 2 3
4.7_1206_5%
Ipsys = 1.14 x (45+40) = 96.9uA <28,32> EC_SMB_CK1 SCL LGATE
RF@ PR766
3 R_Psys = 1.2V / 96.9uA = 12.3K-ohm. @ PR777 1 2 0_0402_5% 5 20 VDDP_CHG 3
2
===================================== <28> VCOUT1_PROCHOT# PROCHOT# VDDP
10U_0603_25V6M
10U_0603_25V6M
10U_0603_25V6M
PQ706
5
2 1K_0402_1%AMON_ISL95520 6 VDD_CHG
1
adapter wattage = 65W 1 19 1 2
PC775
PC776
PC761
PR780
<28> ADP_I AMON VDD
AON7506_DFN3X3-8-5
Battery wattage = 40Wh
1U_0402_16V6K
2
Ipsys = 1.14 x (65+40) = 119.7uA 7 18 PR760 4.7_0402_5%
PC769
2
BMON DCIN
1
R_Psys = 1.2V / 96.9uA = 10K-ohm.
8 17
BATGONE
Close to EC. PC768
PSYS NTC 4
1
1U_0402_16V6K
2
CCLIM
ACLIM
COMP
PROG
AGND
CSON
CSOP
FSET PR757 RF@ PC767
1
100K_0402_1%
10K_0402_1%
680P_0402_50V7K
2
1
1
PR727
PC748
0.1U_0402_25V6 PD703
3
2
1
33
10
11
12
13
14
15
16
**Design Notes** Follow adapter and PR743 10_1206_5% 3
+19V_VIN
2
battery wattage in @ 1 2 1
For 45W/65W /90W system, 2S/3S/4S battery
3
Close to Vsys current source. 2 PQ710
BA
2
Maximum Charging current 3.5A
2
EC.
FSET_CHG
PC757
VF = 0.38V
1U_0603_25V6K
Base on CPU Core VR design.
Maximum Battery discharge power 55W The resistor is pop on CPU VR schematic. LRB715FT1G_SOT323-3 LMUN5113T1G_SOT323-3
1
#Register Setting 2
1
PR778
1. 0X3DH bit10 set 0 (default 1) to enable turbo boost function
2. Disable turbo when AC only 10K_0402_1% A31 connect to BA
VDD=5V VDD_CHG Other team connect to bat t c onn
#Circuit Design
2
1
1. ACLIM and CCLIM are devider voltage control.
1
CCLIM_CHG PQ711
2. Use 7X7 choke and 3X3 H/L side MOSFET
200K_0402_1%
LTC015EUBFS8TL_UMT3F
1
Charge current 3A ACLIM_CHG

<8,28,36> PM_SLP_S5# 2
PR749
Power loss : 1.79W (H/S=0.227W,L/S=1.2738W,Choke=0.297W) PR750

PROG_CHG CSOP_CHG 1 2 CSOP_CHG_R
Power density : 0.61 (23X16) 200K_0402_1%
BA
#Protect function COMP_CHG PR742 2_0402_5%
2
1
1. ACOVP : VCC voltage > 24V
499_0402_1%
3
@ PR779 Fs=729KHZ ~ +/- 15% PC708
38.3K_0402_1%
2. SMBus timeout : 0X3DH bit15 set 0 (default 0) to enable 175s(default). BA

1
2 PR755 1
76.8K_0402_1% 0.1U_0402_25V6
3. ACOC : OX3CH bit4 set1 release adapter limit function (default:Enable).
2
1 2
PR754
1
4. CHGOCP : based on charge current setting CSON_CHG CSON_CHG_R

182K_0402_1%
1 2
560P_0402_50V7K
1
PR753
5. BATOVP : 4.6V/Cell @ PR776 0_0402_5%

PC751
@ PQ741
6. BATLOWV : No.
2
1
D
76.8K_0402_1%
4 4
7. TSHUT : 150C
2
VCIN1_AC_IN
1
2 PR752
0.015U_0402_25V7K
2
G 162K_0402_1% VCIN1_BATT_TEMP <28,32>

1
PR751
PC752
S
3
L2N7002WT1G_SC70-3 BATGONE(BATT_TEMP) For A31 only.

2
logic high: above 2.4V Turn off Charger IC on battery only.

2
Hybrid boost power mode logic low: under 0.8V Depend on customer design for
Cell = 3s system power consumption.
(Rs1 = 10mΩ and Rs2 = 5mΩ or Rs1 = 20mΩ and Rs2 = 10mΩ) .
CC_LIM = VccLIM / 64 x Rs2
=============================================================
(Rs1 = 10mΩ and Rs2 = 10mΩ or Rs1 = 20mΩ and Rs2 = 20mΩ) .
Issued Date 2018/11/05 2019/11/05 Title
CC_LIM = VccLIM / 32 x Rs2
============================================================= Battery current limimed by CCLIm ~ 3.89A.
Deciphered Date
PWR_CHARGER
AC_LIM = Vac_LIM / 32 x Rs1 Adapter current limimed by ACLIm ~ 4.33A.
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
(PR779 and PQ741 are for change ACLIm when AC in) DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS 0.4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
A B C D
A B C D E
B+
PL401 EMI@
+19VB_3V
5A_Z80_0805_2P keep short pad,
+19VB_3V
2200P_0402_50V7K
1 2 snubber is for EMI only.
10U_0603_25V6M
10U_0603_25V6M
@EMI@ PC403
EMI@ PC404
PC429
0.1U_0402_25V6
1
1
PC405
@ PR401 PC401
0_0402_5% 0.1U_0402_25V7K
2
@ BST_3V 1 2 BST_3V_R 1 2
1 PU401 1
1
SY8386BRHC_QFN16_2P5X2P5
Use 7x7x3 size when the layout space is enough.
IN3
IN2
IN1
BS
+3VL
LX_3V 5 17 PL402
LX EP 1.5UH_6A_20%_5X5X3_M
1
16 LX_3V 1 4
PR406 6 LX2 +3VALWP
GND 2 3
100K_0402_5%
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
4.7_1206_5%
15
LX1
1
PR405
RF@
PC407
PC408
PC409
PC410
7
<20,28,29,36> 3V/5VALW_PG PG 14
2
GND1
3V_SN2
8 13
EN2 LDO +3VLP
680P_0402_50V7K
TEST
OUT
EN1
PC411
FF
1
PC412
RF@
4.7U_0603_6.3V6M
2
ENLDO_3V5V
Vout is 3.234V~3.366V
10
11
12
2
3.3V LDO 150mA~300mA Iocp=10A
TDC=6A
PC402 PR403
1000P_0402_50V7K 1K_0402_1%
5V_3V_EN 3V_FB 1 2 3V_FB_1 1 2
2 2
EN1 and EN2 dont't be floating.

Check pull up resistor of SPOK at HW side EN :H>0.8V ; L<0.4V Fsw : 600K Hz @ PJ401
1 2
+3VALWP 1 2 +3VALW
JUMP_43X118
SY8286C_V3_single.mdd @ PJP402
SY8286C_V3_dual.mdd JUMP_43X39
1 2
keep short pad, +3VLP 1 2 +3VL
2 Cell battery : Cin=10uF*2pcs snubber is for EMI only.
3 Cell ~ 4 Cell battery : Cin=10uF*1pcs
B+ +19VB_5V
PL403 EMI@ @ PR408 PC418
5A_Z80_0805_2P PU402 IC SY8288CRAC QFN 20P PWM 0_0402_5% 0.1U_0402_25V7K
1 2 +19VB_5V BST_5V1 2 BST_5V_R 1 2
5
1
BS
IN
IN
IN
IN
LX_5V 6
2200P_0402_50V7K
0.1U_0402_25V6
20
LX LX PL404
LX_5V
10U_0603_25V6M
10U_0603_25V6M
PC414
PC415
7 19 3 2 +5VALWP
GND LX
1
1
EMI@ PC416
@EMI@ PC417
8 18 4 1
GND GND PC419
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
3 3
2
1
9 17 VCC_5V 1 2
PG VCC
1
2.2UH_7.8A_20%_7X7X3_M
PR409
PC420
PC421
PC422
PC423
PC424
PC425
4.7_1206_5%
PR402
10 16
RF@
499K_0402_1%
2
1 2 ENLDO_3V5V NC NC 2.2U_0402_6.3V6M
B+
OUT
LDO
EN2
EN1
21 @
FF
GND
1
2
1
PR404
11
12
13
14
15
150K_0402_1% PC430
+5VLP
15V_SN
1U_0201_6.3V6M
4.7U_0603_6.3V6M
2
680P_0402_50V7K
5V LDO 150mA~300mA
2
3V/5VALW_PG
PC427
PC426
RF@
ENLDO_3V5V
2
2
5V_3V_EN
PR410
Vout is 4.998V~5.202V
2.2K_0402_5%
1 2
<28> EC_ON EN1 and EN2 dont't be floating. PC413 PR407
TDC=6A Iocp=10A
EN :H>0.8V ; L<0.4V 1000P_0402_50V7K 1K_0402_1%
PR411 1 2 0_0402_5% @ 5V_FB 1 2 5V_FB_1 1 2
<28> VCOUT0_MAIN_PWR_ON
Fsw : 600K Hz
5V_3V_EN
@ PJ403
1M_0402_1%
1 2
4.7U_0402_6.3V6M
+5VALWP 1 2 +5VALW
1
1
PR412
PC428
JUMP_43X118
4 @ PJP404 4
2
JUMP_43X39
2
1 2
+5VLP 1 2 +VL

+3VALW/+5VALW
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 0.4
A B C D E
5 4 3 2 1

D RT8207P_single_V3.mdd For Single layer D
RT8207P_dual_V3.mdd For Dual layer
Pin19 need pull separate from +1.35VP.

If you have +1.35V and +0.675V sequence question, 0.675Volt +/- 5%
+12.6VB_DDR you can change from +1.35VP to +1.35VS.
PL501 EMI@ PR501 TDC 0.7A
B+ 5A_Z80_0805_2P
+12.6VB_DDR BST_DDR_R
2.2_0603_5%
BST_DDR Peak Current 1A
1 2 1 2
10U_0603_25V6M
10U_0603_25V6M
2200P_0402_50V7K
0.1U_0402_25V6
+1.2VP
1
1
UG_DDR
@EMI@ PC501
EMI@ PC502
PC503
PC504
+0.6VSP
2
2
LX_DDR
LX_DDR
10U_0603_6.3V6M
10U_0603_6.3V6M
1
1
PC505
PC506
PC507
16
17
18
19
20
0.1U_0402_25V7K
2
C PU501 C
2
PQ501
VLDOIN
PHASE
UGATE
BOOT
VTT
21
AON7408L_DFN8-5 PAD
4 LG_DDR 15 1
LGATE VTTGND
PL502 14 2
1UH_6.6A_20%_5X5X3_M PR502 PGND VTTSNS
1
2
3
16.5K_0402_1%
1 4 1 2 CS_DDR 13 3
+1.2VP PC508 CS RT8207PGQW _W QFN20_3X3 GND
1
2 3 1U_0402_10V6K
5
1 2 12 4 VTTREF_DDR
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
RF@ PR503 30MA_30V_0.5UA_0.4V_SOD323-2 PD501 VDDP VTTREF

1
4.7_1206_5% PR504 2 1
PC509
PC510
PC511
PC512
PC513
PC514
5.1_0603_5% 11 5
+1.2VP
1 2
VDD VDDQ
1
VDD_DDR
PGOOD
1 2
+5VALW
2
4 PC515
+5VALW PR505
TON
1
RF@ PC517 0.033U_0402_16V7K
FB
S5
S3
2
680P_0402_50V7K PQ502 PC516 1 2
2
1U_0402_10V6K 2.2_0603_5%
10
6
1
2
3
AON7506_DFN3X3-8-5
EN_DDR
EN_0.675VSP
FB_DDR
TON_DDR
PR506
1 2 +1.2VP
PR507 470K_0402_1%
B +12.6VB_DDR1 2 B
6.04K_0402_1%
1
PR508 @
Choke: 7x7x3 1 2 PR509
<28,36> SYSON
Rdc=6.7mohm(Typ), 7.4mohm(Max) 10K_0402_1%
0_0402_5%
2
1
Mode Level +0.675VSP VTTREF_1.35V @ PC518
Switching Frequency:540kHz 0.1U_0402_10V7K
S5 L off off Ipeak=8A
2
S3 L off on Iocp~9.6A
S0 H on on OVP: 113%~120%
VFB=0.75V, Vout=1.3545V @ PR510
Note: S3 - sleep ; S5 - power off 1 2 @ PJ501
<28,29> SUSP# +1.2VP 1 2 +1.2V
0_0402_5% 1 2
JUMP_43X118
1
@ PC519
0.1U_0402_10V7K
2
PJ503 @
1 2
+0.6VSP 1 2 +0.6VS
JUMP_43X39
A A

Issued Date 2019/11/05 Title
2018/11/05 Deciphered Date
1.2VP/0.6VSP
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 0.4
5 4 3 2 1
5 4 3 2 1
+3VALW @ PR2102
+1.8VSP_ON 0_0402_5%
1 2
3V/5VALW_PG <20,28,29,34>
0.1U_0402_16V7K
PC2101
1
PR2101
1
D 100K_0402_5% PR2103 D
1M_0402_5%
@
Note:Iload(max)=2.5A
2
<37> 1.8VALW_PG PU2101
2
9
1 PGND 8
FB SGND
2 7
@ PJ801 PG EN PL2101
+3VALW 1 2 3 6 LX_1.8V 1 2
1 2 IN LX 1UH_2.8A_30%_4X4X2_F +1.8VALWP
1
4 5
68P_0402_50V8J
JUMP_43X79 PGND NC
1
4.7_0603_5%
1
PR2104
PC2104
2
1
22U_0603_6.3V6M
22U_0603_6.3V6M
PR2105 Rup
SY8003ADFC_DFN8_2X2
PC2105
PC2106
20K_0402_1%
RF@
2
22U_0603_6.3V6M
2
FB_1.8V
PC2102
1
1
680P_0402_50V7K
FB=0.6V
RF@ PC2103
Note:Iload(max)=3A PR2106 Rdown
10K_0402_1% PJ802
2
@
2
+1.8VALWP 1 2 +1.8VALW
1 2
C JUMP_43X79 C
Note:
When design Vin=5V, please stuff snubber
to prevent Vin damage
Vout=0.6V* (1+Rup/Rdown)
+3VALW +5VALW
1
1 PC2006
1
1U_0402_6.3V6K
JUMP_43X79
2
@ PJ803
2
Vout=0.8V* (1+Rup/Rdown)
2
PU2002
1
PC2008 G9661MF11U_SO8
4.7U_0603_6.3V6K 4 5
B 3 VPP NC 6 B
+2.5VP
2
PR2223 1 @ 2 0_0402_5% 2 VIN VO 7

GND
<28,35> SYSON VEN ADJ
1
1 8
3.4K_0402_1%
0.01U_0402_25V7K
@ PR2003 1 POK GND
1
2 0_0402_5%
<8,28,33> PM_SLP_S5#
PR2004
PC2005
22U_0603_6.3V6M
9
Rup
2
1
1
0.1U_0402_25V6
2
PC2001
PC2010
PR2008
47K_0402_5% PJ804
2
2
1 2
+2.5VP +2.5V
2
1 2
1.6K_0402_1%
@ JUMP_43X79
PR2002
Rdown
A A

+1.8VALW/+2.5V_G9661
Custom 0.4
5 4 3 2 1
A B C D E
1 1
+19VB_1V
@ PJ602 keep short pad,

1 2 +19VB_1V
B+ 1 2
snubber is for EMI only.
10U_0603_25V6M
10U_0603_25V6M
0.1U_0402_25V6
2200P_0402_50V7K
JUMP_43X79 @ PR606 PC603
1
EMI@ PC604
@EMI@ PC605
0_0402_5% 0.1U_0402_25V7K
PC615
PC606
BST_1V 1 2 BST_1V_R 1 2
2
@
RF@ PR605 680P_0402_50V7K

PU601 4.7_1206_5% RF@ PC602
1
SY8386RHC_QFN16_2P5X2P5 1 2 SNUB_1V 1 2
IN3
IN2
IN1
BS
+3VALW Use 7x7x3 size when the layout space is enough.
LX_1V 5 17
Confirm HW side LX EP
PL602
1
LX_1V
PR611 6
GND
LX2
16 1 2
+0.8VALWP
@ 100K_0402_5% 1UH_6.6A_20%_5X5X3_M
330P_0402_50V7K
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
1
15
10_0402_1%
LX1
1
PC608
PC609
PC610
PC611
PC612
PR2221
PC11225
PC11226
2
7
2
PG 14
R1 2
2
GND1
2
8 13 LDO_3V
10K_0402_1%
TEST VCC
1
1
PR608
ILMT
BYP
PC613 PR612 1 2
EN
FB
VR_ON <28,38>
2.2U_0402_6.3V6M 1K_0402_1% PR619 0_0402_5%
2
9
10
11
12
2
FB=0.6V
+3VALW 1 2 1 3
APU_VDDP_RUN_FB_H <7>
1
ILMT_1V
@ PR603 @ PR620 0_0402_5%

1 2 EN_1V
1
<36> 1.8VALW_PG PR610 PQ601
0_0402_5% PC614
Vout=0.6V* (1+R1/R2) R2 20K_0402_1% LSK3541G1ET2L_VMT3
=0.6*(1+(10/20))
1
@ PC601 1U_0402_6.3V6K
2
2
PR601 1 2
0.1U_0402_25V6 APU_VDDP_RUN_FB_L <7>
1M_0402_1% Vout=0.9V @ PR621 0_0402_5%
2
+3VALW FB_1V
2
EN :H>0.8V ; L<0.4V @ PJ601

JUMP_43X118
1
0_0402_5%
EN pin don't floating 1 2

+0.8VALWP 1 2 +0.8VALW
@ PR607
If have pull down resistor at HW side,

please delete PR601.
2 1
@ PR609
0_0402_5%
2
3 3
The current limit is set to 6A, 9A or 12A when this pin

is pull low, floating or pull high.
4 4

+0.9VALW_SY8386RAC
A B C D E
8 7 6 5 4 3 2 1
APU_B+ B+
<7> APU_VDDCR_SEN <7> APU_VDD_RUN_FB_L
+APU_CORE
@ PC11235
0.1U_0402_25V6
2 1
APU_B+ PL2104 EMI@
5A_Z80_0805_2P
1 2
1
10_0402_5%
10_0402_5%
2
PR2233 PR2231
PR2234
PR2229
0.1U_0402_25V6
10U_0603_25V6M
10U_0603_25V6M
H H
@EMI@ PC11262
@EMI@ PC11248
0_0402_5% 0_0402_5% 1 1
2200P_0402_50V7K
UG1_CPU PL2105 EMI@
PC11239
PC11230
1
33U_25V_NC_6.3X4.5
33U_25V_NC_6.3X4.5
+ + 5A_Z80_0805_2P
PC11266
PC11265
2
2
1 2
2
PR2225 PC11243 PQ1004 2 2
2.2_0603_5% 0.22U_0603_25V7K
BST1_CPU1 2 BST1_CPU_R AON6962_DFN5X6D-8-7
2
1 2
G1
D1
PL2103
0.24UH_22A_+-20%_ 7X7X3_M
LX1_CPU 7 1 4
@ PC11237 D2/S1
ISEN1P_CPU_R +APU_CORE
0.1U_0402_25V6 2 3
PR2240 RF@
4.7_1206_5%
LL(Rdroop)=0.7m 2 1
G2
S2
S2
S2
1
6
3
1 2 1 2
LG1_CPU
PR2251 PR2237
68K_0402_1% 10K_0402_1% PR2243 PC11256
SNB_APU1
1 2
2 1 2 1 1.1K_0603_1% 0.47U_0402_25V6K APU_CORE
RF@ PC11234
680P_0402_50V7K
TDC 35A
0.1U_0402_25V6
0.1U_0402_25V6
Peak current 45A
2
1
1
PC11253
PC11261
PC11249
G 2 1 1 2 OCP current 63A G
2
68P_0402_50V8J PC11228
220P_0402_50V8J @ @ @ PR2238
1.1K_0402_1%
FSW=400kHz
VREF_APU
APU_CORE_SEN_H_R
ISEN1P_CPU 1 2 DCR 1.19mohm +/-5%
TYP MAX
RGND_RT3662
PR1062 H/S Rds(on) :6.8mohm , 8.6mohm
1_0402_1%
PC11238
ISEN1N_CPU 1 2 ISEN1N_CPU_R L/S Rds(on) :2.0mohm , 2.5mohm
0.1U_0402_25V6
9/26
1 2 Modify for stardust test result PR1063
+3VS
2 1 1.1K_0402_1%
34K_0402_1%
ISEN2P_CPU
2
PR2232 100K_0402_5% 1 2
PR2245 PR2248
PR2250
0_0402_5% 0_0402_5%
1
COMP_CPU
ISEN1N_CPU
ISEN1P_CPU
ISEN2P_CPU
FB_CPU
BST2_CPU
UG2_CPU
261K_0402_1%
3.92K_0402_1%
69.8K_0402_1%
2
+1.8VS
PR2247
PR2244
PR2226
F
UG2_CPU F
2
APU_B+
PU2102
10
1
1
@ PR2246 RT3662ACGQW_WQFN40_5X5
SET_APU
4.7K_0402_1%
BOOT2
UGATE2
ISEN1N
VSEN
RGND
PGOOD
ISEN1P
ISEN2P
FB
COMP
0.1U_0402_25V6
1
10U_0603_25V6M
10U_0603_25V6M
@ PR2254
PC11245
PC11263
2200P_0402_50V7K
TSEN_APU_R 1 2 TSEN_APU 41 0.22U_0603_25V7K
PC11241
PC11246
PC11240
0_0402_5% GND BST2_CPU1 BST2_CPU_R1
1
PR2242 1 2 11 2 2 PQ1002
<7,28> H_PROCHOT# VRHOT_L 40 LX2_CPU
60.4K_0402_1% Near APU MOS
@EMI@
@EMI@
TSEN_APU PHASE2 AON6962_DFN5X6D-8-7
2
12 PR2235 2.2_0603_5%
LG2_CPU
2
2 1 TSEN 39
G1
D1
2 1 1 2 SET_APU 13 LGATE2
SET1 38 BST1_CPU
PH1003
IMON_APU 14 BOOT1 LX2_CPU 7
100K_0402_1%_B25/50 4250K PC11254 PR2241
IMON 37 UG1_CPU D2/S1
0.47U_0402_6.3V6K 3.9_0402_1%
TSEN_NB_R 1 2 TSEN_NB 15 UGATE1
VREF_APU PL2102
VREF_PINSET 36 LX1_CPU
PR2227 0.24UH_22A_+-20%_ 7X7X3_M
G2
S2
S2
S2
IMON_NB 16 PHASE1 1 4
60.4K_0402_1% Near CORE_NB MOS IMON_NB 35 LG1_CPU
PR2228
24K_0402_1%
6.65K_0402_1%
33.2K_0402_1%
VCC_CPU ISEN2P_CPU_R2 +APU_CORE
3
LGATE1
2
2 1 2 1 17 0_0603_5% 3
RF@ PR2249
4.7_1206_5%
+5VALW VCC PVCC_CPU LG2_CPU
PR2224 34 1 2
PR2230
PR2253
PR2239
PVCC +5VALW
1
PH1006 4.7_0603_5% 18
PWROK 33 LG1_NB
100K_0402_1%_B25/50 4250K
1 2 SVC_RT3662 19 LGATE_NB 1 2 1 2
<7> APU_PWRGD <7> APU_SVC LX1_NB
1
E 2 1 SVC 32 2 1 PR2236 E
PR2252 PHASE_NB
1
@ PC11242 20 1.1K_0603_1% PC11244
1 2
SVD_RT3662
ISENN_NB
0_0402_5% SVD UG1_NB SNB_APU2
ISENP_NB
COMP_NB
BOOT_NB
TSEN_NB
PC11269 31 PC11270 0.47U_0402_25V6K
UGATE_NB
2
2
2
2.2U_0402_10V6M @ PR1035 1 2 2.2U_0402_10V6M
RF@ PC11267
VDDIO
680P_0402_50V7K
FB_NB
PR1038 PR1037 PR1036 4.7K_0402_1%
SVT
VIN
EN
0_0402_5% 0_0402_5% 0_0402_5% 10P_0402_50V8J
2
2
1 2
<7> APU_SVD
PR1039
1
21
22
23
24
25
26
27
28
29
30
1
@ PC11250
+1.8VS 0_0402_5%
1 2 @ PR1040
FB_NB
COMP_NB
ISENA1N_NB
ISENA1P_NB
TSEN_NB
BST1_NB
1.1K_0402_1%
ISEN2P_CPU 1 2
10P_0402_50V8J
APU_SVD and APU_SVC RC filter put CPU side.
SVT_RT3662
APU_SVT RC filter put controller side. <7> APU_SVT 1 2
@ PR1043 PR1064
PR1041
@ PC11260 0_0402_5% 1_0402_1%
0_0402_5% EN_RT3662 1 2 ISEN1N_CPU 1 2 ISEN2N_CPU_R
10P_0402_50V8J
1 2 VR_ON <28,37>
2 1
APU_B+
2 1 PR1044 PR1065
0.1U_0402_25V6
4.7_0603_5% 1.1K_0402_1%
ISEN1P_CPU
1
PC11255 1 2
PC11233
1U_0402_6.3V6K
0.1U_0402_25V6
2
2.2_0402_5%
2
1
D D
PC11258
@
PR1042
2
1
+1.8VS
LL_NB(Rdroop)=2.1m 2 1 2 1
1 2 Near APU CHOKE PR1045 PR1046

VREF_APU
PR1047 PC11236@ 10K_0402_1% 54.9K_0402_1%
10.7K_0402_1% 330P_0402_50V7K
2 1 1 2 2 1 APU_B+
1 2 2 1 1 2 IMON_APU
PR1048 PR1049 PC11251 PC11229
15.8K_0402_1% PH1004 1.65K_0402_1% 220P_0402_50V8J 68P_0402_50V8J
100K_0402_1%_B25/50 4250K
UG1_NB
10U_0603_25V6M
10U_0603_25V6M
RGND_RT3662
PC11231
PC11232
1
1
1 2 9/26
C PR1053 Near CORE_NB CHOKE Modify for stardust test result C
16.5K_0402_1% @ PC11259 PR1057 PC11252 PQ1003
2
0.1U_0402_25V6 2.2_0603_5% 0.22U_0603_25V7K
IMON_NB BST1_NB 2 BST1_NB1_R AON6962_DFN5X6D-8-7
2
1 2 2 1 1 2 2 1 1 1 2
PR1055 PR1056
G1
D1
9.76K_0402_1% PH1005 13.3K_0402_1% PL1003
100K_0402_1%_B25/50 4250K 0.24UH_22A_+-20%_ 7X7X3_M
LX1_NB 7 1 4
D2/S1 +APU_CORE_SOC
2
1
10_0402_5%
ISENA1P_NB_R
1
PR1051 2 3
PR1050
1
PR1054 PR1058
G2
RF@ PR1059
S2
S2
S2
0_0402_5%
4.7_1206_5%
0_0402_5% 931_0402_1%
1 2 1 2
APU_CORE_NB
1
3
2
@ PC11264
LG1_NB
PC11257 TDC 19A(1H1L)
2
0.1U_0402_25V6 0.47U_0402_25V6K
2 1 SNB_APU_NB Peak current 13A
1
OCP current > 16A
RF@ PC11268
680P_0402_50V7K
2
FSW=400kHz
APU_VDDSOC_SEN
<7>
DCR 1.19mohm +/-5%

+APU_CORE_SOC
PR1060 TYP MAX

931_0402_1%
ISENA1P_NB
B 1 2 H/S Rds(on) :6.8mohm , 8.6mohm B
L/S Rds(on) :2.0mohm , 2.5mohm
ISENA1N_NB
0.1U_0402_25V6
1
PC11247
2
A A

RT3662ACGQW
8 7 6 5 4 3 2 1
A
B
C
D
5
5
2
1
+
+APU_CORE
PC9083
330U_D1_2VY_R9M
2
1
+
PC9084
330U_D1_2VY_R9M
2
1
PC9085
330U_B2_2.5VM_R9M
2
1
PC9057 PC9029 PC9001
PC9087 22U_0603_6.3V6M 22U_0603_6.3V6M 22U_0603_6.3V6M
2 1 2 1 2 1 2 1
330U_B2_2.5VM_R9M
near CPU
PC1238 PC9056 PC9030 PC9002
+APU_CORE
0.22U_0402_10V6K 22U_0603_6.3V6M 22U_0603_6.3V6M 22U_0603_6.3V6M

2 1 2 1 2 1 2 1
PC1239 PC9031 PC9003

0.22U_0402_10V6K 22U_0603_6.3V6M 22U_0603_6.3V6M
4
4
2 1 2 1 2 1
2
1
+
CPU
PC9086 PC1240 PC9058 PC9004
330U_D3_2.5VY_R6M 0.22U_0402_10V6K 22U_0603_6.3V6M 22U_0603_6.3V6M
2 1 2 1 2 1
PC1241 PC9059 PC9033 PC9005

0.22U_0402_10V6K 22U_0603_6.3V6M 22U_0603_6.3V6M 22U_0603_6.3V6M
2 1 2 1 2 1 2 1
PC1242 PC9060 PC9034 PC9006

0.22U_0402_10V6K 22U_0603_6.3V6M 22U_0603_6.3V6M 22U_0603_6.3V6M
2 1 2 1 2 1 2 1
back side
PC9038
PC1243 PC9062 22U_0603_6.3V6M PC9007
+APU_CORE
0.22U_0402_10V6K 22U_0603_6.3V6M 2 1 22U_0603_6.3V6M

2 1 2 1 2 1
PC11272
PC1244 PC9063 22U_0603_6.3V6M PC9008
0.22U_0402_10V6K 22U_0603_6.3V6M 2 1 22U_0603_6.3V6M
2 1 2 1 2 1
PC11271
PC1245 22U_0603_6.3V6M PC9009
0.22U_0402_10V6K 2 1 22U_0603_6.3V6M
Issued Date
22uF*23
220uF*1
330uF*3
PC11273 2 1
2 1 22U_0603_6.3V6M
2 1 PC9010
Security Classification
APU_CORE
PC1254 22U_0603_6.3V6M
180P_0402_50V8J 2 1
3
3
PC9088
2
1
+
2018/11/05
220U_D2 SX_2VY_R9M PC9011
PC1246 22U_0603_6.3V6M
PC9089 0.22U_0402_10V6K 2 1
2 1 2 1
2
1
+
PC9012
near CPU
220U_D2 SX_2VY_R9M PC1255 PC1247 22U_0603_6.3V6M
180P_0402_50V8J 0.22U_0402_10V6K 2 1
2 1
PC9013
+APU_CORE_SOC
PC1248 22U_0603_6.3V6M
0.22U_0402_10V6K 2 1
2 1
PC9014
PC1249 22U_0603_6.3V6M
0.22U_0402_10V6K 2 1
2 1
Compal Secret Data

PC9015
Deciphered Date
PC1250 22U_0603_6.3V6M
220uF*2
0.22U_0402_10V6K 2 1
2 1
PC9016
PC1251 22U_0603_6.3V6M
0.22U_0402_10V6K 2 1
2 1
APU_CORENB
PC9017
22uF*17+10uF*3
PC1252 22U_0603_6.3V6M
2
2
0.22U_0402_10V6K 2 1
2 1
2019/11/05
PC9018
PC1253 22U_0603_6.3V6M
0.22U_0402_10V6K 2 1
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
+APU_CORE_SOC
2 1
PC9019
22U_0603_6.3V6M
2 1
PC9020
22U_0603_6.3V6M
2 1
Title
Date:
PC9039
Custom
22U_0603_6.3V6M
2 1
Size Document Number
Monday, November 05, 2018

1
1
LA-H131P
Sheet
39
+APU_CORE Cap
Compal Electronics, Inc.
of
46
Rev
0.4
A
B
C
D
5 4 3 2 1
Version change list Page 1 of 1

(P.I.R. List) for PWR
Item Reason for change PG# Modify List Date Phase
1 Add 0.8VALW remote sense for AMD request P.37 Add transistor PQ601 and 0 ohm PR619,PR620,PR621 for remote sense 2018.08.22 SIV
D D
2 Change common part for 2nd source trail run P.31 Change PD101 to SCS00008E00 2018.08.22 SIV
3 Change common part for sourcce suggestion P.38 Change PC11265,PC11266 to SF000007200 2018.08.22 SIV
4 Change DDR choke from 7*7 to 5*5 for common M/B P.35 Change PL502 to SH00000Z200 2018.08.22 SIV
5 Change VDDP voltage to 0.9Vfor AMD request P.37 Change PR608 from 6.8K to 10K 2018.09.10 SIV
Change PR1046 from 100K to 54.9K

Change PR1056 from 23.2K to 13.3K
Change PR1053 from 20K to 16.5K 2018.09.10
6 Change CPU_CORE_SOC OCP setting and comparison P.38 Change PR2226 from 316K to 261K SIV
Change PR1055 from 6.49K to 9.76K
C C
7 Change 0 ohm to R short P.33 Change PR769,PR770,PR772,PR776 to R short 2018.09.10 SIV
B B
A A

PIR (PWR)
Custom 0.4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-XXXXP
5 4 3 2 1
5 4 3 2 1
Version change list Page 1 of 6 for

(P.I.R. List) HW
1 21 Change JHP1 symbol 2018/07/03 EVT

D D
2 21 CA25.2,UAUDIO1.22,UAUDIO1.37 change to AGND 2018/07/03
3 Layout request 25 Swape DT1 pin define 2018/07/03
UC6,U7,Q3,CD74,CD1,CD2,CD8,CD9,C92,C101,CD10~CD41,C99,Y1
chager to common part 2018/07/04
4 Common part
5 20 Swape JIO1 pin define 2018/07/04
6 Layout request 20 Delete D2, R109 2018/07/04
7 EMI request 25 LT1 change to common part 2018/07/05

C C
8 Thermal request 26 Delete RTS6,RTS3 2018/07/05
9 AMD disign guide 24 CT7~CT10 change value 2018/07/05
10 25 Add CT33 2018/07/09
11 25 Change JUSBC1 symbol 2018/07/10
12 27 Delete DFP2 2018/07/10
13 20 U7 change PN to SA0000B0V00 2018/07/11
14 JIO1 change to 45 pin 2018/07/12
B 15 28 R67 link to GND, R67,R70 un-pop 2018/07/12 B
16 8 Delete RC114,RC117 2018/07/12
17 8 TP_INT# change to AGPIO85 2018/07/12
18 8,27 Add T21~T24,RC117,RC118,QC3,RTP3,RTP4 2018/07/12
17 JSSD1 PCIE pin define 2018/07/16
QC3 change to common part 2018/07/16

Change LED
2018/07/16
CT33 change PN
2018/07/16
A
SATA_ARX_C_DTX_N1,SATA_ARX_C_DTX_P1 swap A
2018/07/16
Add J2,J3
2018/07/17
HW PIR
Custom 0.4
5 4 3 2 1
5 4 3 2 1

(P.I.R. List) HW
1 26 Add RTS3,RTS6 2018/07/17 EVT

D D
2 21 Swap U10 pin define 2018/07/17 EVT
3 20 Remove R119, R120, R125, R126. (EMI By-Pass Resistor, USB2.0) 2018/07/18 EVT
4 27 Add Net Name - +TP_VCC, +3VALW_3VS_FP 2018/07/18 EVT
5 10 Remove CC34 2018/07/18 EVT
6 29 Add U19 related circuits. 2018/07/18 EVT
7 29 Modify screw hole H5, H7, H14 2018/07/18 EVT
8 21 Remove CA12, RA22, RA23. (Codec) 2018/07/19 EVT

C C
9 21 Add net name +5VDDA_CODEC_5VSTB 2018/07/19 EVT
10 20 Replace power rail of USB Charger's power ripple caps to +5VALW. 2018/07/19 EVT
11 20 Replace C51 from 22uF to 4.7uF. (USB Charger) 2018/07/19 EVT
12 14 Add BOM Structure TS@ for R264. 2018/07/19 EVT
13 22 Remove +3VS_DVDD, replace with +3VS_HUB. (UHUB1.21, 27 / CHUB11.1) 2018/07/19 EVT
14 22 Remove RHUB3, RHUB4. 2018/07/19 EVT
15 27 RFP1, CFP1 -> FP@, DFP1 -> @ESD@ 2018/07/20 EVT
B 16 15 Replace JHDMI1 Symbol (DC232007B00) 2018/07/20 EVT B
17 29 Remove Clip8 2018/07/20 EVT
18 17 Replace JSSD1 Symbol (SP070018L00), Pin Count different with before 2018/07/20 EVT
19 22 RHBU3~5 -> RHUB3~5, RHBU1 -> RHUB6, RHBU2 -> RHUB7 2018/07/20 EVT
20 8 QC3.2 / QC3.5 -> From +3VALW to +3VS 2018/07/20 EVT
21 20 Swap JIO1 USB3 Pin Define (TX/RX, P/N) -> Total 8 Traces 2018/07/20 EVT
22 17 Remove BOM Structure "SSD@" 2018/07/20 EVT
A
23 17 Add RSSD4~7 2018/07/20 EVT A
24 29 Remove +0.6VS / +0.8VS Discharge Circuits. 2018/07/23 EVT

HW PIR
Custom 0.4
5 4 3 2 1
5 4 3 2 1

(P.I.R. List) HW
1 17 Add RSSD8, RSSD9 2018/07/23 EVT

D D
2 29 Replace Clip9 with Clip8 (Remove Clip9) 2018/07/23 EVT
3 15 Swap DH2, DH3 nets to reduce via 2018/07/23 EVT
4 22 Replace Y1 Part Number. (to SJ10000C210) 2018/07/23 EVT
5 29 Add CC83 ~ CC96 (RF By Pass / Cross Moat Caps) 2018/07/23 EVT
6 27 Replace Keyboard Power Rail from +5VALW to +5VS 2018/07/24 EVT
7 8 Re-Name MODEL ID0 / ID1 with MODEL_ID / MIC_SELECT 2018/07/25 EVT
8 8 Update Memory ID Matrix 2018/07/25 EVT

C C
9 3 Update Note List Page 2018/07/25 EVT
10 19 Remove T2408 BOM Structure (TP@) 2018/07/25 EVT
11 29 Pop CC83~CC96 (RF@) 2018/07/25 EVT
12 14 Remove R264, C230 BOM Structure (TS@) 2018/07/25 EVT
13 21 DA1.4 / DA1.6 Pin Swap 2018/07/26 EVT
14 15 Swap DH1.4 / 7 to DH1.5 / 6 2018/07/26 EVT
15 20 Update U7 Part Description (USB Charger) 2018/07/27 EVT
B 16 25 Update JUSBC1 footprint with DRAPH_UB11245-B200B-1H_24P-S 2018/07/27 EVT B
17 9 Replace ROM (UC2) Part Number to SA00008K400 2018/08/06 EVT
18 27 Replace CTP1 from 0402 to 0201 (EVT Gerber Keep 0402) 2018/08/06 EVT
19 27 Replace CTP1 from 0201 to 0402 2018/08/08 EVT2
20 13 JDIMM1.162, 1.165 -> 1.149, 1.157 2018/08/08 EVT2
21 21 Replace RA13, RA14 footprint from 0603 to 0402 2018/08/09 DVT
22 27 Replace CTP1 from 0402 to 0201 2018/08/09 DVT
A
23 25 Replace CT33 part number with SGA00001E10 2018/08/10 DVT A
24 29 Add screw hole H16, H17 2018/08/16 DVT

HW PIR
Custom 0.4
5 4 3 2 1
5 4 3 2 1

(P.I.R. List) HW
1 29 Change Clip2 to small size 2018/08/16 DVT

D D
2 26 Add UHS1, CHS1, CHS2 for LID switch 2018/08/16 DVT
3 17 Delete RSSD4~RSSD7 for PCIE/SATA MUX debug 2018/08/20 DVT
4 Support type2 APU 9,24 Change typeC USB3 to port0 2018/08/20 DVT
5 22 Reserve RHUB10~RHUB13 for touch scerrn co-lay 2018/08/20 DVT
6 Power request 7,37 VSS_SENSE_B conntector to 1.8VALW 2018/08/21 DVT
7 Audio request 21 Swap SPK pin define 2018/08/21 DVT
8 28 R55 change to 15@ 2018/08/23 DVT

C C
9 26 Reserve Thermal Sensor. (UTS1 and related circuits) 2018/08/23 DVT
10 21 Swap HGNDA& HGNDB 2018/08/25 DVT
11 HDMI issue 07 RC17 change to mount RC18 to un-mount 2018/08/28 DVT
12 RC117/RC118/RTP1/RF1/R3/RHD5/R53/R111/ 2018/08/28 DVT

R264/RA12/RWL1/RSSD1 Change to R-short
13 29 Del U8/C85/C86/C87/J1/R72/C92/U18/C99/C100/C101/R73/J4 2018/08/31 DVT
14 27 Del RKB3/RKB4 2018/08/31 DVT
15 27 Add JKBL2 for KBL 14"/15" co-lay 2018/09/02 DVT
B 16 ESD Request 5 Reserve CC97 2018/09/06 DVT B
17 22 Replace USB2.0 HUB from Port0 to Port4 2018/09/06 DVT
18 25 Replace USB2.0 Type-C from Port4 to Port0 2018/09/06 DVT
19 28 R55 -> Always Pop (No matter 14" or 15") 2018/09/06 DVT
20 29 Replace CLIP12 with bigger size 2018/09/06 DVT
21 29 Modify H8 / H9 screw hole size 2018/09/06 DVT
22 27 Replace RFP1 with R-Short 2018/09/06 DVT
A
23 17 Remove RSSD4~7 2018/09/06 DVT A
24 26 Add BOM Structure 14@ for 14" LID Switch (UHS1) 2018/09/07 DVT
HW PIR
Custom 0.4
5 4 3 2 1
5 4 3 2 1

(P.I.R. List) HW
1 22 Add BOM Structure HUB@ 2018/09/07 DVT

D D
2 8 Add BOM Structure NO_OBR@ 2018/09/07 DVT
3 12 Add BOM Structure OBR@ 2018/09/07 DVT
4 20 Un-Mount C48 / C49 2018/09/07 DVT
5 25 Un-Mount CT33 / Replace CT22 from 0.47uF to 10uF 2018/09/07 DVT
6 29 Mount C244, C245 2018/09/07 DVT
7 Cost Down Item 10 Un-Mount CC56, CC60, CC61, CC62, CC65, CC79, CC75, C1 2018/09/07 DVT
8 Cost Down Item 17 Un-Mount CSSD4, CSSD5 2018/09/07 DVT

C C
9 Cost Down Item 13 Un-Mount CD76, CD79 2018/09/07 DVT
10 Cost Down Item 12 Un-Mount CD29, CD30, CD44, CD45, CD50, CD52 2018/09/07 DVT
11 Cost Down Item 13 Replace CD55, CD58, CD59, CD65, CD66, CD67 with NO_OBR@ 2018/09/07 DVT
12 8 MODEL_ID -> RC112 (15@) / RC115 (14@) 2018/09/07 DVT
13 Fine Tune Crystal Caps 9 CC27/CC28 -> Replace with 4.7pF (Vendor Suggestion: 3.9pF) 2018/09/11 DVT
14 Fine Tune Crystal Caps 9 CC30/CC31 -> Replace with 10pF 2018/09/11 DVT
15 Fine Tune Crystal Caps 22 CHUB9 / CHUB10 -> Replace with 33pF (Not Replace it Yet) 2018/09/11 DVT
B 16 21 DA3 / DA4 -> Replace with SCA00004300 2018/09/11 DVT B
17 27 Replace RTP3 / RTP4 with 1K Ohm 2018/09/14 DVT
18 27 Replace CTP2 / CTP3 with 150pF 2018/09/14 DVT
19 3 Add DAZ and PR APU P/N, Modify DA BOM Structure 2018/10/03 PVT
20 28 Replace KB_MUTLI_KEY - Pull Up +3VALW to +3VL 2018/10/03 PVT
21 29 Update CC94 cross moat caps power rail 2018/10/08 PVT
22 0 Ohm to R-Short -> R2, R9, RSSD2, RC64 2018/10/08 PVT
A
23 ESD Request 25 Remove DT3, Combine CC1/CC2 to DT4 2018/10/18 PVT A
24 ESD Request 21 Add C246 (PLUG_IN) 2018/10/18 PVT

HW PIR
Custom 0.4
5 4 3 2 1
5 4 3 2 1

(P.I.R. List) HW
1 5 RC2 -> OBR@ 2018/10/18 PVT

D D
2 29 Add 6x6 Laser Barcode Area 2018/10/19 PVT
3 ESD Request 21 Remove C246, Rename it to CA30 (0.1uF), Reserve CA31 2018/10/22 PVT
4 25 DT4 Pin1 & 6 Swap 2018/10/23 PVT
5 27 Swap JKBL1 Pin Define 2018/10/24 PVT
6 ESD Request 21 CA16 / CA17 - 470pF to 1000pF, Remove CA31 & RA24 (Replace with CA30) 2018/10/26 PVT
7 7 JHDT1 Footprint add "-NPM" -> SAMTE_ASP-136446-07-B_20P-T-NPM 2018/10/29 PVT
8 RF Request 29 Reserve CC98 ~ CC104 By-Pass Caps 2018/10/29 PVT

C C
9 ESD Request 13 Pop CD69 2018/10/29 PVT
10 9 Replace ROM (UC2) Main Source with SA0000BJU00 (XMC) 2018/10/30 PVT
11 29 Replace Dual Load Switch (U10, U19) Main Source with SA0000BEL00 2018/10/30 PVT
12
29 Replace Small Clip Footprint (EMIST_SUL-15A3M_1P) - x8 PCS 2018/10/30 PVT
13 29 CC99 / CC102 / CC103 Replace with 0201, CC99 Power Replace with LX_DDR 2018/10/30 PVT
14 23 Add Type-C USB3.0 Re-Driver Related Circuit (RT17~39, CT34~41, UT4) 2018/10/31 PVT
15 29 Replace CC98 with 0201 footprint 2018/11/01 PVT
B 16 23 Modily BOM Structure of USB3 Re-Driver 2018/11/01 PVT B
17 7 Reserve QC4 2018/11/01 PVT
18 25 Mount CT15 2018/11/05 PVT
19
20
21
22
A
23 A
24
HW PIR
Custom 0.4
5 4 3 2 1

Lenovo s340 Schematics

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A B C D E

M/B Schematic Documents

Security Classification Compal Secret Data Compal Electronics, Inc.

DDR4 2400MHz CH-A DDR4-SO-DIMM X1

USB2.0 x1, 480Mb/s

HDMI Conn. DDI x4 , 2.97GT/s

Touch Panel FingerPrint

PCIe x1 , Gen1 2.5Gb/s Card Reader SDIO

CC/Vconn HDA Audio Codec SPK

Security Classification Compal Secret Data Compal Electronics, Inc.

Voltage Rails BOM STRUCTURE

EC SM Bus1 address EC SM Bus2 address

ZZZ DA_R0@ ZZZ 14_DAZ_R0@ ZZZ 15_DAZ_R0@

PORT FUNCTION PORT FUNCTION PORT FUNCTION CPU

EC Pin 13 Intput PLT_RST# PLT_RST#

Security Classification Compal Secret Data Compal Electronics, Inc.

Main Func = CPU

EVENT# pull high

RC2 1 OBR@ 2 1K_0402_5% DDR_A_EVENT#

Main Func = CPU

K11 P_GFX_RXP4 P_GFX_TXP4 K2

PCIE_ARX_DTX_P0 N10 P_GPP_RXP0 P_GPP_TXP0 N2 PCIE_ATX_DRX_P0 CC1 1 2 0.22U_0402_6.3V6K PCIE_ATX_C_DRX_P0

PCIE_ARX_DTX_P1 L10 P_GPP_RXP1 P_GPP_TXP1 P4 PCIE_ATX_DRX_P1 CC3 1 2 0.22U_0402_6.3V6K PCIE_ATX_C_DRX_P1

PCIE_ARX_DTX_P2 L12 P_GPP_RXP2 P_GPP_TXP2 R3 PCIE_ATX_DRX_P2 CC5 1 2 0.22U_0402_6.3V6K PCIE_ATX_C_DRX_P2

PCIE_ARX_DTX_P3 P12 P_GPP_RXP3 P_GPP_TXP3 T4 PCIE_ATX_DRX_P3 CC7 1 2 0.22U_0402_6.3V6K PCIE_ATX_C_DRX_P3

PCIE_ARX_DTX_P4 V6 P_GPP_RXP4 P_GPP_TXP4 W2 PCIE_ATX_DRX_P4 CC9 1 2 0.1U_0201_10V6K

FP5 REV 0.90

Security Classification Compal Secret Data Compal Electronics, Inc.

Main Func = CPU

<15> APU_DP1_P3 F4 DP1_TXP3

<15> APU_DP1_N3 F2 DP1_TXN3 RSVD_4 F14

APU_RST# AW4 V4 SMU_ZVDDP

T12 RC18 1 @ 2 1K_0402_5%

CORETYPE RC23 1 @ 2 1K_0402_5%

HDT+ (debug + HDT@)

RC24 1 2 300_0402_5% APU_RST#

RC30 1 @ 2 220_0402_5% APU_PWRGD

ESD@ CC18 1 2 100P_0402_50V8J APU_PWRGD

ESD@ CC19 1 2 100P_0402_50V8J APU_RST#

Security Classification Compal Secret Data Compal Electronics, Inc.

Main Func = CPU

CC26 2K_0402_5% 2K_0402_5%

2N7002KDW 2N SC88-6 8.2K_0402_5%

<27> I2C_3_SCL_R NC APU_FCH_PWRGD_R APU_PCIE_RST#_R

<28> SYS_PWRGD_EC 2 4 APU_PCIE_RST# <16,17,20>

SA00007WE00 MC74VHC1G08DFT2G SC70 5P

1 : Normal reset mode (Default)

Security Classification Compal Secret Data Compal Electronics, Inc.

Main Func = CPU

<20> CLKREQ_SD# AP19 CLK_REQ2_L/AGPIO116

FP5 REV 0.90

RC89 2 1 10K_0402_5% CLKREQ_SSD1#

USB20_P3 AE10 USBC0_A11/DP3_TXP0 AE3

Security Classification Compal Secret Data Compal Electronics, Inc.

Main Func = CPU

EDC: 13A M15 VDDCR_SOC_1 VDDCR_1 G7 EDC: 45A

.22U 6.3V K X5R 0402

.22U 6.3V K X5R 0402

.22U 6.3V K X5R 0402

.22U 6.3V K X5R 0402