UJT Firing Circuit

 It is the most common method of triggering the SCR because the prolonged pulses at the gate
using R and RC triggering methods cause more power dissipation at the gate so by using UJT (Uni
Junction Transistor) as triggering device the power loss is limited as it produce a train of pulses.
 The RC network is connected to the emitter terminal of the UJT which forms the timing circuit.
The capacitor is fixed while the resistance is variable and hence the charging rate of the capacitor
depends on the variable resistance means that the controlling of the RC time constant.
 When the voltage is applied, the capacitor starts charging through the variable resistance. By
varying the resistance value voltage across the capacitor get varied. Once the capacitor voltage is
equal to the peak value of the UJT, it starts conducting and hence produce a pulse output till the
voltage across the capacitor equal to the valley voltage Vv of the UJT. This process repeats and
produces a train of pulses at base terminal 1.
 The pulse output at the base terminal 1 is used to turn ON the SCR at predetermined time intervals

Figure: 1. 26. UJT Firing circuit for SCR and corresponding waveforms
Series and Parallel connections of SCRs

In many power control applications the required voltage and current ratings exceed the voltage and
current that can be provided by a single SCR. Under such situations the SCRs are required to be
connected in series or in parallel to meet the requirements. Sometimes even if the required rating is
available, multiple connections are employed for reasons of economy and easy availability of SCRs of
lower ratings. Like any other electrical equipment, characteristics/properties of two SCRs of same make
and ratings are never same and this leads to certain problems in the circuit. The mismatching of SCRs is
due to differences in

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 (i) turn-on time
(ii) turn-off time
(iii) Leakage current in forward direction
(iv) Leakage current in reverse direction and
(v) Recovery voltage.

Series Connection of an SCR

Figure: 1. 27. Series connection of SCRs

(i) Unequal distribution of voltage across SCRs

(ii) Difference in recovery characteristics.

Care must be taken to share the voltage equally. For steady-state conditions, voltage sharing is
achieved by using a resistance or a Zener diode in parallel with each SCR. For transient voltage
sharing a low non-inductive resistor and capacitor in series are placed across each SCR, as shown in
figure. Diodes D1 connected in parallel with resistor Rl, helps in dynamic stabilization. This circuit
reduces differences between blocking voltages of the two devices within permissible limits.
Additionally the R-C circuit can also serve the function of „snubber circuit„. Values of R1 and C1 can
primarily be calculated for snubber circuit and a check can be made for equalization. If ΔQ is the
difference in recovery charge of two devices arising out of different recovery current for different
time and ΔV is the permissible difference in blocking voltage then

C1 = ΔQ/ ΔV

The value of resistance Rx should be sufficient to over damp the circuit. Since the capacitor C1 can
discharge through the SCR during turn-on, there can be excessive power dissipation, but the
switching current from C1 is limited by the resistor R1 This resistance also serves the purpose of

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damping out „ringing‟ which is oscillation of C1 with the circuit inductance during commutation. All
the SCRs connected in series should be turned-on at the same time when signals are applied to their
gates simultaneously.

Voi or actual current rating of the whole string

String efficiency = No of SCRs in string ×Voi or current rating of individual SCR

This phenomenon increases the reliability of the string, but reduces the utilization of each SCR. Thus
string efficiency decreases. Reliability of string is measured by derating factor (DRF) which is given
by the expression

DRF = 1- string efficiency

Parallel Connection of an SCR

Figure: 1. 28. Parallel connection of SCRs

When the load current exceeds the SCR current rating, SCRs are connected in parallel to share the
load current. But when SCRs are operated in parallel, the current sharing between them may not be
proper. The device having lower dynamic resistance will tend to share more current. This will raise
the temperature of that particular device in comparison to other, thereby reducing further its dynamic
resistance and increasing current through it. This process is cumulative and continues till the device
gets punctured. Some other factors which directly or indirectly add to this problem are difference in
turn-on time, delay time, finger voltage and loop inductance.

Arrangement of SCRs in the cubicle also plays vital role. When the SCRs are connected in parallel, it
must be ensured that the latching current level of the all the SCRs is such that when gate pulse is
applied, all of them turn-on and remain on when the gate pulse is removed. Further the holding

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currents of the devices should not be so much different that at reduced load current one of the device
gets turned-off because of fall of current through it blow its holding current value. This is particularly
important because on increase in load current, the device which has stopped conducting cannot start
in the absence of gate pulse.

Another point to be considered is the on-state voltage across the device. For equal sharing of currents
by the devices voltage drop across the parallel paths must be equal. For operation of all the SCRs
connected in parallel at the same temperature, it becomes necessary to use a common heat sink for
their mounting, as illustrated in figure. Resistance compensation used for dc circuits is shown in
figure. In this circuit the resistors Rx and R2 are chosen so as to cause equal voltage drop in both
arms. Inductive compensation used for ac circuits is shown in figure The difference in characteristics
due to different turn-on time, delay time, finger voltage, latching current, holding current can be
minimized by using inductive compensation. Firing circuits giving high rate of rise can be used to
reduce mismatch of gate characteristics and delay time. Current sharing circuits must be designed so
as to distribute current equally at maximum temperature and maximum anode current. This is done to
ensure that the devices share current equally under worst operating conditions. Mechanical
arrangement of SCRs also plays an important role in reducing mismatching. Cylindrical construction
is perhaps the best from this point of view.

Derating:

Even with all the measures taken, it is preferable to derate the device for series/parallel operation.
Another reason for derating is poor cooling and heat dissipation as number of devices operates in the
same branch of the circuit. Normal derating factors are 10 to 15% for parallel connection of SCRs
depending upon the number of devices connected in parallel. Higher voltage safety factor is taken
when SCRs are connected in series.

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Numerical Problems:

1. The trigger circuit of a thyristor has a source voltage of 15V and the load line has a slope of -
120V per ampere. The minimum gate current to turn on the SCR is 25mA. Compute
i. Source resistance required in the gate circuit
ii. The trigger voltage and trigger current for an average gate power dissipation of 0.4
watts

Solution:

i. The slope of load line gives the required gate source resistance. From the load line,
series resistance required in the gate circuit is 120Ω
ii. Here VgIg = 0.4W
For the gate circuit Es = RsIg + Vg
15 = 120Ig +0.4/Ig

120Ig2 – 15 Ig + 0.4 = 0
Its solution gives Ig = 38.56mA or 86.44 mA

0.4×1000
Vg = 38.56
= 10.37V
0.4×1000
Vg = 86.44
= 4.627V

So choose the value for Ig which gives less voltage Ig = 86.44 mA and V g = 4.627V from
minimum gate current of 25mA.

2. For an SCR the gate-cathode characteristic has a straight line slope of 130. For trigger source
voltage of 15V and allowable gate power dissipation of 0.5 watts, compute the gate source
resistance.
3. SCRs with a rating of 1000V and 200A are available to be used in a string to handle 6kV and 1kA.
Calculate the number of series and parallel units required in case de-rating factor is 0.1 and 0.2

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 4. It is required to operate 250A SCR in parallel with 350A SCR with their respective on state
voltage drops of 1.6V and 1.2V. Calculate the value of resistance to be inserted in series with
each SCR so that the share the total load of 600A in proportion to their current ratings.
Snubber circuit

Due to overheating, over voltage, over current or excessive change in voltage or current switching devices
and circuit components may fail. From over current they can be protected by placing fuses at suitable
locations. Heat sinks and fans can be used to take the excess heat away from switching devices and other
components. Snubber circuits are needed to limit the rate of change in voltage or current (di/dt or dv/dt)
and over voltage during turn-on and turn-off. These are placed across the semiconductor devices for
protection as well as to improve the performance. Static dv/dt is a measure of the ability of a thyristor to
retain a blocking state under the influence of a voltage transient. These are also used across the relays and
switches to prevent arcing.

Necessity of Using the Snubber Circuit

These are placed across the various switching devices like transistors, thyristors, etc. Switching from ON
to OFF state results the impedance of the device suddenly changes to the high value. But this allows a
small current to flow through the switch. This induces a large voltage across the device. If this current
reduced at faster rate more is the induced voltage across the device and also if the switch is not capable of
withstanding this voltage the switch becomes burn out. So auxiliary path is needed to prevent this high
induced voltage

Similarly when the transition is from OFF to ON state, due to uneven distribution of the current through
the area of the switch overheating will takes place and eventually it will be burned. Here also snubber is
necessary to reduce the current at starting by making an alternate path.

Snubbers in switching mode provides one or more of the following functions

 Shape the load line of a bipolar switching transistor to keep it in its safe operating area.

 Reducing the voltages and currents during turn-ON and turn-OFF transient conditions.

 Removes energy from a switching transistor and dissipate the energy in a resistor to reduce junction
temperature.

 Limiting the rate of change of voltage and currents during the transients.

 Reduce ringing to limit the peak voltage on a switching transistor and lowering their frequency.

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Design of RC Snubber Circuits:

There are many kinds of snubbers like RC, diode and solid state snubbers but the most commonly used
one is RC snubber circuit. This is applicable for both the rate of rise control and damping.

This circuit is a capacitor and series resistor connected across a switch. For designing the Snubber
circuits. The amount of energy is to dissipate in the snubber resistance is equal to the amount of energy is
stored in the capacitors. An RC Snubber placed across the switch can be used to reduce the peak voltage
at turn-off and to lamp the ring. An RC snubber circuit can be polarized or non-polarized. If you assume
the source has negligible impedance, the worst case peak current in the snubber circuit is

I = Vo/Rs and I = C.dv/dt

Figure: 1. 29. Forward-Polarized RC Snubber Circuit

For an appropriate forward-polarized RC snubber circuit a thyristor or a transistor is connected with an

anti-parallel diode. R will limit the forward dv/dt and R1 limits the discharge current of the capacitor
when transistor Q1 is turned on. These are used as overvoltage snubbers to clamp the voltage.

Figure: 1. 30. Reverse Polarized RC Snubber Circuit

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Reverse polarized snubber circuit can be used to limit the reverse dv/dt. R1 will limit the discharge
current of the capacitor.

Figure: 1. 31. An un-polarized snubber circuit

An un-polarized snubber circuit is used when a pair of switching devices is used in anti-parallel. For
determining the resistor and capacitor values a simple design technique can be used. For this an optimum
design is needed. Hence a complex procedure will be used. These can be used to protect and thyristors.

Capacitors selection:

Snubber capacitors are subjected to high peak and RMS currents and high dv/dt. An example is turn-on
and turn-off current spikes in a typical RCD snubber capacitor. The pulse will have high peak and RMS
amplitudes. The snubber capacitor has to meet two requirements. First, the energy stored in the snubber
capacitor must be greater than the energy in the circuit‟s inductance. Secondly, the time constant of
snubber circuits should me small compared to shortest on time expected, usually 10% of the on time. By
allowing the resistor to be effective in the ringing frequency this capacitor is used to minimize the
dissipation at switching frequency. The best design is selecting the impedance of the capacitor is same
that of resistor at the ringing frequency.

Resistors selection:

It is important that R in the RC snubber, have low self inductance. Inductance in R will increase the peak
voltage and it will tend to defeat the purpose of the snubber. Low inductance will also be desirable for R
in snubber but it is not critical since the effect of a small amount of inductance is to slightly increase the
reset time of C and it will reduce the peak current in switch at turn-on. The normal choice of R is usually
the carbon composition or metal film. The resistor power dissipation must be independent of the
resistance R because it dissipates the energy stored in the snubber capacitor in each transition of voltage
in the capacitor. If we select the resistor as that the characteristic impedance, the ringing is well damped.

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When comparing the Quick design to optimum design, the required snubber resistor’s power capability
will be reduced. Usually the “Quick” design is completely adequate for final design. Going to the
“Optimum” approach is only if power efficiency and size constraints dictate the need for optimum
design.

Power Bipolar Junction Transistor (BJT)

Power BJT is used traditionally for many applications. However, IGBT (Insulated-Gate Bipolar
Transistor) and MOSFET (Metal-Oxide-Semiconductor Field-Effect Transistor) have replaced it for
most of the applications but still they are used in some areas due to its lower saturation voltage over the
operating temperature range. IGBT and MOSFET have higher input capacitance as compared to BJT.
Thus, in case of IGBT and MOSFET, drive circuit must be capable to charge and discharge the internal
capacitances.

Figure: 1. 32. Symbol of transistor

The BJT is a three-layer and two-junction npn or pnp semiconductor device as given in Fig. 32. (a) and
(b).

Although BJTs have lower input capacitance as compared to MOSFET or IGBT, BJTs are
considerably slower in response due to low input impedance. BJTs use more silicon for the same drive
performance.

In the case of MOSFET studied earlier, power BJT is different in configuration as compared to simple
planar BJT. In planar BJT, collector and emitter is on the same side of the wafer while in power BJT it
is on the opposite edges as shown in Fig. 33. This is done to increase the power-handling capability of
BJT.

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 Figure: 1. 33. Structure of transistor

Power n-p-n transistors are widely used in high-voltage and high-current applications which will be
discussed later.

Input and output characteristics of planar BJT for common-emitter configuration are shown in Fig. 34.
These are current-voltage characteristics curves.

Figure: 1. 34. Input and output characteristics of BJT

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Metal-Oxide Semiconductor Field-Effect Transistor (Power)

MOSFET is a voltage-controlled majority carrier (or unipolar) three-terminal device. As compared to

the simple lateral channel MOSFET for low-power signals, power MOSFET has different structure. It
has a vertical channel structure where the source and the drain are on the opposite side of the silicon
wafer as shown in Figure. This opposite placement of the source and the drain increases the capability
of the power MOSFET to handle larger power.

N-channel enhancement type MOSFET is more common due to high mobility of electrons.

Figure: 1. 35. Symbol of MOSFET

Figure: 1. 36. Structure of MOSFET

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Basic circuit diagram and output characteristics of an n-channel enhancement power MOSFET with load
connected are in Fig. 37 and Fig. 38 respectively.

Figure: 1. 37. Basic circuit diagram of n-channel enhancement power MOSFET

Drift region shown in Fig. 37 determines the voltage-blocking capability of the MOSFET.

When VGS = 0,

⇒ VDD makes it reverse biased and no current flows from drain to source.

When VGS > 0,

⇒ Electrons form the current path as shown in Fig. 37. Thus, current from the drain to the source
flows. Now, if we will increase the gate-to-source voltage, drain current will also increase.

Figure: 1. 38. Output characteristics of an n-channel enhancement power MOSFET

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For lower value of VDS, MOSFET works in a linear region where it has a constant resistance equal to
VDS / ID. For a fixed value of VGS and greater than threshold voltage VTH, MOSFET enters a saturation
region where the value of the drain current has a fixed value.

Besides the output characteristics curves, transfer characteristics of power MOSFET is also shown in
Fig. 39.

Figure: 1. 39. Transfer characteristics of an n-channel enhancement power MOSFET

Insulated-Gate Bipolar Transistor (IGBT)

IGBT combines the physics of both BJT and power MOSFET to gain the advantages of both worlds. It
is controlled by the gate voltage. It has the high input impedance like a power MOSFET and has low
on-state power loss as in case of BJT. There is no even secondary breakdown and not have long
switching time as in case of BJT. It has better conduction characteristics as compared to MOSFET due
to bipolar nature. It has no body diode as in case of MOSFET but this can be seen as an advantage to
use external fast recovery diode for specific applications. They are replacing the MOSFET for most of
the high voltage applications with less conduction losses. Its physical cross-sectional structural
diagram and equivalent circuit diagram is presented in Fig. 40 to Fig. 41. It has three terminals called
collector, emitter and gate.

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 Figure: 1. 40. Cross -sectional structural diagram of IGBT

There is a p+ substrate which is not present in the MOSFET and responsible for the minority carrier
injection into the n-region. Gain of NPN terminal is reduced due to wide epitaxial base and n+ buffer
layer.

There are two structures of IGBTs based on doping of buffer layer:

a) Punch-through IGBT: Heavily doped n buffer layer ➔ less switching time

b) Non-Punch-through IGBT: Lightly doped n buffer layer ➔ greater carrier lifetime ➔ increased
conductivity of drift region ➔ reduced on-state voltage drop

(Note: ➔ means implies)

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 Figure: 1. 41. Equivalent diagram of IGBT

Figure: 1. 42. Simplified Equivalent diagram of IGBT

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 Figure: 43. Equivalent diagram of IGBT

Based on this circuit diagram given in Fig. 43, forward characteristics and transfer characteristics are
obtained which are given in Fig. 44 and Fig. 45. Its switching characteristic is also shown in Fig. 45.

Figure: 1. 44. Forward characteristics of IGBT

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 Figure: 1.45. Transfer characteristics of IGBT

Figure: 1. 46. Dynamic characteristics of IGBT

(Note: Tdn : delay time ; Tr: rise time ; Tdf : delay time ; Tf1: initial fall time ; Tf2: final fall time)

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GTO (Gate Turn-off Thyristor)

GTO can be turned on with the positive gate current pulse and turned off with the negative gate current
pulse. Its capability to turn off is due to the diversion of PNP collector current by the gate and thus
breaking the regenerative feedback effect.

Actually the design of GTO is made in such a way that the pnp current gain of GTO is reduced. A
highly doped n spot in the anode p layer form a shorted emitter effect and ultimately decreases the
current gain of GTO for lower current regeneration and also the reverse voltage blocking capability.
This reduction in reverse blocking capability can be improved by diffusing gold but this reduces the
carrier lifetime. Moreover, it requires a special protection.

The symbol for GTO is shown in Fig.46.

Figure: 1. 47. Symbol of GTO

Overall switching speed of GTO is faster than thyristor (SCR) but voltage drop of GTO is larger. The
power range of GTO is better than BJT, IGBT or SCR.

The static voltage current characteristics of GTO are similar to SCR except that the latching current of
GTO is larger (about 2 A) as compared to SCR (around 100-500 mA).

The gate drive circuitry with switching characteristics is given in Fig. 48 and Fig. 49.

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 Figure: 1. 48. Gate Drive Circuit for GTO

Figure: 1. 49. Switching characteristics for GTO

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SCR Specifications and Ratings:
The main specifications of the SCR are its voltage rating and current rating. In this post, let us see various
ratings of thyristor.
Voltage Ratings
Peak Invese Voltage (VPIV)
The peak inverse voltage is defined as the maximum voltage which SCR can safely withstand in its OFF
state. The applied voltage should never be exceeded under any circumstances.
On State Voltage:
The voltage which appears across the SCR during its ON state is known as its ON state Voltage. The
maximum value of voltage which can appear across the SCR during its conducting state is called its
maximum on state voltage. Usually it will be 1V to 4V.
Finger Voltage:
The minimum voltage, which is required between the anode and cathode of an SCR to trigger it to
conduction mode, is called its finger voltage.

Rate of Rise of Voltage (dV/dt)

The rate at which the voltage across the device rises ( for forward condition) without triggering the
device, is known as its rate of rise of voltage.
Voltage Safety Factor:
The normal operating voltage of the SCR is kept well below its peak inverse voltage(VPIV) to avoid
puncture of SCR due to uncertain conditions. The operating voltage and peak inverse voltage are related
by voltage safety factor Vf
Vf = Peak inverse voltage / ( 2 x RMS value of input voltage)
Normaly Vf value lies between 2 and 2.5
Current Ratings:
The current carrying capacity of the device is known as its current rating.
It can be of two types.
1. Continuous
2. Intermittent
Maximum average ON state current ( Imac):
This is the average value of maximum continuous sinusoidal ON state current with conduction angle
180deg, at frequency 40 to 60Hz, which should not be exceeded even with intensive cooling.

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Maximum rms ON-state current: (Imrc)
It is the rms value of the maximum continuous sinusoidal ON state current at the frequency 40 to 60 Hz
and conduction angle 180deg, which should not be exceeded even with intensive cooling.
Maximum surge - ON state Current (Imsc)
It is the maximum admissible peak value of a sinusoidal half cycle of tem milliseconds duration at a
frequency of 50Hz.
Latching Current (II)
It is the minimum current, which is required to latch the device from its OFF state to its ON state. In other
words, it is the minimum current required to trigger the device.
Holding Current (IH)
It is the minimum current required to hold the SCR conducting. In other words, It is the minimum current,
below which the device stops conducting and returns to its OFF state.
Gate Current:
The current which is applied to the gate of the device for control purposes is known as gate current.
Minimum Gate Current:
The minimum current required at the gate for triggering the device.
Maximum Gate Current:
The maximum current which can be applied to device safely. Current higher than this will damage the
gate terminal.
Gate Power Loss:
The mean power loss, which occurs due to flow of gate current between the gate and the main terminals.
Turn ON time:
The time taken by the device before getting latched from its OFF state to ON state. In other words, it is
the time for which the device waits before achieving its full conduction. Usually it will be 150 to 200μsec.
Turn OFF time:
After applying reverse voltage, the device takes a finite time to get switched OFF. This time is called as
turn-OFF time of the device. Usually it will be 200μsec.
Rate of rise of current (dI/dt)
The rate at which the current flowing in the device rises is known as its rate of rise (dI/dt) of current.

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Comparison between BJT and MOSFET:

Sl
BJT MOSFET
No

1 It is a Bipolar Device It is majority carrier Device

2 Current control Device Voltage control Device.

3 Output is controlled by controlling base current Output is controlled by controlling gate voltage

4 Negative temperature coefficient Positive temperature coefficient

5 So paralleling of BJT is difficult. So paralleling of this device is easy.

Dive circuit is complex. It should provide Dive circuit is simple. It should provide
6
constant current(Base current) constant voltage(gate voltage)

7 Losses are low. Losses are higher than BJTs.

8 So used in high power applications. Used in low power applications.

9 BJTs have high voltage and current ratings. They have less voltage and current ratings.

10 Switching frequency is lower than MOSFET. Switching frequency is high.

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