Sandeep Pasala
Sandeep Pasala
Sandeep Pasala
E-mail: sandeep.h264@gmail.com
Mobile: +91-9972-656-646
OBJECTIVE:
Pursuing a challenging career in the field of information technology, embedded systems and
multimedia signal processing, where I can use my technical skills and expertise in solving the
real-world problems and excel through constant learning and experience.
PROFESSIONAL SUMMARY:
Having 12+ years of experience into embedded systems development and Multimedia
with Linux and Windows.
Working as a Technical Lead in Intel Bangalore through Aricent Bangalore
from Jan 2015 to till date.
Worked as a Lead Engineer in Samsung Research India Pvt Ltd
Bangalore from Jul 2012 to December 2014.
Worked as a Senior Software Engineer in Aricent Bangalore from
December 2010 to June 2012.
Worked as a DSP Engineer in Squid Design Systems India Pvt Ltd
Hyderabad from January 2008 to November 2010.
TECHNICAL KNOWLEDGE:
9+ years of work experience on Developing multimedia Codecs for Gstreamer,
Optimization and enhancement on ARM, Linux, Squid DSP.
3+ Years of experience into windows application development for NMS.
Expertise in C, C++, ARM Assembly, x86 asm languages.
Expertise in Python (3.0) scripting language (Numpy, Pytorch) .
Hands on experience in Computer Vision and Deep Neural Networks (Detection,
Classification, Object Tracking).
Expertise in design and implementation of HEVC Decoder for multi core architectures.
Experience in porting HEVC decoder to ARM Cortex A8, A9, A5 architectures.
Experience in porting Screen Content Codec to Cortex M4 architectures.
Expertise in the Design and Implementation of H.264 video decoder for a massively
parallel, SIMD based DSP, Bit Stream Processor, VLIW (Very Large Instruction Word).
Good working knowledge of MPEG4, H263, VC1-AP, VP8. H264, H265/HEVC, EVS,
OpenCV.
SKILLS:
Operating systems : Windows, Linux.
Programming Languages : Python, C, C++, Data Structures and Assembly.
Processors : ARM, DSP.
Software/Tools : Visual Studio, Pycharm, RVDS, WinScp, Putty
: DS -5, IAR , VNC, GDB, Vxworks RTOS.
Version Management : CVS, SVN, Clear Case, Git
EDUCATION:
Company: Intel
Description: Build pipeline to post process the video data from the NVR. Applying properitary
algorithms like Detect, Object Tracking and Classification on the video data and compare the
results with gstreamer.
Individual Responsibilities:
- Developed Streaming application using Open Vino into Intel Star framework for Next
Unit Of Computing (NUC).
- Validate and test the Streaming application.
- Build hardware setup.
Company: Intel
Description: Porting of Enhanced Voice Services an audio codec for LTE to Cortex A5
architecture. Coded for both ARM 11 and Neon architectures.
Individual Responsibilities:
- Optimize the EVS codec routines and port on ARM Neon Architecture.
- Debug the Hand written assembly code and fix the delays and optimize the performance
numbers.
- Peer code Reviews.
3: Porting of HEVC tools to ARM Cortex- A8 architecture.
Description: HEVC is the new video coding standard successor to H.264. HEVC is said to
double the data compression ratio compared to H.264/MPEG-4 AVC at the same level of video
quality. It provides improved video quality at the same bit rate. It can support 8K UHD and
resolutions up to 8192x4320.
Individual Resposibilities:
- Develop the HEVC code in C from the reference.
- Optimize the coding tools in C and further port to ARM.
- Design a multi threaded HEVC Decoder along with the Neon Optimization
Description: This is the low complexity codec intended for on screen application like power
point, sharing of the display to other devices and porting Gaussian filter, Sobel filter, Histogram,
Warp Affine, Perspective Warp, SURF kernels to SRP.
Technology: C , Linux.
Individual Responsibilities:
- Understand the opencv Image kernels and port them to the SRP architecture.
Description: This is the low complexity codec intended for on screen application like power
point, sharing of the display to other devices.
Individual Responsibilities:
- Port the Screen codec to Cortex M4 architectures.
Company: Aricent
Description: Splitting the single threaded code to multiple threads to achieve parallelism for
On multi core processors like cortex A9. This involves platform abstraction, creation of threads,
semaphores and managing the data flow between the cores. 40% performance gain is observed for
720p clips
Individual Responsibilities:
- Develop Dual threaded H264 decoder for Cortex A9 architecture.
Company: Aricent
Description: Actively involved in the designing deblocking filter for progressive, Interlaced
Frame, Interlaced Field. Played a keep role in fixing the bugs in the developed code by me as well
as peers. Apart from this had good understanding of WMV9 –SP and WMV9-MP.
Individual Responsibilities:
- Develop VC1- AP codec in Visual studio and measure the performance results on panda board.
Description: Implementing Network alarms and feature support for cobra for network
management systems. Involved in the design, coding, implementation and Unit testing for the
feature developed of 400G network card. Involved in fixing the real time customer issues on the
existing code base.
Individual Responsibilities:
-Develop new features for NMS OTN in corba.
- Enhance the exisitng features and test the alarm component.
- Build Hardware setups.
Description: H264 is the new AVC standard with better compression compared to its predecessor
MPEG4. With improved Quality at the cost increased complexity.
Individual Responsibilities:
Implementation, Optimization, Debugging and Testing of the video coding tools for H.264
video decoding standard.
Design and Implementation of Video Algorithms in C.