GOVERNMENT ENGINEERING COLLEGE BHARUCH

ELECTRICAL ENGINEERING DEPARTMENT

QUESTION BANK
SEMESTER-III
SUBJECT: ANALOG AND DIGITAL ELECTRONICS (3130907)

Chapter-1 Differential, multi-stage and operational amplifiers CO-1

1 Classify the types of negative feedback & explain each in brief.

2 Draw the circuit diagram of class B push-pull amplifier & explain its working
3 Write a short note on cross over distortion
4 Compare different types of power transistors
5 What is the effect of negative feedback on gain & bandwidth?
6 Draw the circuit diagram of class A amplifier & explain its working
7 Draw the circuit diagram of class B amplifier & explain its working
8 Draw the circuit diagram of class AB amplifier & explain its working
9 State the different features of power amplifier and explain them
10 Classify the power amplifier based on the position of Q point on the ac load line.
11 Why efficiency of Class A amplifier is lowest of the entire power amplifier.
12 Explain direct coupled and RC coupled amplifiers with its frequency response.
13 What is power amplifier? Give important features of power amplifier circuit.
14 Define: OP-AMP.
15 Draw the equivalent circuit of an op amp & explain the significance of each component
16 Explain the ideal voltage transfer characteristics of op amp
17 Draw transistor C-E amplifier circuit. Draw its ac equivalent circuit
Sketch the block schematic of a typical operational amplifier and briefly explain the function of each
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block.
What do you mean by slew rate in an OP-AMP? Also mention about causes of slew rate and explain
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its significance in applications.
Chapter-2 Linear applications of op-amp CO-2
1 Derive the expression for voltage gain of differential amplifier with two op amps.
2 Compare inverting amplifier & non-inverting amplifier
Define Following electrical parameters: input offset voltage, input resistance, CMRR, SVRR, Large
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signal voltage gain, Output voltage swing, and slew rate
Draw two op-amp based differential amplifier and derive expressions for its gain, input and output
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resistances, and bandwidth
Derive the expression for the closed loop gain, input resistance and output resistance of voltage series
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feedback amplifier.
6 Explain the following terms. (1) PSRR (2) Input bias current (3) Input offset Voltage
7 Explain the ideal voltage transfer characteristics of Op-amp.
8 Distinguish between ideal and practical OP-AMP.
9 Describe the phenomenon of common mode rejection ration (CMRR).
10 State limitations of Op-amp as comparators.
11 Define the meaning of virtual ground in Op-amp.
12 Explain How Op-amp works as an average amplifier.
13 Explain thermal drift.
Derive the expression for the closed loop gain, input resistance and output resistance of voltage series
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feedback amplifier.
15 Discuss why negative feedback is suitable for amplifier applications.
The 741C op-amp having the following parameters is connected as a non-inverting amplifier with R1=
1KΩ and RF = 10KΩ compute the values of AF, RiF, RoF, fF, &VooT
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[Parameters of 741 IC are: A (open loop gain) = 2 × 105 , Ri = 2 MΩ, Ro = 75Ω, F0 = 5Hz , Supply
voltages = ± 15 V, output voltage swing = ± 13 V.
Find the input voltage of an ideal op-amp. It’s one of the inputs and output voltages are 2v and 12v.
17 (Gain=3).
(A) 8v (B)4v (C)-4v (D) -2v
Determine the output voltage of an op-amp for input voltages of Vi1 = 150 μV, Vi2 = 140 μV. The
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amplifier has a differential gain of Ad 4000 and the value of CMRR is: (a) 100. (b) 105 .
19 Derive the equation for non inverting amplifier using op amp.
20 Explain voltage follower.
21 Explain inverter using op-amp.
22 Write short notes on summing amplifier.
23 Explain summing, scaling and averaging amplifier when op-amp is connected in inverting mode.
24 How op-amp can be used as a difference amplifier?
25 Draw subtractor circuit using op-amp.
What is an instrumentation amplifier? Explain with the help of neat diagram the operation of an
26 instrumentation amplifier employing the three basic op-amps and with provision for variation in the
voltage gain.
27 What are the requirements of an instrumentation amplifier?
28 Write a short note on integrator.
29 Explain the operation of zero crossing detector
30 Draw the circuit op-amp as differentiator and explain with necessary waveforms
31 Explain how Op-amp works as summing amplifier.
32 List applications of instrumentation amplifier.
33 Explain the following terms. (1) PSRR (2) Input bias current (3) Input offset Voltage (4) CMRR.
34 Explain in detail voltage follower with its applications.
35 What are the advantages of active filters over passive filters?
36 Sketch Wein bridge oscillator. Explain working
37 Draw the circuit op-amp as differentiator and explain with necessary waveforms.
38 How to detect peak of waveform using OP-AMP?
39 Compare: Comparator and Schmitt trigger.
40 Draw and explain the use of op-amp as a zero crossing detector
Chapter-3 Nonlinear applications of op-amp CO-2

1 Explain principle of basic comparator.

2 List the important characteristics of comparator.
3 Explain the operation of zero cross detector.
4 Write a short note on Schmitt trigger circuit
5 Compare comparator and Schmitt trigger.
6 Explain symmetric square wave generator using op amp.
7 Draw and explain the circuit diagram to generator triangular waveform using OP AMP.
8 Write a short note on sawtooth wave generator.
9 Explain resolution and quantization error in reference to ADC.
10 Explain Circuit diagram of OP AMP as a peak detector.
Chapter-4 Combinational Digital Circuits CO-3

1 State & prove De Morgan’s theorems with the help of truth tables.
2 Obtain the truth table of the function: F= xy + xyʹ + yʹz.
Show that AʘB = AB + A’B’ = (A⊕B)’ = (AB’+A’B)’. Also construct the corresponding logic
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diagrams
Using laws of Boolean algebra prove that AB + BC + A'C = AB + A'C.
Show that AB’C + B + BD’ + ABD’ + A’C = B + C
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Show that (A + C) (A + D) (B + C) (B + D) = AB + CD
Reduce the expression F = ((AB)’+A’+AB)’
Minimize the following Boolean expressions.
1. X = ( (A'B'C')' + (A'B)' )'
5 2. Y = AB + ABC' + A'BC + A'BC'
Prove the following Boolean identities.
(i) XY+YZ+Y’Z=XY+Z (ii) AB+A’B+A’B’=A’+B
Minimize the logic function X = A(B' + C')(A + D).
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Also realize the reduced function using NOR gates only
Minimize the logic function X = A(B' + C')(A + D).
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Also realize the reduced function using NOR gates only
Reduce following Boolean function and then realize the reduced one using NOR gate only. X = A
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(B'+C') (A+D) OR
Simplify using Boolean laws and draw the logic diagram for the given expression. 𝐹 = 𝐴𝐵𝐶 +
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𝐴𝐵 𝐶 + 𝐴𝐵𝐶 + 𝐴𝐵𝐶 + 𝐴𝐵 𝐶
Express the Boolean function F = AB + A’C in a product of maxterm. OR
10 Convert the expression Y= A + BC into the standard SOP form.OR
Convert F (A, B, C) = BC +A into standard minterm form.
Reduce to simplest form using K-map:
11 𝐹 𝐴, 𝐵, 𝐶, 𝐷 = 𝛴(0,1,2,5,8,9,10)
OR Reduce the expression F = Σm(0,2,3,4,5,6) using K-map and implement using NAND gates only.
Reduce the expression in SOP and POS form using K-map.
F(A,B,C,D) = Σm (1,5,6,12,13,14) + d(2,4)
OR Simplify Boolean function using K-Map
F(w,x,y,z)=Σ(1,3,5,8,9,11,15) d(w,x,y,z)=Σ(2,13)
OR Minimize following Boolean function using K-map & design the simplified function using logic
12 gates.
F = Σ m(1, 2, 4, 6, 7, 11, 15) + Σ d(0, 3)
OR Reduce the given function using K-map and implement the same using gates. F(A,B,C,D ) = Σm
(0,1,3,7,11,15) + Σd ( 2,4)
OR Minimize the following logic function using K-maps and realize using NAND and NOR gates.
F(A,B,C,D) =Σ_m(1,3,5,8,9,11,15) + d(2,13).
Minimise the logic function F (A,B,C,D)=Π_M (1, 2, 3, 8, 9, 10, 11,14)·d (7, 15). Use Karnaugh map.
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Draw the logic circuit for the simplified function using NOR gates only.
Simplify the following Boolean function by means of the Tabulation Method. F(A,B,C,D) =
14 Σ(1,2,3,5,6,7,8,9,12,13,15)

15 OR Simplify following Boolean function by using the tabulation method F = Σ(0,1,3,7,8,9,11,15)

Using D as the MEV/VEM, reduce
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𝑌 = 𝐴𝐵 𝐶 𝐷 + 𝐴𝐵 𝐶𝐷 + 𝐴𝐵 𝐶 𝐷 + 𝐴𝐵 𝐶 𝐷 + 𝐴𝐵 𝐶𝐷 + 𝐴𝐵 𝐶𝐷.
Simplify following Boolean function using VEM.
17 F=AB’CD+A’BC’D+AB’CD’+A’B’C’D
F=A’B’C’D+A’BC’D’+A’BC’D+AB’C’D’+AB’CD’+AB’CD+ABCD’
Design a combinational circuit with four input lines that represent a decimal digit in BCD and four
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output lines that generates the 9’s Complement of the input digit.
 Explain Half Adder circuit with neat diagram. OR
19 Draw the truth table of full adder and implement using minimum number of logic gates. (2) OR
Write short note on half adder and full adder.
Draw the truth table of full subtractor and implement using minimum number of logic gates.
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OR Explain Full Subtractor with truth table and circuit diagram.
Realize the expression Y(A, B, C, D) = Ʃ m(15, 7, 4, 6, 8, 9, 12, 14) using an 8:1 MUX.
OR Implement following Boolean function using 8 : 1 multiplexer.
F(A,B,C,D)=Σ(2,3,5,7,8,9,12,13,14,15)
OR Implement the given function using multiplexer.
F (A, B, C) = Ʃ (1, 3, 5, 6)
OR Implement the given function using multiplexer
21 F(A,B,C) = Σm(1,2,4,7)
OR Implement following logic function using 8X1 MUX.
F = Σ m(0, 1, 3, 5, 7, 11, 13, 14, 15)
OR Implement the given function using 8 X 1 Multiplexer
F (A,B,C,D) = Σm (0,1,2,3,5,8,9,11,14)
OR Design a 8 to 1 multiplexer by using the four variable function given by F(A,B,C,D)
=Σm(0,1,3,4,8,9,15).
Draw logic diagram of 3-line to 8-line decoder.
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Give the applications of Decoder.
23 Design 4-to-16 Decoder from two 3-to-8 Decoders.
Using suitable decoder & OR gates, design 4-bit binary to Gray code converter. OR Design 4 bit
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binary to gray code converter.
25 Explain full adder and design a full adder circuit using 3 to 8 decoder and two OR gates.
26 Implement Full Subtractor Circuit with the help of Decoder and logic gates.
27 Design 3-bit even parity generator circuit using X-OR gates only.
28 Design 1-bit magnitude comparator circuit. (
29 Draw & explain in brief pin diagram of 7485 four-bit magnitude comparator.
Design BCD to Excess-3 code convertor circuit. OR Design a BCD to excess 3 code converter using
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minimum number of NAND gates.
Do as directed:
31 (1) How many selection lines are required in 32X1 MUX?
(2) How many enable lines are there in 3X8 decoder IC 74138?
Chapter-5 Sequential circuits and systems CO-3

Distinguish between combinational and sequential logic circuits. (2) Give the applications of flip-
1
flops.
2 Explain edge triggering and level triggering.
Draw high assertion & low assertion input SR latches.
3 OR Draw gated SR latch using NAND gates only.
OR Draw & explain in brief a high assertion input SR latch.
With the help of function table and circuit diagram explain the working of clocked SR flip flop. OR
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Explain RS flip flop in detail.
5 Draw logic diagram, graphical symbol and Characteristic table for clocked D flip-flop.
6 Draw the circuit diagrams and Truth table of all the Flip flops (SR, D, T and JK).
Draw the truth tables for JK & T FF. Using these truth tables, derive & explain the excitation tables of
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JK & T FF. OR Explain JK flip flop with its characteristic table and excitation table.
8 What is race around condition in JK flip flop.
9 Draw a frequency divider using JK FFs to divide input clock frequency by a factor of 8.
Explain working of master-slave JK flip-flop with necessary logic diagram, state equation and state
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diagram. OR Explain Master Slave JK flip-flop with truth table and circuit diagram.
11 Convert D flip flop into SR flip flop
12 Implement D flip flop using JK flip flop.
13 Implement T flip flop using D flip flop.
Chapter-6 A/D and D/A Converters CO-4

1 Give the comparison between synchronous and asynchronous counters. (2)

Design 3-bit ripple up-counter using negative edge triggered JK flip flops. Also draw the waveforms.
2
OR Design 4-bit ripple counter using negative edge triggered JK flip flop. (2)
3 Design Modulo-8 counter using T flip flop.
Design a 3-bit synchronous up counter using K-maps and positive edge-triggered JK FFs.
4
OR Design 3-bit synchronous up counter using T flip flop.
5 Design a synchronous BCD counter with JK flip-flops.
6 Design a mod-12 Synchronous up counter using D-flipflop.
7 How does a counter works as frequency divider? Explain with suitable example.
Draw and explain 4-bit serial-in serial-out shift register using D FFs. OR Explain 4 bit serial in serial
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out shift register.
With necessary sketch explain Bidirectional Shift Register with parallel load.
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OR With neat sketch design 4-bit bidirectional shift register.
10 Write short note on four bit Universal Shift Register.
11 Draw and explain Ring counter
12 Design a 4 bit synchronous up counter.
13 Explain digital to analog converter with binary weighted resisters
14 Draw & explain R-2R ladder D/A converter with necessary equations.
List out various commonly used A/D converters. Draw & explain Flash A/D converter with necessary
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decoding table. Also mention pros & cons of the same.
16 Draw 4-bit down counter; explain its working with timing diagram and truth table
17 Design 4-bit up/down ripple counter