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    Model1 COA 2022

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    Hritik Kaul
    This document is a model paper for a Computer Organization and Architecture examination. It contains 10 questions testing various concepts related to computer organization at different cognitive levels. Students are instructed to answer any 5 questions fully. The questions cover topics such as functional units of a computer, addressing modes, subroutine vs interrupt service routines, synchronous bus operation, SRAM organization, processor registers, instruction pipelining in RISC vs CISC, and concepts like superscalar organization, cache coherency protocols and multiprocessor systems.

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    Model1 COA 2022

    Uploaded by

    Hritik Kaul
    18 views2 pages
    This document is a model paper for a Computer Organization and Architecture examination. It contains 10 questions testing various concepts related to computer organization at different cognitive levels. Students are instructed to answer any 5 questions fully. The questions cover topics such as functional units of a computer, addressing modes, subroutine vs interrupt service routines, synchronous bus operation, SRAM organization, processor registers, instruction pipelining in RISC vs CISC, and concepts like superscalar organization, cache coherency protocols and multiprocessor systems.

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    model1-COA-2022

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    This document is a model paper for a Computer Organization and Architecture examination. It contains 10 questions testing various concepts related to computer organization at different cognitive levels. Students are instructed to answer any 5 questions fully. The questions cover topics such as functional units of a computer, addressing modes, subroutine vs interrupt service routines, synchronous bus operation, SRAM organization, processor registers, instruction pipelining in RISC vs CISC, and concepts like superscalar organization, cache coherency protocols and multiprocessor systems.

    Copyright:

    © All Rights Reserved
    Download as PDF, TXT or read online from Scribd
    Download as pdf or txt
    18 views2 pages

    Model1 COA 2022

    Uploaded by

    Hritik Kaul
    This document is a model paper for a Computer Organization and Architecture examination. It contains 10 questions testing various concepts related to computer organization at different cognitive levels. Students are instructed to answer any 5 questions fully. The questions cover topics such as functional units of a computer, addressing modes, subroutine vs interrupt service routines, synchronous bus operation, SRAM organization, processor registers, instruction pipelining in RISC vs CISC, and concepts like superscalar organization, cache coherency protocols and multiprocessor systems.

    Copyright:

    © All Rights Reserved
    Download as PDF, TXT or read online from Scribd
    Download as pdf or txt
    of 2

    (Page 1 of 2)

    USN 21CST304
    Dr. Ambedkar Institute of Technology, Bangalore
    B. E. Third Semester End Examination
    Model Paper - 1
    Computer Organization and Architecture
    [Time: 3 Hours ] [ Maximum Marks: 100]

    Note: 1. Answer ANY FIVE fully Question.

    Marks CO RBT
    Level
    1.a) Describe the basic functional units of a computer with a neat [10Marks] CO1 L1
    diagram.
    b) What is a bus? Explain single bus structruced in a computer. [04Marks] CO1 L2
    c) Explain the following: [06Marks] CO1 L2
    Byte addressability
    Big-endian assignment
    Little-endian

    OR
    2.a) What is an addressing mode? Explain different addressing [10Marks] CO1 L1
    modes.
    b) Register R1, R2, R3 of a processor contain the decimal value [10Marks] CO1 L2
    1250, 5500 and 25. Determine the values of the registers after
    each instruction is executed.
    a) Load R3, (R2)
    b) Move #0250,R5
    c) Store R5,20(R1,R2)
    d) Add (R2)+,R5
    e) Add –(R2),R1
    3.a) Differentiate between subroutine and interrupt service routine [06Marks] CO2 L2
    b) Discuss Interrupt I/O method for data transfer. [06Marks] CO2 L2
    c) Write a note on bus arbitration. [08Marks] CO2 L3
    OR
    4.a) Explain a synchronous bus. Also give the timing diagram of an [06Marks] CO2 L2
    input transfer on s synchronous bus.
    b) Define the following: [06Marks] CO2 L2
    a) Burst Mode.
    b) Handshaking Mechanism.
    c) What is bus arbitration? Explain the centralized arbitration with [06Marks] CO2 L2
    a neat diagram.
    5.a) Explain the Read/Write operation of an SRAM cell designed [08Marks] CO3 L2
    using CMOS, with the help of a neat diagram.
    b) Discuss the organization of 1K × 1 memory chip. [08Marks] CO3 L1
    c) Write briefly about Read-only memory. [04Marks] CO3 L1
    OR
    6.a) [08Marks] CO3 L2
    b) [10Marks] CO3 L2

    Dr. Ambedkar Institute of Technology, Bangalore – 560056


    (Autonomous Institution Affiliated to Visvesveraya Technological University, Belgaum)
    (Page 2 of 2)

    c) [02Marks] CO3 L2

    7.a) What general roles are performed by processor registers? [06Marks] CO4 L2
    b) List and briefly explain various ways in which an instruction [08Marks] CO4 L2
    pipeline can deal with conditional branch instructions.
    c) What are some typical distinguishing characteristics of RISC [08Marks] CO4 L2
    organization.
    OR

    8.a) What are the tasks that a processor must accomplish? [05Marks] CO4 L2
    b) Describe the registers that are essential to instruction execution. [08Marks] CO4 L2
    c) Describe the common fields or flags included in the program [07Marks] CO4 L1
    status word (PSW)

    9.a) Define the term superscalar. How is the superscalar organization [10Marks] CO5 L1
    different from the traditional scalar organization?
    b) Briefly define the following term: [10Marks] CO5 L1
    i)True data dependency ii) Procedure dependency iii) Resource
    conflicts iv) output dependency v) Antidependency
    OR
    10. List and briefly define the four categories of computer systems [08Marks] CO5 L1
    a) proposed by Fynn.
    b) What are the chief characteristics of an SMP [05Marks] CO5 L2
    c) What are some of the key benefit of clustering? [05Marks] CO5 L2
    d) List out the four states in MESI protocol. [02Marks] CO5 L1

    Dr. Ambedkar Institute of Technology, Bangalore – 560056


    (Autonomous Institution Affiliated to Visvesveraya Technological University, Belgaum)

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