Oti 077
Oti 077
Oti 077
August 1991
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Oak Technology Inc
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0TI-077
Extended High Resolution VGA Graphics Controller
with IMByte Video Memory Support
DESCRIPTION
The on-un is a highly integrated, single chip Extended High Resolution VGA Graphics Controller compatible with
the IBM VGA standard. The package dimensions and pin count are identical to the 0TI-067. However, enbancemeots
have been made to the 0TI-fJ77 to increase fuactionality. In addition to the Oak Technology extended VGA modes
implemented in the 0TI-067, the 0TI-077 provides a hip resolution of 1024x768 with 2S6 colors and l28Oxl024 with
16 colors. The 0TI-077 is completely compatible with the IBM VGA standard and implements all registers, and data
paths while providing improved perfonnance and additional functionality. It is backwards compatible with EGAlCGAl
MDA and Hercules graphics modes. EspeciaJIy attractive for motherboard applications is the low external chip count
which can be achieved by using Oak's proprietary highly integrated VGA controller which supports 256KX 4 DRAMs.
Application notes for using the 0TI-077 in a motherboard implementation are available by contacting Oak Technology.
FEATURES
Oak Technology realizes the importance of the hardware-software driver relationship. We are committed to providing our
customers with the most powerful software drivers. Our software driver support includes some of the fastest drivers
available for popular applications including:
In addition to these 0TI-067 drivers, software driver support bas been expanded for the 0TI~7 to include support for
MicrosoftWmdowsin64Ox48032Kcolormode, 1024x168256colormodeandl28Oxl02416colormode. Softwaredriver
support for AutoCAD has also been expanded to include l024x768 2S6 color mode and 128Oxl024 16 color mode.
TEL:(408) 737-0888 FAX:(408) 737-3838 Oak Technology. Inc. 139 Kifer Ct. Sunnyvale, CA 94086
Pagel
Max
Vertkal VESA.
Resolution ~ Retresla Group I GroupH Gr01lpm Group IV Gro""V Co_"..
320x200 16.256 70Hz X X X X ·X N/A
S12x512 32K 56Hz X X N/A
640x400 32K 56Hz X X N/A
640x480 32K 56Hz X X N/A
640x480 16.256 60Hz X X X X X X
64Ox480 16,256 72Hz X X X X
768x1024 16 60Hz X X
800x600 16,256 56Hz X X X X X
800x600 16,256 60Hz X X X X X
800x600 16 72Hz X X X
1024x768 4.16 60Hz X X X
1024x768 16,256* 87Hz X X
1024x768 16 72Hz X N/A
128Oxl024* 16 87Hz X N/A
* Interlaced mode
Monitor DefinitiODS
PINDIAGRAM
The Pin Diagram for the 0TI-077 is identical to that of the 011-067 shown on page 6 of the 0TI-067 databook.
The System Block Diagram for the 0TI-077 is identical to that of the 0TI-067 shown on page 7 of the 0TI-067 data
book.
OTI-077INTERFACES
The BIOS ROM Interface. Clock Interface aad Video Interface are identical to those of the 011-067 showD. on pages 8
and 9 of the 011-067 data book.
CPU Interface
The CPU interface for the 0TI-077 is identical to that used in the 0TI-067 for add-on card imp1emeatations. For
information reprcIina the CPU interface for motherboard impJementations usin& the 0TI-077 consult the 011-077
application notes. .
Oak Tect.KJIogy. Inc.. 139 Kifer Ct. Sunnyvale, CA 94086 TEL:(408) 737-0888 FAX:(408) 737-3838
Page 2
DRAM Interface
The OTI-crn supports 2S6K X 4 DRAM ICs in all modes. It supports 256 XBytes ofvideo memory by using two 256 X
4 DRAM chips; SllKBytes ofvideo memory by using four2S6KX 4 DRAM chips and 1MByteofvideo memmy by using
eight 256K X 4 DRAM chips.The 0TI-<Y17 provides the same control sipls and add:ressIdata lines to the video memory
in page mode as the 0TI-067. For a 44 MHz memory clock, DRAMS with an.:cess speed of SOns are RqUired, 70DS
DRAMs are required for a SO MHz memory clock, the same as with the 0TI-067.
In extended modes with 256 colors. the video memory is organiud in a packed pixel mode; 1 byte per pixel. 'Ibis requires
programmingofan OTIextendec:hegisterandmay use eitherS12 XBytes or 1 MByteofDRAM depending on the resolution.
For 16 color extended modes. the video niemory is organized as planar mode (1 bit from each of 4 planes) which is
compatible with mM's 16 color graphics mode.
FUNCTIONAL DESCRIPTIONS
PIN DESCRIPTIONS
Most pin descriptions for 0TI-077 are identical to those found on pages 13-15 of the 0TI-067 databook. The following
pin nameldescription changes are applicable when taking advantage of the new features of the 0TI-077.
RDSWn (108)-Read Dip Swikh. This is a dual function pin (RDSWnlCAS2n). It is dependent on the configuration
register 3DF index 12 bit 3 (pin CSELO). In OTI-077 configurations it is used to set the second SIlK bytes of video
memory for use in 1 MByte configurations.
3DFix12b3:2=O RDSWn
3DFix12b3:2-1 CAS2n
There is no penalty in setting this pin to an active (high) position when used in configurations having only S12K.
bytes of video memory.
ROMENLn (63)-ROM Low Byte Enable. This pin is used to control the BIOS ROM when implementing an add-on
card configuration. When using a motherboard implementation this pin is not used. 'The 0TI-077 uses this pin in a
dual role (ROMENLnlALE) depending on the configuration register 3DF index 12 bits 2&3.
3DFix12b3:2-00 ROMENLn
3DFixl2b3:2-01 ROMENLn
3DFix12b3:2-10 ROMENLn
3DFix12b3:2-11 ALE
Pin ALE is used to latch in the decodeofLA23-LA20for complete24 bitaddtess decode when inan on-boardconfiguntion.
However. this 1atch will be opeaed when in Master mode (because the Master device does not generate ALE) or by RAl2.
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RA12(64)-ROM address bit 12. This pin serves different: pmposes for 0TI-067 and arI-an configuntioas:
For ao-077lmplemeptations
1- ROM address bit 12. This pin is used if ROM paging is desired.
2- DMA Hold Acknowledge(HLDA). RA12 becomes m..DA in on-board
configurations( this condition is similar to those necessary to activate ALE).
m.DA is needed along with AEN and RESHn to differentiate between CPU
mode, Master mode and DMA mode.
Mode Colors Rows CharCeU Display Mode Resolution Buffer Start #DRAMs NonlInteriaced
The Sync Specifications for Standard VGA Modes and. Sync Specifications for Digital'Monitors (EGA. CGA and
Mono) are identical to those of the 0TI-067.
Oak Technology, Inc. 139 Kafer Ct. SumyvaIe, CA 94086 TEL:(408) 737-0888 FAX:(408) 737-3838
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The C1TI-077 provides extended registers identical to those of the on-067. In addition to these JegisteIs the C1TI-077
provides support for the following new Jegisters and mlunu:ements to existing registers:
on OVERFLOW REGISTERH
SYSTEM SEIUP REGISTER
VIDEO SUBSYSI'EM ENABLE REGISTER.
This is a write only Jegister. This register is effective only when the arI-077 is in on-board configuration
(3DFixI2b2-1) and pin VSETUP(128) is aO.
mt Description
0-4 Reserved
5 OTI-067 Enable/Setup.
0=0TI-067 in setup mode. Only write register 102 is allowed.
1 =0TI-067 is in active mode. In active mode. access to 0TI-067 is allowed only ifbit
o of register 102 is a 1, and either bit 0 of register 3C3 is a 1 or pin ENVGA (127) is a 1.
6 Reserved
7 System bOard Enable/Setup. This bit is not implemented.
This is a write only register. This register is effective only when the OTI-077 is in on-board configuration
(3DFix12b2= I) and pin ENVGA(I27) is a O. "
Bit Description
o 0TI-067 EnablelDisable.
0-OTI-067 is disabled. No access to arI-067 or arI-077, video DAC (arI-066) are
allowed.
1=C1TI-067 is enabled. Acc:ess to arI-067 or 0TI-077 are allowed only if bit 0 of
register 102 is also a 1.
1-7 Reserved
Note: Access to this register is not effected by the state of register 102.
Bit DescrIption
0-2 Reserved
3 High Order Start Address Bit 9
4 High Order Cursor Location Bit 9
5 Page select for CRT display. 'This bit and bit 5 of the on OVERFLOW register
(index 14) combine to select ODe of four 2S6K bytes of video memory.
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6 Page select for video memory accesses (both read and write). This bit and bit 6 of the OTI
OVERFLOW register (index 14) combine to select one of four 2S6K bytes of video memory to be
accessed.
7 Test bit. This bit is used to mux in new video clock frequency during chip testing.
Note: Bits 6&5 should only be programmed if there exists IMega bytes of video memory. Programming these
two bits when there are only SIlK bytes of video memory may result in a blank display. Similarly. bits 6&5
ofregisler lDF index 14 should only be programmed if there exists SIlK bytes of video memory.
B1.t Descriptiog
0-4 Same as OTI-067
5-7 ID bits.
BiL1 ~ Chip type
Oak Technology, Inc. 139 Kifer Ct. Sunnyvale. CA 94086 TEL:(408) 737-0888 FAX:(408) 737-3838
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B.lt Dacdption
0-2 Same as 0TI~7
3-4 extended graphics mode selection
Mode Selection
5 Same as 0TI~7
6-7 Memory configuration.
These two pins are initially set to 01 at power up, then set to proper configuration by BIOS depending on how
much memory is detected. Notice bit 6 can be used to tum off 1MByte support.
lID D§criRtim
0-3 Read Segment for system memory read.
4-7 Write segment for system memory write.
TEL:(408) 737-0&88 FAX:(408) 737-3838 Oak Technology, Inc. 139 Kifer Ct. Sunnyvale. CA 94086
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Oak Technology. Inc. 139 Klar Q. SumyvaIe. CA 94086 TEl:(408) 737~ FAX:(408) 737-3838
PageS