Slau 748 B

User's Guide
SLAU748B – October 2017 – Revised September 2018
SimpleLink™ Ethernet MSP432E401Y Microcontroller

LaunchPad™ Development Kit (MSP-EXP432E401Y)
The SimpleLink™ Ethernet MSP432E401Y Microcontroller LaunchPad™ Development Kit is a low-cost

evaluation platform for SimpleLink Arm® Cortex®-M4F-based Ethernet microcontrollers. The Ethernet
LaunchPad development kit highlights the MSP432E401Y microcontroller with its on-chip 10/100 Ethernet
MAC and PHY, USB 2.0, hibernation module, motion control pulse-width modulation, and a multitude of
simultaneous serial connectivity.
Contents
1 Board Overview .............................................................................................................. 2
1.1 Kit Contents.......................................................................................................... 3
1.2 Using the Ethernet LaunchPad Development Kit ............................................................... 3
1.3 Features .............................................................................................................. 3
1.4 BoosterPack Plug-in Modules ..................................................................................... 4
1.5 Specifications ........................................................................................................ 4
2 Hardware Description ....................................................................................................... 5
2.1 Functional Description.............................................................................................. 5
2.2 Power Management............................................................................................... 20
2.3 Debug Interface.................................................................................................... 21
3 Software Development .................................................................................................... 21
3.1 Software Description .............................................................................................. 21
3.2 Source Code ....................................................................................................... 21
3.3 Tool Options ....................................................................................................... 21
3.4 Programming the Ethernet LaunchPad Development Kit .................................................... 22
4 PCB Schematics ........................................................................................................... 22
List of Figures
1 SimpleLink Ethernet MSP432E401Y LaunchPad Development Kit ................................................... 2
2 SimpleLink Ethernet LaunchPad Development Kit Block Diagram ................................................... 5
3 Default Jumper Locations ................................................................................................. 18
4 BSL Header and Resistors................................................................................................ 19
5 Ethernet LaunchPad Development Kit Schematics (1 of 5) .......................................................... 23
List of Tables
1 MSP-EXP432E401Y Specifications ....................................................................................... 4
2 BoosterPack Plug-in Module Interface 1 GPIO and Signal Muxing ................................................... 8
3 BoosterPack 2 GPIO and Signal Muxing ............................................................................... 11
4 X11 Breadboard Adapter Odd-Numbered Pad GPIO and Signal Muxing .......................................... 14
5 X11 Breadboard Adapter Even-Numbered Pad GPIO and Signal Muxing ......................................... 15
6 Resistors for Serial Bootloader Protocols ............................................................................... 19
SLAU748B – October 2017 – Revised September 2018 SimpleLink™ Ethernet MSP432E401Y Microcontroller LaunchPad™ 1
Submit Documentation Feedback Development Kit (MSP-EXP432E401Y)
Copyright © 2017–2018, Texas Instruments Incorporated
Board Overview www.ti.com
Trademarks
SimpleLink, LaunchPad, BoosterPack, Code Composer Studio are trademarks of Texas Instruments.
Arm, Cortex, Keil, RealView are registered trademarks of Arm Limited.
IAR Embedded Workbench is a registered trademark of IAR Systems.
All other trademarks are the property of their respective owners.
1 Board Overview
The SimpleLink Ethernet MSP432E401Y Microcontroller LaunchPad Development Kit is a low-cost
evaluation platform for SimpleLink Arm Cortex-M4F-based Ethernet microcontrollers. The Ethernet
LaunchPad development kit design highlights the MSP432E401Y microcontroller with its on-chip 10/100
Ethernet MAC and PHY, USB 2.0, hibernation module, motion control pulse-width modulation, and a
multitude of simultaneous serial connectivity. The Ethernet LaunchPad development kit also features two
user switches, four user LEDs, dedicated reset and wake switches, a breadboard expansion option and
two independent BoosterPack™ XL expansion connectors. The preprogrammed quick start application on
the Ethernet LaunchPad development kit also enables remote monitoring and control of the evaluation
board from an internet browser anywhere in the world. The web interface is provided by a third party,
Exosite. Each Ethernet LaunchPad development kit is enabled on the Exosite platform allowing users to
create and customize their own Internet-of-Things applications.
Figure 1 shows the Ethernet LaunchPad development kit with key features highlighted.
Figure 1. SimpleLink Ethernet MSP432E401Y LaunchPad Development Kit

2 SimpleLink™ Ethernet MSP432E401Y Microcontroller LaunchPad™ SLAU748B – October 2017 – Revised September 2018
Development Kit (MSP-EXP432E401Y) Submit Documentation Feedback
www.ti.com Board Overview
1.1 Kit Contents

The Ethernet LaunchPad development kit contains the following items:
• SimpleLink Ethernet MSP432E401Y LaunchPad Development Board (MSP-EXP432E401Y)
• USB Micro-B plug to USB-A plug cable
• Quick Start Guide
1.2 Using the Ethernet LaunchPad Development Kit

The recommended steps for using the Ethernet LaunchPad development kit are:
1. Run the Out of Box demo software. For detailed instruction on how to run the out of box demo, visit
this SimpleLink Academy tutorial.
2. Take the first step towards developing your own applications. The Ethernet LaunchPad development
kit is supported by the SimpleLink MSP432E4 SDK. After installing the SDK, look in the following
installation directories for bare metal and rtos based examples
a. examples\nortos\MSP_EXP432E401Y\
b. examples\rtos\MSP_EXP432E401Y\
See Section 3 for more details about software development.
3. Experiment with BoosterPack plug-in modules. This development kit conforms to the latest revision of
the BoosterPack plug-in module pinout standard. It has two independent BoosterPack plug-in module
connections to enable a multitude of expansion opportunities.
4. Customize and integrate the hardware to suit your end application. This development kit can be used
as a reference for building your own custom circuits based on SimpleLink microcontrollers or as a
foundation for expansion with your custom BoosterPack plug-in module or other circuit. This manual
can serve as a starting point for this endeavor.
5. More Resources. See the TI MCU LaunchPad web page for more information and available
BoosterPack modules.
1.3 Features
The Ethernet LaunchPad development kit includes the following features:
• SimpleLink MSP432E401Y microcontroller
• Ethernet connectivity with fully integrated 10/100 Ethernet MAC and PHY
• Motion Control PWM
• USB 2.0 Micro A/B connector
• 4 user LEDs
• 2 user switches
• 1 independent hibernate wake switch
• 1 independent microcontroller reset switch
• Jumper for selecting power source:
– XDS-110 USB
– USB Device
– BoosterPack
• Preloaded Internet-of-Things application
• I/O brought to board edge for breadboard expansion
• Two independent BoosterPack XL standard connectors featuring stackable headers to maximize
expansion through BoosterPack plug-in module ecosystem
Board Overview www.ti.com
1.4 BoosterPack Plug-in Modules

The Ethernet LaunchPad development kit provides an easy and inexpensive way to develop applications
with the MSP432E401YPDT microcontroller. BoosterPack plug-in modules are add-on boards that follow a
pinout standard created by TI. The TI and third-party ecosystem of BoosterPack plug-in modules greatly
expands the peripherals and potential applications that you can easily explore with the Ethernet
LaunchPad development kit.
You can also build your own BoosterPack plug-in module by following the design guidelines on the TI
website. TI even helps you promote your BoosterPack plug-in module to other members of the
community. TI offers a variety of avenues for you to reach potential customers with your solutions.
1.5 Specifications
Table 1 summarizes the specifications for the Ethernet LaunchPad.
Table 1. MSP-EXP432E401Y Specifications

Parameter Value
4.75 VDC to 5.25 VDC from one of the following sources:
• XDS-110 USB Micro-B cable connected to PC or other compatible power source
• Target USB (U7) USB Micro-B cable connected to PC or other compatible power source
Board Supply
• BoosterPack 1 Interface (J3-21)
Voltage
• BoosterPack 2 Interface (J7-21)
• 5-V Power header (J13-1)
• Breadboard expansion header (J10-2 or J10-97). See schematic symbol JP1 for power input selection.
Dimensions 6.85 in × 2.5 in × .425 in (17.4 cm × 6.35 cm × 10.8 mm) (L × W × H)
• 5 VDC to BoosterPack modules, current limited by TPS2052B. Nominal rating is 1 A. Board input power
Break-out supply limitations may also apply.
Power Output • 3.3 VDC to BoosterPack modules, limited by output of TPS79601 LDO. This 3.3-V plane is shared with
onboard components. Total output power limit of TPS79601 is 1 A.
RoHS Status Compliant
www.ti.com Hardware Description
2 Hardware Description
The Ethernet LaunchPad development kit includes an MSP432E401YPDT microcontroller with an
integrated 10/100 Ethernet MAC and PHY. This advanced Arm Cortex-M4F MCU has a wide range of
peripherals that are made available to users through the onboard accessories and the BoosterPack plug-
in module connectors. This chapter explains how those peripherals operate and interface to the
microcontroller.
Figure 2 shows a high-level block diagram of the Ethernet LaunchPad development kit.
Figure 2. SimpleLink Ethernet LaunchPad Development Kit Block Diagram
2.1 Functional Description
2.1.1 Microcontroller
The MSP432E401Y is a 32-bit Arm Cortex-M4F based microcontroller with 1024KB of flash memory,
256KB of SRAM, 6KB of EEPROM, and 120-MHz operation, integrated 10/100 Ethernet MAC and PHY,
integrated USB 2.0 connectivity with external high-speed USB 3.0 PHY capability, a hibernation module, a
multitude of serial connectivity and motion control PWM, as well as a wide range of other peripherals. See
the MSP432E401Y microcontroller data sheet for more complete details.
Most of the microcontroller signals are routed to 0.1-in (2.54-mm) pitch headers or through-hole solder
pads. An internal multiplexor allows different peripheral functions to be assigned to each of these GPIO
pads. When adding external circuitry, consider the additional load on the evaluation board power rails.
The MSP432E401Y microcontroller is factory-programmed with a quick start demo program. The quick
start program resides in on-chip Flash memory and runs each time power is applied, unless the quick start
application has been replaced with a user program. The quick start application automatically connects to
http://ti.exosite.com when an internet connection is provided through the RJ45 Ethernet jack on the
evaluation board.
2.1.2 Ethernet Connectivity

The Ethernet LaunchPad development kit is designed to connect directly to an Ethernet network using
RJ45 style connectors. The microcontroller contains a fully integrated Ethernet MAC and PHY. This
integration creates a simple, elegant and cost-saving Ethernet circuit design. Example code is available for
LwIP TCP/IP protocol stack. The embedded Ethernet on this device can be programmed to act as an
HTTP server, client or both. The design and integration of the circuit and microcontroller also enable users
to synchronize events over the network using the IEEE1588 precision time protocol.
When configured for Ethernet operation, it is recommended that the user configure LED D3 and D4 to be
controlled by the Ethernet PHY to indicate connection and transmit or receive status.
Hardware Description www.ti.com
2.1.2.1 RJ-45 Connections

To improve EMI performance, use a metal-shielded RJ-45 connector with the shield connected to chassis
ground.
Bob Smith termination to the RJ-45 connector involves 75-Ω termination resistors connected to the
unused differential pair connections on the RJ-45 connector. Bob Smith termination is used to reduce
noise that results from common-mode current flows and to reduce susceptibility to noise from unused wire
pairs on the RJ-45.
NOTE: Power Over Ethernet (PoE) applications require a modified Bob Smith termination, which
consists of DC-blocking capacitors in series with the 75-Ω termination resistors.
2.1.3 USB Connectivity

The Ethernet LaunchPad development kit is designed to be USB 2.0 ready. A TPS2052B load switch is
connected to and controlled by the microcontroller USB peripheral, which manages power to the USB
micro A/B connector when functioning in a USB host. When functioning as a USB device, the entire
Ethernet LaunchPad development kit can be powered directly from the USB micro A/B connector. Use
JP1 to select the desired power source.
USB 2.0 functionality is provided and supported directly out of the box with the target USB micro A/B
connector. High-speed USB 3.0 functionality can be enabled by adding an external USB PHY. The USB
external PHY control and data signals are provided on the breadboard expansion header J10.
2.1.4 Motion Control

The Ethernet LaunchPad development kit includes motion control functionality through the use of a PWM
module capable of generating eight PWM outputs. The PWM module provides a great deal of flexibility
and can generate simple PWM signals – for example, those required by a simple charge pump – as well
as paired PWM signals with dead-band delays, such as those required by a half-H bridge driver. Three
generator blocks can also generate the full six channels of gate controls required by a 3-phase inverter
bridge.
A quadrature encoder interface (QEI) is also available to provide motion control feedback.
See Section 2.1.6 for details about the availability of these signals on the BoosterPack interfaces.
2.1.5 User Switches and LEDs

Two user switches are provided for input and control of the MSP432E401Y software. The switches are
connected to GPIO pins PJ0 and PJ1.
A reset switch and a wake switch are also provided. The reset switch initiates a system reset of the
microcontroller whenever it is pressed and released. Pressing the reset switch also asserts the reset
signal to the BoosterPack plug-in module and Breadboard headers. The wake switch is one way to bring
the device out of hibernate mode.
Four user LEDs are provided on the board. D1 and D2 are connected to GPIOs PN1 and PN0. These
LEDs are dedicated for use by the software application. D3 and D4 are connected to GPIOs PF4 and
PF0, which can be controlled by user’s software or the integrated Ethernet module of the microcontroller.
A power LED is also provided to indicate that 3.3-V power is present on the board.
2.1.6 BoosterPack Plug-in Modules and Headers
2.1.6.1 BoosterPack Plug-in Module Interface 1

The Ethernet LaunchPad development kit features two fully independent BoosterPack XL connectors.
BoosterPack Plug-in Module Interface 1, located near the XDS110 emulator, is fully compliant with the
BoosterPack plug-in module standard.
I2C is provided in both the original BoosterPack plug-in module standard configuration as well as the
updated standard location. Use of I2C on the bottom left of the BoosterPack plug-in module connections
per the updated standard is highly encouraged whenever possible.
Motion control advanced PWM connections are provided on the inner right connector for motion control
applications.
Table 2 lists the BoosterPack plug-in module pins and the GPIO alternate functions available on each pin.
The MSP432E401Y GPIO register GPIOPCTL values are shown for each configuration. The headers in
this table are labeled from left to right in ten pin columns. J1 and J2 make up the outer BoosterPack plug-
in module standard pins, and J3 and J4 make up the inner BoosterPack XL standard pins.
Table 2. BoosterPack Plug-in Module Interface 1 GPIO and Signal Muxing

Standard Digital Function (GPIOPCTL Bit Encoding)
Header Pin GPIO MCU Pin Analog
Function 1 2 3 5 6 7 8 11 13 14 15
J1 1 3.3 V 3.3 V
J1 2 Analog PE4 123 AIN9 U1RI – – – – – – – – – SSI1XDAT0
J1 3 UART RX PC4 25 C1- U7Rx – – – – – – – – – EPI0S7
J1 4 UART TX PC5 24 C1+ U7Tx – – – – RTCCLK – – – – EPI0S6
J1 5 GPIO PC6 23 C0+ U5Rx – – – – – – – – – EPI0S5
J1 6 Analog PE5 124 AIN8 – – – – – – – – – – SSIXDAT1
J1 7 SPI CLK PD3 4 AIN12 – I2C8SDA T1CCP1 – – – – – – – SSI2CLk
J1 8 GPIO PC7 22 C0- U5Tx – – – – – – – – – EPI0S4
J1 9 I2C SCL PB2 91 – – I2C0SCL T5CCP0 – – – – – – USB0STP EPI0S27
J1 10 I2C SDA PB3 92 – – I2C0SDA T5CCP1 – – – – – – USB0CLK EPI0S28
J3 21 5V 5V
J3 22 ground GND
J3 23 Analog PE0 15 AIN3 U1RTS – – – – – – – – – –
J3 24 Analog PE1 14 AIN2 U1DSR – – – – – – – – – –
J3 25 Analog PE2 13 AIN1 U1DCD – – – – – – – – – –
J3 26 Analog PE3 12 AIN0 U1DTR – – – – – – – – – –
J3 27 Analog PD7 128 AIN4 U2CTS – T4CCP1 USB0PFLT – – NMI – – – SSI2XDAT2
J3 28 Analog PD6 127 AIN5 U2RTS – T4CCP0 – USB0EPEN – – – – – SSI2XDAT3
J3 29 A out PM4 74 TMPR3 U0CTS – T4CCP0 – – – – – – – –
J3 30 A out PM5 73 TMPR2 U0DCD – T4CCP1 – – – – – – – –
J4 40 PWM PF1 43 – – – – EN0LED2 M0PWM1 – – – – SSI3XDAT0 TRD1
J4 39 PWM PF2 44 – – – – – M0PWM2 – – – – SSI3Fss TRD0
J4 38 PWM PF3 45 – – – – – M0PWM3 – – – – SSI3Clk TRCLK
J4 37 PWM PG0 49 – – I2C1SCL – EN0PPS M0PWM4 – – – – – EPI0S11
J4 36 Capture PL4 85 – – – T0CCP0 – – – – – – USB0D4 EPI0S26
J4 35 Capture PL5 86 – – – T0CCP1 – – – – – – USB0D5 EPI0S33
J4 34 GPIO PL0 81 – – I2C2SDA – – M0FAULT3 – – – – USB0D0 EPI0S16
J4 33 GPIO PL1 82 – – I2C2SCL – – PhA0 – – – – USB0D1 EPI0S17
J4 32 GPIO PL2 83 – – – – C0o PhB0 – – – – USB0D2 EPI0S18
J4 31 GPIO PL3 84 – – – – C1o IDX0 – – – – USB0D3 EPI0S19
J2 11 ground GND
J2 12 PWM PM3 75 – – – T3CCP1 – – – – – – – EPI0S12
J2 13 GPIO PH2 31 – U0DCD – – – – – – – – – EPI0S2
J2 14 GPIO PH3 32 – U0DSR – – – – – – – – – EPI0S3
J2 15 reset RESET
J2 16 SPI MOSI PD1 2 AIN14 – I2C7SDA T0CCP1 C1o – – – – – – SSI2XDAT0
J2 17 SPI MISO PD0 1 AIN15 – I2C7SCL T0CCP0 C0o – – – – – – SSI2XDAT1
J2 18 GPIO PN2 109 – U1DCD U2RTS – – – – – – – – EPI0S29
J2 19 GPIO PN3 110 – U1DSR U2CTS – – – – – – – – EPI0S30
Table 2. BoosterPack Plug-in Module Interface 1 GPIO and Signal Muxing (continued)
Standard Digital Function (GPIOPCTL Bit Encoding)
Function 1 2 3 5 6 7 8 11 13 14 15
J2 20 GPIO PP2 103 – U0DTR – – – – – – – – USB0NXT EPI0S29
2.1.6.2 BoosterPack Plug-in Module Interface 2

The second BoosterPack XL interface is located near the bottom of the board. This interface is fully
compliant with the BoosterPack plug-in module standard, and adds features not covered by the
BoosterPack plug-in module standard that enable operation with additional BoosterPack plug-in modules.
Using the jumpers JP4 and JP5, Controller Area Network (CAN) digital receive and transmit signals can
be optionally routed to the BoosterPack Plug-in Module Interface 2 connector. In the default configuration,
UART0 is used for the XDS-110 backchannel UART and CAN is not present on the BoosterPack plug-in
module headers. In this configuration, the ROM serial bootloader can be used over the XDS-110
backchannel UART. When the jumpers are configured for CAN on the BoosterPack plug-in module
interface, then UART2 must be used for the XDS-110 backchannel UART.
To comply with both the original and the new BoosterPack plug-in module standard, I2C is provided on
both sides of the BoosterPack plug-in module connection. Use of I2C on the bottom left of the BoosterPack
plug-in module connection is highly encouraged where possible, to be in compliance with the new
BoosterPack plug-in module standard. To provide I2C capability on the right side of the connector, per the
original standard, two 0-Ω resistors (R19 and R20) are used to combine the SPI and I2C signals. These
signals are not shared with any other pins on the LaunchPad development kit and therefore removal of
these zero-ohm resistors should not be required. Software should be certain that unused GPIO signals are
configured as inputs.
Table 3 lists the BoosterPack plug-in module pins and the GPIO alternate functions available at each pin.
The MSP432E401Y GPIO register GPIOPCTL values are shown for each configuration. The headers in
this table are labeled from left to right in ten pin columns. J5 and J6 make up the outer BoosterPack
standard pins, J7 and J8 make up the inner BoosterPack XL standard pins.
Table 3. BoosterPack 2 GPIO and Signal Muxing

Standard Digital Function (FPIOPCTL Bit Encoding)
Function 1 2 3 5 6 7 8 11 13 14 15
J5 1 3.3 V
J5 2 Analog PD2 3 AIN13 – I2C8SCL T1CCP0 C2o – – – – – – SSI2Fss
J5 3 UART RX PP0 118 C2+ U6Rx – – – – – – – – – SSI3XDAT2
J5 4 UART TX PP1 119 C2- U6Tx – – – – – – – – – SSI3XDAT3
GPIO (See
J5 5 PD4 125 AIN7 U2Rx – T3CCP0 – – – – – – – SSI1XDAT2
JP4)
PA0 33 – U0Rx I2C9SCL T0CCP0 – – CANORx – – – – –
Analog (See
J5 6 PD5 126 AIN6 U2Tx – T3CCP1 – – – – – – – SSI1XDAT3
JP5)
PA1 34 – U0Tx I2C9SDA T0CCP1 – – CAN0Tx – – – – –
J5 7 SPI CLK PQ0 5 – – – – – – – – – – SSI3Clk EPI0S20
J5 8 GPIO PP4 105 – U3RTS U0DSR – – – – – – – USB0D7 –
J5 9 I2C SCL PN5 112 – U1RI U3CTS I2C2SCL – – – – – – – EPIO0S35
J5 10 I2C SDA PN4 111 – U1DTR U3RTS I2C2SDA – – – – – – – EPIO0S34
J7 21 5V
J7 22 GND
J7 23 Analog PB4 121 AIN10 U0CTS I2C5SCL – – – – – – – – SSI1Fss
J7 24 Analog PB5 120 AIN11 U0RTS I2C5SDA – – – – – – – – SSI1Clk
J7 25 Analog PK0 18 AIN16 U4Rx – – – – – – – – – EPI0S0
J7 26 Analog PK1 19 AIN17 U4Tx – – – – – – – – – EPI0S1
J7 27 Analog PK2 20 AIN18 U4RTS – – – – – – – – – EPI0S2
J7 28 Analog PK3 21 AIN19 u4CTS – – – – – – – – – EPI0S3
J7 29 A out PA4 37 – U3Rx I2C7SCL T2CCP0 – – – – – – – SSI0XDAT0
J7 30 A out PA5 38 – U3Tx I2C7SDA T2CCP1 – – – – – – – SSI0XDAT1
J8 40 PWM PG1 50 – – I2C1SDA – – M0PWM5 – – – – – EPI0S10
J8 39 PWM PK4 63 – – I2C3SCL – EN0LED0 M0PWM6 – – – – – EPI0S32
J8 38 PWM PK5 62 – – I2C3SDA – EN0LED2 M0PWM7 – – – – – EPI0S31
J8 37 PWM PM0 78 – – – T2CCP0 – – – – – – – EPI0S15
J8 36 Capture PM1 77 – – – T2CCP1 – – – – – – – EPI0S14
J8 35 Capture PM2 76 – – – T3CCP0 – – – – – – – EPI0S13
J8 34 GPIO PH0 29 – U0RTS – – – – – – – – – EPI0S0
J8 33 GPIO PH1 30 – U0CTS – – – – – – – – – EPI0S1
J8 32 GPIO PK6 61 – – I2C4SCL – EN0LED1 M0FAULT1 – – – – – EPI0S25
J8 31 GPIO PK7 60 – U0RI I2C4SDA – RTCCLK M0FAULT2 – – – – – EPI0S24
J6 11 GND
J6 12 PWM PM7 71 TMPR0 U0RI – T5CCP1 – – – – – – – –
J6 13 GPIO PP5 106 – U3CTS I2C2SDL – – – – – – – USB0D6 –
J6 14 GPIO PA7 41 – U2Tx I2C6SDA T3CCP1 USB0PFLT – – – USB0EPEN SSI0XDAT3 – EPI0S9
J6 15 RESET
J6 16 SPI MOSI PQ2 11 – – – – – – – – – – SSI3XDAT0 EPI0S22
Table 3. BoosterPack 2 GPIO and Signal Muxing (continued)

Standard Digital Function (FPIOPCTL Bit Encoding)
Function 1 2 3 5 6 7 8 11 13 14 15
I2C PA3 36 – U4Tx I2C8SDA T1CCP1 – – – – – – – SSI0Fss
J6 17 SPI MISO PQ3 27 – – – – – – – – – – SSI3XDAT1 EPI0S23
I2C PA2 35 – U4Rx I2C8SCL T1CCP0 – – – – – – – SSI0Clk
J6 18 GPIO PP3 104 – U1CTS U0DCD – – – – – – – USB0DIR EPI0S30
J6 19 GPIO PQ1 6 – – – – – – – – – – SSI3Fss EPI0S21
J6 20 GPIO PM6 72 TMPR1 U0DSR – T5CCP0 – – – – – – – –
2.1.6.3 Breadboard Connection

The breadboard adapter section of the board is a set of 98 holes on a 0.1-inch grid. Properly combined
with a pair of right angle headers, the entire Ethernet LaunchPad development kit can be plugged directly
into a standard 300-mil (0.3-in) wide solderless breadboard. The right angle headers and breadboard are
not provided with this kit. Suggested part numbers are Samtec TSW-149-09-L-S-RE and TSW-149-08-L-
S-RA right angle pin headers and Twin industries TW-E40-1020 solderless breadboard. Samtec TSW-
149-09- F-S-RE and TSW-149-09-F-S-RA may be substituted.
Most microcontroller signals are made available at the breadboard adapter holes (J10). These signals are
grouped by function where possible. For example, all EPI signals are grouped on one side of the
connector. Many of the analog signals are grouped near VREF, and UART, SSI, and I2C signals are
grouped by peripheral to make expansion and customization simpler.
Table 4 and Table 5 list the GPIO pin and signal muxing for the X11 breadboard adapter pads.
Table 4. X11 Breadboard Adapter Odd-Numbered Pad GPIO and Signal Muxing
Digital Function (GPIOPCTL Bit Encoding)
Pin Port MCU Pin Analog
1 2 3 5 6 7 8 11 13 14 15
1 3V3
3 GND
5 PB4 121 AIN10 U0CTS I2C5SCL – – – – – – – – SSI1Fss
7 PB5 120 AIN11 U0RTS I2C5SDA – – – – – – – – SSI1Clk
9 PH0 29 – U0RTS – – – – – – – – – EPI0S0
11 PH1 30 – U0CTS – – – – – – – – – EPI0S1
13 PH2 31 – U0DCD – – – – – – – – – EPI0S2
15 PH3 32 – U0DSR – – – – – – – – – EPI0S3
17 PC7 22 C0- U5Tx – – – – – – – – – EPI0S4
19 PC6 23 C0+ U5Rx – – – – – – – – – EPI0S5
21 PC5 24 C1+ U7Tx – – – – RTCCLK – – – – EPI0S6
23 PC4 25 C1- U7Rx – – – – – – – – – EPI0S7
25 PA6 40 – U2Rx I2C6SCL T3CCP0 USB0EPEN – – – – SSI0XDAT2 – EPI0S8
27 PA7 41 – U2Tx I2C6SDA T3CCP1 USB0PFLT – – – USB0EPEN SSI0XDAT3 – EPI0S9
29 PG1 50 – – I2C1SDA – – M0PWM5 – – – – – EPI0S10
31 PG0 49 – – I2C1SCL – EN0PPS M0PWM4 – – – – – EPI0S11
33 PM3 75 – – – T3CCP1 – – – – – – – EPI0S12
35 GND
37 PM2 76 – – – T3CCP0 – – – – – – – EPI0S13
39 PM1 77 – – – T2CCP1 – – – – – – – EPI0S14
41 PM0 78 – – – T2CCP0 – – – – – – – EPI0S15
43 PL0 81 – – I2C2SDA – – M0FAULT3 – – – – USB0D0 EPI0S16
45 PL1 82 – – I2C2SCL – – PhA0 – – – – USB0D1 EPI0S17
47 PL2 83 – – – – C0o PhB0 – – – – USB0D2 EPI0S18
49 PL3 84 – – – – C1o IDX0 – – – – USB0D3 EPI0S19
51 PQ0 5 – – – – – – – – – – SSI3Clk EPI0S20
53 PQ1 6 – – – – – – – – – – SSI3Fss EPI0S21
55 PQ2 11 – – – – – – – – – – SSI3XDAT0 EPI0S22
57 PQ3 27 – – – – – – – – – – SSI3XDAT1 EPI0S23
59 PK7 60 – U0RI I2C4SDA – – – – – – EPI0S24
61 GND
63 PK6 61 – – I2C4SCL – EN0LED1 M0FAULT1 – – – – – EPI0S25
65 PL4 85 – – – T0CCP0 – – – – – – USB0D4 EPI0S26
67 PB2 91 – – I2C0SCL T5CCP0 – – – – – – USB0STP EPI0S27
69 PB3 92 – – I2C0SDA T5CCP1 – – – – – – USB0CLK EPI0S28
71 PP2 103 – U0DTR – – – – – – – – USB0NXT EPI0S29
73 PP3 104 – U1CTS U0DCD – – – RTCCLK – – – USB0DIR EPI0S30
75 PK5 62 – – I2C3SDA – EN0LED2 M0PWM7 – – – – – EPI0S31
77 PK4 63 – – I2C3SCL – EN0LED0 M0PWM6 – – – – – EPI0S32
Table 4. X11 Breadboard Adapter Odd-Numbered Pad GPIO and Signal Muxing (continued)
1 2 3 5 6 7 8 11 13 14 15
79 PL5 86 – – – T0CCP1 – – – – – – USB0D5 EPI0S33
81 PN4 111 – U1DTR U3RTS I2C2SDA – – – – – – – EPI0S34
83 PN5 112 – U1RI U3CTS I2C2SCL – – – – – – – EPI0S35
85 PN0 107 – U1RTS – – – – – – – – – –
87 PN1 108 – U1CTS – – – – – – – – – –
89 PN2 109 – U1DCD U2RTS – – – – – – – – EPI0S29
91 PN3 110 – U1DSR U2CTS – – – – – – – – EPI0S30
93 PQ4 102 – U1Rx – – – – – DIVSCLK – – – –
95 WAKE
97 5V
Table 5. X11 Breadboard Adapter Even-Numbered Pad GPIO and Signal Muxing
1 2 3 5 6 7 8 11 13 14 15
2 5V
4 GND
6 PA2 35 – U4Rx I2C8SCL T1CCP0 – – – – – – – SSI0Clk
8 PA3 36 – U4Tx I2C8SDA T1CCP1 – – – – – – – SSI0Fss
10 PA4 37 – U3Rx I2C7SCL T2CCP0 – – – – – – – SSI0XDAT0
12 PA5 38 – U3Tx I2C7SDA T2CCP1 – – – – – – – SSI0XDAT1
14 PE0 15 AIN3 U1RTS – – – – – – – – – –
16 PE1 14 AIN2 U1DSR – – – – – – – – – –
18 PE2 13 AIN1 U1DCD – – – – – – – – – –
20 PE3 12 AIN0 U1DTR – – – – – – – – – –
22 PE4 123 AIN9 U1RI – – – – – – – – – SSI1XDAT0
24 PE5 124 AIN8 – – – – – – – – – – SSI1XDAT1
26 PK0 18 AIN16 U4Rx – – – – – – – – – EPI0S0
28 PK1 19 AIN17 U4Tx – – – – – – – – – EPI0S1
30 PK2 20 AIN18 U4RTS – – – – – – – – – EPI0S2
32 PK3 21 AIN19 U4CTS – – – – – – – – – EPI0S3
34 VREF
36 GND
38 PD5 126 AIN6 U2Tx – T3CCP1 – – – – – – – SSI1XDAT3
40 PD4 125 AIN7 U2Rx – T3CCP0 – – – – – – – SSI1XDAT2
42 PD7 128 AIN4 U2CTS – T4CCP1 USB0PFLT – – NMI – – – SSI2XDAT2
44 PD6 127 AIN5 U2RTS – T4CCP0 USB0EPEN – – – – – – SSI2XDAT3
46 PD3 4 AIN12 – I2C8SDA T1CCP1 – – – – – – – SSI2Clk
48 PD1 2 AIN14 – I2C7SDA T0CCP1 C1o – – – – – – SSI2XDAT0
Table 5. X11 Breadboard Adapter Even-Numbered Pad GPIO and Signal Muxing (continued)
1 2 3 5 6 7 8 11 13 14 15
50 PD0 1 AIN15 – I2C7SCL T0CCP0 C0o – – – – – – SSI2XDAT1
52 PD2 3 AIN13 – I2C8SCL T1CCP0 C2o – – – – – – SSI2Fss
54 PP0 118 C2+ U6Rx – – – – – – – – – SSI3XDAT2
56 PP1 119 C2- U6Tx – – – – – – – – – SSI3XDAT3
58 PB0 95 USB0ID U1Rx I2C5SCL T4CCP0 – – CAN1Rx – – – – –
60 PB1 96 USB0VBUS U1Tx I2C5SDA T4CCP1 – – CAN1Tx – – – – –
62 GND
64 PF4 46 – – – – EN0LED1 M0FAULT0 – – – – SSI3XDAT2 TRD3
66 PF0 42 – – – – EN0LED0 M0PWM0 – – – – SSI3XDAT1 TRD2
68 PF1 43 – – – – EN0LED2 M0PWM1 – – – – SSI3XDAT0 TRD1
70 PF2 44 – – – – – M0PWM2 – – – – SSI3Fss TRD0
72 PF3 45 – – – – – M0PWM3 – – – – SSI3Clk TRCLK
74 PA0 33 – U0Rx I2C9SCL T0CCP0 – – CAN0Rx – – – – –
76 PA1 34 – U0Tx I2C9SDA T0CCP1 – – CAN0Tx – – – – –
78 PP4 105 – U3RTS U0DSR – – – – – – – USB0D7 –
80 PP5 106 – U3CTS I2C2SCL – – – – – – – USB0D6 –
82 PJ0 116 – U3Rx – – – – – – – – –
84 PJ1 117 – U3Tx – – – – – – – – – –
86 PM7 71 TMPR0 U0RI – T5CCP1 – – – – – – – –
88 PM6 72 TMPR1 U0DSR – T5CCP0 – – – – – – – –
90 PM5 73 TMPR2 U0DCD – T4CCP1 – – – – – – – –
92 PM4 74 TMPR3 U0CTS – T4CCP0 – – – – – – – –
94 RESET
96 GND
98 3V3
2.1.6.4 Other Headers and Jumpers

JP1 is provided to select the 5-V power input source for the Ethernet LaunchPad development kit. The left
position is for BoosterPack plug-in module power; this position also disconnects both USB voltages from
the board’s primary 5-V input. In the left position, the TPS2052B does not limit current so additional care
should be exercised. The middle position draws power from the USB connector on the bottom of the board
near the Ethernet jack. The right position is the default, in which power is drawn from the XDS-110 USB
connection through J101. If JP1 is in the left or middle position, which selects the BoosterPack headers or
the USB OTG connector, respectively, externally provide 3.3 V to the board, and remove the 3V3 jumper
on J101.
JP2 separates the MCU 3.3-V power domain from the rest of the 3.3-V power on the board allowing an
ammeter to be used to obtain more accurate measurements of microcontroller power consumption. JP4
and JP5 are used to configure CAN signals to the BoosterPack Plug-in Module Interface 2 connector. In
the default vertical configuration, CAN is not present on the BoosterPack plug-in module connector.
UART2 goes to the BoosterPack plug-in module connector and UART 0 goes to the XDS-110
backchannel serial port and can also be used for the ROM serial bootloader. In the horizontal CAN-
enabled configuration, UART2 goes to the XDS-110 backchannel serial port and CAN signals are
available on the BoosterPack Plug-in Module Interface 2 connector. The ROM serial bootloader is not
available to the XDS-110 backchannel serial port while the jumpers are in the CAN position.
Figure 3 shows the default configuration and relative location of the jumpers on the board.
Figure 3. Default Jumper Locations
2.1.7 Serial Bootloader

The Ethernet LaunchPad development kit enables the serial boot loader on the MSP432E401Y through
the BSL header for connecting to an external BSL host interface, such as the BSL Rocket. The BSL
header supports three communication protocols to the serial boot loader: SPI, UART, and I2C. To use the
serial bootloader, a shrouded 100mil header (such as the AWHW-10G-0202-T from Assman WSW)
should be soldered into the top side of the PCB, paying careful attention to make sure pin 1 of the
connector lines up to pin one of the PCB (denoted by a square pad).
Because several of the pins for different communication protocols are shared on the header, the Ethernet
LaunchPad development kit enables support for all three protocols by using 0-Ω resistor bridges for each
of the signals. See Figure 4 for the location of the header and resistors on the PCB. To connect a specific
protocol, populate the designated resistors with 0-Ω resistors and remove the resistors for the others
protocols (see Table 6). When using I2C, populate R13 and R14 with the pullup resistors if no I2C pullups
are on the external host. Typically the I2C pullup resistors should be 3.3 kΩ.
Figure 4. BSL Header and Resistors
Table 6. Resistors for Serial Bootloader Protocols

Serial Bootloader Resistors Populated Resistors Left
Protocol With 0-Ω Resistors Unpopulated
R5
R6
R7 R9
I2C
R8 R10
R11
R12
R7
R8
R5 R9
UART
R6 R10
R11
R12
R9 R5
R10 R6
SPI
R11 R7
R12 R8
2.2 Power Management
2.2.1 Power Supplies

The Ethernet LaunchPad development kit can be powered from three different input options:
• Onboard XDS-110 USB cable (Debug, Default)
• Target USB cable
• BoosterPack plug-in module or Breadboard adapter connections
The JP1 power-select jumper is used to select one of the power sources.
In addition, the 3V3 Jumper on J101 power jumper can be used to isolate the 3.3-V output of the
TPS79601 in the XDS-110 emulator from the 3.3-V rail of the target side.
A TPS2052B load switch is used to regulate and control power to the Target USB connector when the
microcontroller is acting in USB host mode. This load switch also limits current to the BoosterPack plug-in
module and Breadboard adapter headers when the JP1 jumper is in the XDS-110 position.
2.2.2 Low Power Modes

The Ethernet LaunchPad development kit demonstrates several low power microcontroller modes. In run
mode, the microcontroller can be clocked from several sources such as the internal precision oscillator or
an external crystal oscillator. Either of these sources can then optionally drive an internal PLL to increase
the effective frequency of the system up to 120 MHz. In this way, the run mode clock speed can be used
to manage run mode current consumption.
The microcontroller also provides sleep and deep sleep modes and internal voltage adjustments to the
flash and SRAM to further refine power consumption when the processor is not in use but peripherals
must remain active. Each peripheral can be individually clock gated in these modes so that current
consumption by unused peripherals is minimized. A wide variety of conditions from internal and external
sources can trigger a return to run mode.
The lowest power setting of the microcontroller is hibernation, which requires a small amount of supporting
external circuitry available on the Ethernet LaunchPad development kit. The Ethernet LaunchPad
development kit can achieve microcontroller current consumption modes under 2 µA using hibernate
VDD3ON mode. Hibernation with VDD3ON mode is not supported on this board. The Ethernet LaunchPad
can be woken from hibernate by several triggers including the dedicated wake button, the reset button, an
internal RTC timer and a subset of the device GPIO pins. The hibernation module provides a small area of
internal battery backed register bank that can preserve data through a hibernate cycle.
2.2.3 Clocking
The Ethernet LaunchPad uses a 25-MHz crystal (Y1) to drive the main MSP432E401Y internal clock
circuit. Most software examples use the internal PLL to multiply this clock to higher frequencies up to 120
MHz for core and peripheral timing. The 25-MHz crystal is required when using the integrated Ethernet
MAC and PHY.
The Hibernation module is clocked from an external 32.768-kHz crystal (Y3).
2.2.4 Reset
The RESET signal to the MSP432E401Y microcontroller connects to the RESET switch, BoosterPack
plug-in module connectors, breadboard adapter, and the XDS-110 target reset line.
External reset is asserted (active low) under the following conditions:
• Power-on reset (filtered by an RC network)
• RESET switch held down
• By the XDS-110 circuit when instructed by the debugger (this capability is optional, and may not be
supported by all debuggers)
• By an external circuit attached to the BoosterPack plug-in module or breadboard connectors
2.3 Debug Interface
2.3.1 XDS-110 Debug Interface

The Ethernet LaunchPad development kit comes with an onboard XDS-110. The XDS-110 allows for the
programming and debugging of the MSP432E401Y using Code Composer Studio™ IDE or any of the
supported tool chains. Note that XDS-110 only supports JTAG debugging at this time.
Debugging external boards using the XDS-110 is possible by removing the TDI, TDO, TCK, TMS, and
RST jumpers from JP101 on the Ethernet LaunchPad development kit and using the XDS-110 to drive
JTAG signals out on J102. To restore the connection to the onboard MSP432E401Y microcontroller,
reinstall the jumpers on JP101.
2.3.2 External Debugger

The connector J11 is provided for the attachment of an external debug adapter such as the IAR I-Jet,
Segger J-Link or Keil® ULINK. This connector follows the Arm 10-pin mini JTAG pinout. To use an
external debugger, make sure the TDI, TDO, TCK, TMS, RST, and 3V3 jumpers are disconnected from
J101. Many external debuggers do not provide a 3.3-V power rail through this adapter and require an
external 3.3-V source to power the LaunchPad development kit.
2.3.3 Virtual COM Port

When plugged into a USB host, the XDS-110 enumerates as both a debugger and a virtual COM port
referred to as the backchannel UART. JP4 and JP5 control the selection of which UART from the
MSP432E401Y is connected to the backchannel UART virtual COM port. In the default configuration,
UART0 maps to the backchannel UART of the XDS-110. In the CAN jumper configuration, UART2 maps
to the backchannel UART of the XDS-110.
3 Software Development
This chapter provides general information on software development as well as instructions for flash
memory programming.
3.1 Software Description

The SimpleLink MSP432E4 Software Development Kit (SDK) provides drivers for all of the peripheral
devices supplied in the design. The Peripheral Driver Library is required to operate the on-chip peripherals
as part of SDK.
The SDK includes a set of example applications that use the Peripheral Driver Library. These applications
demonstrate the capabilities of the MSP432E401Y microcontroller, as well as provide a starting point for
the development of the final application for use on the Ethernet LaunchPad development kit.
3.2 Source Code

The source code is provided as part of the SimpleLink MSP432E4 SDK.
3.3 Tool Options

The source code installation includes directories containing projects, makefiles, and binaries for the
following tool-chains:
• Keil Arm RealView® Microcontroller Development System
• IAR Embedded Workbench® for Arm
• TI Code Composer Studio IDE for Arm and GCC compilers.
For detailed information on using the tools, see the documentation included in the tool chain installation or
visit the website of the tools supplier.
Software Development www.ti.com
3.4 Programming the Ethernet LaunchPad Development Kit

The SimpleLink MSP432E4 SDK includes projects for each of the example applications for the different
supported tool chains. If you installed the SimpleLink MSP432E4 SDK to the default installation path of
C:\ti\, you can find the example applications in C:\ti\
simplelink_msp432e4_sdk_<version>\examples\. The onboard XDS-110 is used with the
supported toolchain to program applications on the MSP-EXP432E401Y LaunchPad development kit.
Follow these steps to program example applications into the Ethernet LaunchPad development kit using
the XDS-110:
1. Install a toolchain on a PC running Microsoft Windows.
2. Connect the USB-A cable plug in to an available USB port on the PC and plug the Micro-B plug to the
XDS-110 USB port at the top of the MSP-EXP432E401Y LaunchPad development kit.
3. Verify the RED LED on the left side of the XDS-110 is illuminated.
4. Run the toolchain and import the project. Build the project to generate the toolchain specific output file.
5. Press on the download and debug button for the toolchain to download the code.
6. After the code has been downloaded to the MSP-EXP432E401Y LaunchPad development kit, run the
code.
4 PCB Schematics
The following figures show the schematics of the Ethernet LaunchPad development kit.
www.ti.com PCB Schematics
1 2 3 4 5 6
BoosterPack 1 Interface
+3V3
+5V
J1/J3 J2/J4
C23
10
6
8
R52 C32 0.1µF 1 21 C24 PF1 40 20
+3.3V +5V PWM/GPIO ! GND
TARGET_VBUS U7 1.0M 3300pF PE4 2 22 0.1µF PF2 39 19 PM3
Analog_In GND PWM/GPIO ! PWM/GPIO !
1
VBUS
ZX62D-AB-5P8 PC4 3
LP_UART_RX Analog_In
23 PE0 PF3 38
PWM/GPIO ! GPIO !
18 PH2
DNP
TP4 GND PC5 4
LP_UART_TX Analog_In
24 PE1 PG0 37
PWM/GPIO ! GPIO
17 PH3 GND
U1A USBD_N 2
D-
GND PC6 5
GPIO ! Analog_In
25 PE2 GND PL4 36
Timer_Cap/GPIO ! RST
16 TARGET_RESET
DNP TGT_RST
TP5 GND PE5 6
Analog In Analog_In
26 PE3 PL5 35
Timer_Cap/GPIO ! SPI_MOSI
15 PD1
PA0 33
PA0
USBD_P 3
D+
PD3 7
SPI_CLK Analog_In/I2S_WS
27 PD7 PL0 34
GPIO ! SPI_MISO
14 PD0
A DNP A
PA1 34 PA1 PK0 18 PK0 TP6 PC7 8 GPIO ! Analog_In/I2S_SCLK 28 PD6 PL1 33 GPIO ! SPI_CS/GPIO ! 13 PN2
PA2 35
PA2 PK1
19 PK1 TARGET_ID 4
ID
PB2 9
I2C_SCL Analog_Out/I2S_SDout
29 PM4 PL2 32
GPIO ! SPI_CS/GPIO !
12 PN3
DNP
PA3 36
PA3 PK2
20 PK2 TP7 PB3 10
I2C_SDA Analog_Out/I2S_SDin
30 PM5 PL3 31
GPIO ! GPIO !
11 PP2
PA4 37 PA4 PK3 21 PK3 5 GND
PA5 38
PA5 PK4
63 PK4
PA6 40 PA6 PK5 62 PK5
PA7 41
PA7 PK6
61 PK6 GND
11
7
9
PK7
60 PK7
TARGET_VBUS PB0 95 PB0
TARGET_VBUS
BoosterPack 2 Interface
96
PB1 PJ0
116 PJ0 +3V3
PB2 91
PB2 PJ1
117 PJ1 TARGET_ID +5V
PB3 92 PB3
U2 J5/J7 J6/J8
PB4 121 29 PH0 PB0 R18 6 C25
PB4 PH0 VBUS
PB5 120 30 PH1 100 2 0.1µF 1 21 C26 PG1 40 20
PB5 PH1 D- +3.3V +5V PWM/GPIO ! GND
TCK_SWDCLK 31 PH2 USBD_N 1 PD2 2 22 0.1µF PK4 39 19 PM7
PH2 D+ Analog_In GND PWM/GPIO ! PWM/GPIO !
TCK_SWDCLK 100 PC0/TCK/SWCLK PH3 32 PH3 USBD_P 3 ID
PP0 3 LP_UART_RX Analog_In 23 PB4 PK5 38 PWM/GPIO ! GPIO ! 18 PP5
TMS_SWDIO 99 PC1/TMS/SWDIO 4 GND NC 5 GND PP1 4 LP_UART_TX Analog_In 24 PB5 PM0 37 PWM/GPIO ! GPIO 17 PA7 GND
98 PC2/TDI PG0 49 PG0 BP2_5 5 GPIO ! Analog_In 25 PK0 GND PM1 36 Timer_Cap/GPIO ! RST 16 TARGET_RESET
TDI
TMS_SWDIO TDO_SWO 97 PC3/TDO/SWO PG1 50 PG1 TPD4S012DRYR BP2_6 6 Analog In Analog_In 26 PK1 PM2 35 Timer_Cap/GPIO ! SPI_MOSI 15 PQ2
PC4 25 GND PQ0 7 27 PK2 PH0 34 14 PQ3 R19 PA3
PC4 SPI_CLK Analog_In/I2S_WS GPIO ! SPI_MISO DNP
PC5 24 PC5 PF0 42 PF0 PP4 8 GPIO ! Analog_In/I2S_SCLK 28 PK3 PH1 33 GPIO ! SPI_CS/GPIO ! 13 PP3 0
PF0 NOTE: TPD4S012 all protection circuits are identical
PC6 23 PC6 PF1 43 PF1 PN5 9 I2C_SCL Analog_Out/I2S_SDout 29 PA4 PK6 32 GPIO ! SPI_CS/GPIO ! 12 PQ1
Connections chosen for simple routing. R20
PC7 22 PC7 PF2 44 PF2 PN4 10 I2C_SDA Analog_Out/I2S_SDin 30 PA5 PK7 31 GPIO ! GPIO ! 11 PM6 PA2
DNP
PF3 45 PF3 0
PD0 1 PD0 PF4 46 PF4 PJ0 4 3
PF4 R19 and R20 can be populated to enable I2c on
PD1 2 PD1 PN0 PN1
JP4 and JP5 CAN and Backchannel UART Selection: Right side of BP2 interface. This is for legacy
PD2 3 PD2 PE0 15 PE0 2 1
Populate Jumpers from 1-2 and 3-4 for default Mode support and the Sensor Hub BoosterPack
1
1
B PD3 4 PD3 PE1 14 PE1 B
This enables ROM UART bootloader. UART0 to XDS
PD4 125 PD4 PE2 13 PE2 D2 D1 USR_SW1
I2C and SSI are available on the corresponding
PD5 126 PD5 PE3 12 PE3 Green Green GND GND +3V3 +5V
Populate from 1-3 and 2-4 for controller area netwo rk BoosterPack 1 interface pins without modificaiton t o
PD6 127 PD6 PE4 123 PE4
PD6 on the boosterpack. UART2 is then available to XDS the board.
2
PD7 128 PD7 PE5 124 PE5 2 PJ1 4 3

JP4 C27 1 2 C28
R27 R33 0.1µF 0.1µF PA6 and PA7 are also used by the onboard radio.
MCU_3V3 2 1 TARGET_RXD 1 2 PA0 3 4
390 390 TARGET_RXD Configure the radio to tri-state these GPIO beofre
MSP432E401YTPDTR PD4 3 4 BP2_5 PB4 5 6 PA2
using them on the boosterpack interface
U1B USR_SW2 PB5 7 8 PA3
R1 R2 GND GND GND PH0 9 10 PA4 GND
10k 10k PL0 81 PH1 11 12 PA5
PL0
PL1 82 PL1
GND GND JP5 PH2 13 14 PE0
TCK_SWDCLK
PL2 83 TARGET_TXD 1 2 PA1 PH3 15 16 PE1

TMS_SWDIO
PL2 See PF0 and PF4 for additional LED's used for TARGET_TXD This is the breadboard connection header.
PL3 84 PL3
PD5 3 4 BP2_6 PC7 17 18 PE2
Ethernet and user application Samtec TSW-149-08-F-S-RA and TSW-149-F-S-RE
PL4 85 PL4
PC6 19 20 PE3
can be used together to create a breadboard
PL5 86
PL5
PC5 21 22 PE4
connector.
USBD_P 94 PL6 PQ0 5 PQ0 PC4 23 24 PE5
See the Users Manual for more information
USBD_N 93
PL7 PQ1
6 PQ1 PA6 25 26 PK0
PQ2 11 PQ2 PA7 27 28 PK1
PM0 78 PM0 PQ3 27 PQ3 PG1 29 30 PK2
PM1 77
PM1 PQ4
102 PQ4 PG0 31 32 PK3
PQ4
PM2 76 PM2
PM3 33 34 VREF+
VREF+
PM3 75 PM3 PP0 118 PP0 35 36
PM4 74
PM4 PP1
119 PP1 PM2 37 38 PD5
PM5 73 PM5 PP2 103 PP2 PM1 39 40 PD4
PM6 72
PM6 PP3
104 PP3 GND PM0 41 42 PD7 GND
PM7 71 PM7 PP4 105 PP4 PL0 43 44 PD6
PP5 106 PP5 PL1 45 46 PD3
C PN0 107 PL2 47 48 PD1 C
PN0
PN1 108 PN1
PL3 49 50 PD0
DNP
PN2 109 PN2
PQ0 51 52 PD2
PN3 110 PN3
PQ1 53 54 PP0
PN4 111 PN4
PQ2 55 56 PP1
NOTE: PB0 and PB1 are used in some
PN5 112 PN5
+3V3 +3V3 PQ3 57 58 PB0 TARGET_VBUS
configurations with 5V signals especially in USB
PK7 59 60
Host or OTG mode. Be aware the 5V may be
MSP432E401YTPDTR 61 62
R3 R4 present on these pins depending on system jumper
BSL PK6 63 64 PF4
DNP
DNP 0 configuration.
BSL_P9 9 10 BSL_P10 PL4 65 66 PF0
7 8 GND PB2 67 68 PF1 GND
These pins are only 5V tolerant when configured for
5 6 PB3 69 70 PF2
DNP USB mode applications
BSL_P3 3 4 PP2 71 72 PF3
TGT_RST
BSL_P1 1 2 PP3 73 74 PA0
+3V3 +3V3 PK5 75 76 PA1
PK4 77 78 PP4
DNP PL5 79 80 PP5
TP14 R14 R13 GND PN4 81 82 PJ0
DNP
DNP DNP
DNP PN5 83 84 PJ1
I2C UART
PN0 85 86 PM7
DNP R7 R5 SPI
PB3 BSL_P1 PA1 BSL_P1 PN1 87 88 PM6
SDA DNP TX DNP R9
TP15 DNP DNP PA4 BSL_P1 PN2 89 90 PM5
MISO DNP
DNP PN3 91 92 PM4
PB2 R8 BSL_P9 PA0 R6 BSL_P3 PQ4 93 94 TARGET_RESET
DNP SCL DNP RX DNP R10
DNP DNP PA5 BSL_P3 Wake 95 96
MOSI DNP Wake
TP16 DNP 97 98
+5V +3V3
PA2 R11 BSL_P9 C30 J10 C29 GND
D SCL DNP D
DNP 0.1µF 0.1µF
DNP
TP17
PA3 R12 BSL_P10
CS DNP
DNP GND GND
GND Orderable: MSP-EXP432E401Y Designed for: Public Release Mod. Date: 10/12/2017
TID #: N/A Project Title: MSP-EXP432E401Y
Number: MCU023 Rev: 1.1 Sheet Title:
Texas Instruments and/or its licensors do not warra nt the accuracy or completeness of this specificati on or any information contained therein. Texas Inst ruments and/or its licensors do not SVN Rev: Version control disabled Assembly Variant: 001 Sheet: 1 of 6
warrant that this design will meet the specifications, will be suitable for your application or fit for any particular purpose, or will operate in an implementation. Texas Instruments and/or its Drawn By: File: MCU023_MSP432E_GPIO_USB.SchDoc Size: B http://www.ti.com
licensors do not warrant that the design is product ion worthy. You should completely validate and testyour design implementation to confirm the system fu nctionality for your application. Engineer: Mike Pridgen Contact: http://www.ti.com/support ©Texas Instruments 2017
1 2 3 4 5 6
Figure 5. Ethernet LaunchPad Development Kit Schematics (1 of 5)
PCB Schematics www.ti.com
1 2 3 4 5 6
MCU_3V3
Place pull up resistors and C16, C17 near MCU
C17 R24 R23 R22 R21 C16

0.1µF 49.9 49.9 49.9 49.9 0.1µF
GND GND
JP2 +3V3 U1D U10
MCU_3V3 EN0TXO_P 1 16 EPHYTX_P
A EN0TXO_P A
7 VDD
16
VDD
C40 C41 C42 C43 26 17
VDD GND
0.1µF 0.1µF 0.1µF 0.1µF 28 48
VDD GND
39
VDD GND
55 C18 MCU_3V3 U13
47 58 2 15 R32
VDD GND
GND 51
VDD GND
80 75 1 8
52 114 0.1µF
VDD GND
69 VDD
GND
79 10
EPHYTX_N
VDD GNDA
90 U14
VDD
TP12 101 VDD
EN0TXO_N 3 14 1
EN0TXO_N
113 VDD
GND 2
DNP VDDC 122 4 13 2 7 3 9
VDD
4 10
C15 C14 C4 8 5 12 EPHYRX_P3 6 5 11
VDDA
2.2µF 1µF 0.1µF 6 12
87 VDDC
EN0RXI_P 6 11 7
EN0RXI_P
115 VDDC 8
VREF+ DNP
R41 TP13 GND
9 VREFA+ 1-406541-1
0 R39 R38 68 VBAT C22 MCU_3V3 4 5
R43
EPHYRX_N
0 51 7 10
C3 75
0.1µF MSP432E401YTPDTR 0.1µF SLVU2.8-4.TBT R45 R46
GND 2.8V 75 75
B DNP B
TP11 GND
R42 EN0RXI_N 8 9
1.0M EN0RXI_N
C1
HX1198FNLT
1000pF C31 R47

Place C18 and C22 near pin 2 and pin 7 of U10 4700pF 1.0M
3
1
Wake_SW4
GND
VBUS
TARGET_VBUS 1 2
4
DEBUG_VBUS 3 4 PF4 PF0

PF4 PF0
5 6
1
GND JP1 D3 D4
Power Control Jumper: Green Green
MCU_3V3
2
TP10
1) To power from Debug install jumper on pins 5-6
R44 DNP U1C U4 R31 R30
10k Wake 2) To power from Target USB install jumper on pins 3-4 390 390
VBUS +5V
WAKE 64 WAKE HIB 65 DNP 2 IN OUT1 7
TGT_RST 3) To power from BoosterPack 5V install jumper on pins 1-2
TP9 This is also the off position if BoosterPack does n ot
R51 TARGET_RESET 70 59 R25
RST RBIAS supply power
100 4.87k GND Y3 GND GND
C 1 3 R36 DNP 8 TARGET_VBUS C
GND OC1 When powered from BoosterPack TPS2052B does not
EN0RXI_N 53 2 R35 100k TP8 6
3
EN0RXIN OUT2 provide current limit protection For Ethernet example Applications:
C46 C48 10k
0.1µF 12pF C47 32.768 kHz R26 LED4 is default configured as Ethernet Link OK
EN0RXI_P 54 EN0RXIP 3 EN1
RESET_SW1 12pF When powered by BoosterPack, USB host mode does not LED3 is default configured as Ethernet TX/RX activi ty
XOSC0 66 100k supply power to connected devices
5 OC2 User may re-configure these pins / LED's for any
XOSC1 67 GND GND GND 1
application usage
EN0TXO_N 56 EN0TXON
GND 4 EN2 PAD 9
4
EN0TXO_P 57 PQ4 R50 TPS2052BDRBR

EN0TXOP PQ4
88 Y1 JP6 10k GND
OSC0
GND 3 4
R49 G
OSC1 89 1 2 PD6
G PD6
2.0k
25 MHz GND
MSP432E401YTPDTR
C45 C44 TPS2052B provides current limit for main 5V power
12pF 12pF JP7
Also provides power switching for USB host/OTG mode s
J12
3
GND For Host/OTG:
2 +3V3 GND GND
GND PD6 configured as USB0EPEN peripheral function
1 GND
3.3V
PQ4 configure as individual pin interrupt. Indicat es
power fault on the USB bus. USB0PFLT peripheral pi n
not available due to pin mux and use on BoosterPack s
J13
USB Host mode does not supply power to devices
D 3 D
GND when powered from a BoosterPack
2 +5V
GND
1 GND
5.0V For Applications that do not use USB:
Configure PD6 as input with internal pull-down
enabled. Turns of power to TARGET_VBUS
Orderable: MSP-EXP432E401Y Designed for: Public Release Mod. Date: 10/17/2017
warrant that this design will meet the specifications, will be suitable for your application or fit for any particular purpose, or will operate in an implementation. Texas Instruments and/or its Drawn By: File: MCU023_MSP432E_Ethernet_Power.SchDoc Size: B http://www.ti.com
1 2 3 4 5 6
1 2 3 4 5 6
8
7
6
5 R101
GND
0
ID
4 XDS_ID
D+
3 XDS_DP XDS_GND
A A
D-
2 XDS_DM
USB101
1 R102 XDS_VBUS XDS_VBUS R122 VBUS_DETECT

VBUS
0 330k
C148 R124
2.2µF 220k
10
11
9
XDS_GND
IC102 XDS_GND
1 IO1 IO3 4 XDS_DP
XDS_ID 2 IO2 IO4 5 XDS_DM
C102 R132
3300pF 1.00M XDS_VBUS 6 3
VCC GND
TPD4E004DRYR
XDS_GND XDS_GND
IC101
1 IN OUT 3 XDS_VCC
2 IN OUT 4
R133 C147 C149
B 8 5 51k 15pF 2.2µF B
EN FB
NC 7
GND R134 XDS_GND

TPS79601DRBR 30k
6
XDS_GND
XDS_GND
C C
D D

warrant that this design will meet the specifications, will be suitable for your application or fit for any particular purpose, or will operate in an implementation. Texas Instruments and/or its Drawn By: File: MCU023_XDS110_USB_Power.SchDoc Size: B http://www.ti.com
1 2 3 4 5 6
PCB Schematics www.ti.com
1 2 3 4 5 6
A A
GND DEBUG_VBUS +3V3

J101
XDS_VCC 2 1
XDS_VBUS 4 3
XDS_VCC 6 5
R158 XDS_GND XDS_TXD 8 7 RXD
3.3k TARGET_RXD
XDS_RXD 10 9 TXD
TARGET_TXD
XDS_RESET_OUT 12 11
TGT_RST
XDS_TMS_SWDIO 14 13 TMS_SWDIO
TMS_SWDIO
XDS_TCK_SWDCLK 16 15 TCK_SWDCLK
TCK_SWDCLK
XDS_TDO_SWO 18 17 TDO_SWO
TDO_SWO
XDS_TDI 20 19 TDI
TDI
B B
XDS_VCC J102 +3V3 J11

1 2 1 2
3 4 3 4
5 6 5 6
7 8 7 8
9 10 9 10
XDS_GND GND
U108 U8
1 IO1 IO4 5 1 IO1 IO4 5
C 2 6 2 6 C
IO2 IO5 IO2 IO5
3 IO3 IO6 7 3 IO3 IO6 7
8 VCC GND 4 8 VCC GND 4
TPD6E004RSER TPD6E004RSER
GND
XDS_GND
D D

warrant that this design will meet the specifications, will be suitable for your application or fit for any particular purpose, or will operate in an implementation. Texas Instruments and/or its Drawn By: File: MCU023_XDS110_Target_Interface.SchDoc Size: B http://www.ti.com
1 2 3 4 5 6
1 2 3 4 5 6
IC106A
XDS_RXD 33
PA0
XDS_VCC
XDS_TXD 34
PA1 PK0
18 IC106B
XDS_TCK_SWDCLK 35
PA2 PK1
19
A XDS_TMS_SWDIO 36 20 R108 R109 R110 R111 81 A
PA3 PK2 PL0
XDS_TDO_SWO 37 21 1.0k 1.0k 1.0k 1.0k 82
PA4 PK3 PL1
XDS_TDI 38 PA5 PK4 63 83 PL2
XDS_RESET_OUT 40
PA6 PK5
62 84
PL3
41 61 85
R166 PA7 PK6 PL4
XDS_VBUS PK7 60 86 PL5
100 XDS_ID 95
PB0
XDS_DP 94
PL6 PQ0
5
96 PB1 PJ0 116 XDS_DM 93 PL7 PQ1 6
C159 91 117 11
PB2 PJ1 PQ2
0.01µF 92 78 27
PB3 PM0 PQ3
121 PB4 PH0 29 77 PM1 PQ4 102
120 PB5 PH1 30 76 PM2
XDS_GND PH2 31 75 PM3 PP0 118
ITCK 100 PC0/TCK/SWCLK PH3 32 74 PM4 PP1 119
ITMS 99 PC1/TMS/SWDIO 73 PM5 PP2 103
ITDI 98 PC2/TDI PG0 49 72 PM6 PP3 104
J108 ITDO 97 50 71 105
PC3/TDO/SWO PG1 PM7 PP4
XDS_VCC 25 PC4 PP5 106
1 10 24 PC5 PF0 42 107 PN0
2 9 23 PC6 PF1 43 108 PN1
3 8 22 PC7 PF2 44 109 PN2
4 7 PF3 45 110 PN3
5 6 VBUS_DETECT 1 PD0 PF4 46 111 PN4
2 PD1 112 PN5
TC2050-IDC-NL-FP 3 PD2 PE0 15
4 PD3 PE1 14 TM4C129ENCPDTI3R
125 PD4 PE2 13
B XDS_GND XDS_GND 126 PD5 PE3 12 B
127 PD6 PE4 123
R123 R125 128 124
PD7 PE5
470 470
TM4C129ENCPDTI3R
1
LED102 LED101
Red Green
2
IC106D
XDS_VCC
XDS_GND XDS_GND 7 VDD
16
VDD
26 VDD GND 17
C135 C136 C137 C138 C139 C140 28 48
VDD GND
0.01µF 0.01µF 0.01µF 0.1µF 0.1µF 1µF 39 55
VDD GND
XDS_VCC 47 VDD GND 58
IC106C 51 VDD GND 80
52 114
VDD GND
R117 64 65 69
WAKE HIB VDD
10k XDS_GND 79 10
R120 VDD GNDA
70 RST RBIAS 59 90 VDD
100 101 VDD
R121 R128 XDS_VCC 113
DNP VDD
DNP 53 4.87k 122
EN0RXIN VDD
XDS_GND
C 54 C142 C141 8 C
EN0RXIP VDDA
66 1µF 0.01µF
XOSC0
XDS_GND XDS_GND XDS_GND 87
VDDC
XOSC1 67 115 VDDC
56 EN0TXON
XDS_GND
XDS_GND C145 C143 C144 9 VREFA+
57 Q101 2.2µF 0.1µF 1µF
EN0TXOP
OSC0 88 1 2 68 VBAT
G
3 4
G
OSC1 89 XDS_VCC
16 MHz XDS_GND TM4C129ENCPDTI3R
C134
TM4C129ENCPDTI3R C133 12pF R118 XDS_VCC
12pF 1.0k R131
XDS_GND 51
XDS_GND
XDS_GND
C150 C132 IC6A C146
0.01µF 0.1µF 2.5V 0.1µF
XDS_GND
XDS_GND
D D

warrant that this design will meet the specifications, will be suitable for your application or fit for any particular purpose, or will operate in an implementation. Texas Instruments and/or its Drawn By: File: MCU023_XDS110_Debug_Probe.SchDoc Size: B http://www.ti.com
1 2 3 4 5 6
Revision History www.ti.com
Revision History
NOTE: Page numbers for previous revisions may differ from page numbers in the current version.
Changes from July 20, 2018 to September 11, 2018 ...................................................................................................... Page
• Clarified function of JP1 in the first paragraph of Section 2.1.6.4, Other Headers and Jumpers ............................. 17
• Added the last sentence in Section 2.3.2, External Debugger .................................................................... 21
28 Revision History SLAU748B – October 2017 – Revised September 2018

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STANDARD TERMS FOR EVALUATION MODULES
1. Delivery: TI delivers TI evaluation boards, kits, or modules, including any accompanying demonstration software, components, and/or
documentation which may be provided together or separately (collectively, an “EVM” or “EVMs”) to the User (“User”) in accordance
with the terms set forth herein. User's acceptance of the EVM is expressly subject to the following terms.
1.1 EVMs are intended solely for product or software developers for use in a research and development setting to facilitate feasibility
evaluation, experimentation, or scientific analysis of TI semiconductors products. EVMs have no direct function and are not
finished products. EVMs shall not be directly or indirectly assembled as a part or subassembly in any finished product. For
clarification, any software or software tools provided with the EVM (“Software”) shall not be subject to the terms and conditions
set forth herein but rather shall be subject to the applicable terms that accompany such Software
1.2 EVMs are not intended for consumer or household use. EVMs may not be sold, sublicensed, leased, rented, loaned, assigned,
or otherwise distributed for commercial purposes by Users, in whole or in part, or used in any finished product or production
system.
2 Limited Warranty and Related Remedies/Disclaimers:

2.1 These terms do not apply to Software. The warranty, if any, for Software is covered in the applicable Software License
Agreement.
2.2 TI warrants that the TI EVM will conform to TI's published specifications for ninety (90) days after the date TI delivers such EVM
to User. Notwithstanding the foregoing, TI shall not be liable for a nonconforming EVM if (a) the nonconformity was caused by
neglect, misuse or mistreatment by an entity other than TI, including improper installation or testing, or for any EVMs that have
been altered or modified in any way by an entity other than TI, (b) the nonconformity resulted from User's design, specifications
or instructions for such EVMs or improper system design, or (c) User has not paid on time. Testing and other quality control
techniques are used to the extent TI deems necessary. TI does not test all parameters of each EVM.
User's claims against TI under this Section 2 are void if User fails to notify TI of any apparent defects in the EVMs within ten (10)
business days after delivery, or of any hidden defects with ten (10) business days after the defect has been detected.
2.3 TI's sole liability shall be at its option to repair or replace EVMs that fail to conform to the warranty set forth above, or credit
User's account for such EVM. TI's liability under this warranty shall be limited to EVMs that are returned during the warranty
period to the address designated by TI and that are determined by TI not to conform to such warranty. If TI elects to repair or
replace such EVM, TI shall have a reasonable time to repair such EVM or provide replacements. Repaired EVMs shall be
warranted for the remainder of the original warranty period. Replaced EVMs shall be warranted for a new full ninety (90) day
warranty period.
3 Regulatory Notices:
3.1 United States
3.1.1 Notice applicable to EVMs not FCC-Approved:
FCC NOTICE: This kit is designed to allow product developers to evaluate electronic components, circuitry, or software
associated with the kit to determine whether to incorporate such items in a finished product and software developers to write
software applications for use with the end product. This kit is not a finished product and when assembled may not be resold or
otherwise marketed unless all required FCC equipment authorizations are first obtained. Operation is subject to the condition
that this product not cause harmful interference to licensed radio stations and that this product accept harmful interference.
Unless the assembled kit is designed to operate under part 15, part 18 or part 95 of this chapter, the operator of the kit must
operate under the authority of an FCC license holder or must secure an experimental authorization under part 5 of this chapter.
3.1.2 For EVMs annotated as FCC – FEDERAL COMMUNICATIONS COMMISSION Part 15 Compliant:
CAUTION
This device complies with part 15 of the FCC Rules. Operation is subject to the following two conditions: (1) This device may not
cause harmful interference, and (2) this device must accept any interference received, including interference that may cause
undesired operation.
Changes or modifications not expressly approved by the party responsible for compliance could void the user's authority to
operate the equipment.
FCC Interference Statement for Class A EVM devices

NOTE: This equipment has been tested and found to comply with the limits for a Class A digital device, pursuant to part 15 of
the FCC Rules. These limits are designed to provide reasonable protection against harmful interference when the equipment is
operated in a commercial environment. This equipment generates, uses, and can radiate radio frequency energy and, if not
installed and used in accordance with the instruction manual, may cause harmful interference to radio communications.
Operation of this equipment in a residential area is likely to cause harmful interference in which case the user will be required to
correct the interference at his own expense.
FCC Interference Statement for Class B EVM devices
NOTE: This equipment has been tested and found to comply with the limits for a Class B digital device, pursuant to part 15 of
the FCC Rules. These limits are designed to provide reasonable protection against harmful interference in a residential
installation. This equipment generates, uses and can radiate radio frequency energy and, if not installed and used in accordance
with the instructions, may cause harmful interference to radio communications. However, there is no guarantee that interference
will not occur in a particular installation. If this equipment does cause harmful interference to radio or television reception, which
can be determined by turning the equipment off and on, the user is encouraged to try to correct the interference by one or more
of the following measures:
• Reorient or relocate the receiving antenna.
• Increase the separation between the equipment and receiver.
• Connect the equipment into an outlet on a circuit different from that to which the receiver is connected.
• Consult the dealer or an experienced radio/TV technician for help.
3.2 Canada
3.2.1 For EVMs issued with an Industry Canada Certificate of Conformance to RSS-210 or RSS-247
Concerning EVMs Including Radio Transmitters:
This device complies with Industry Canada license-exempt RSSs. Operation is subject to the following two conditions:
(1) this device may not cause interference, and (2) this device must accept any interference, including interference that may
cause undesired operation of the device.
Concernant les EVMs avec appareils radio:

Le présent appareil est conforme aux CNR d'Industrie Canada applicables aux appareils radio exempts de licence. L'exploitation
est autorisée aux deux conditions suivantes: (1) l'appareil ne doit pas produire de brouillage, et (2) l'utilisateur de l'appareil doit
accepter tout brouillage radioélectrique subi, même si le brouillage est susceptible d'en compromettre le fonctionnement.
Concerning EVMs Including Detachable Antennas:

Under Industry Canada regulations, this radio transmitter may only operate using an antenna of a type and maximum (or lesser)
gain approved for the transmitter by Industry Canada. To reduce potential radio interference to other users, the antenna type
and its gain should be so chosen that the equivalent isotropically radiated power (e.i.r.p.) is not more than that necessary for
successful communication. This radio transmitter has been approved by Industry Canada to operate with the antenna types
listed in the user guide with the maximum permissible gain and required antenna impedance for each antenna type indicated.
Antenna types not included in this list, having a gain greater than the maximum gain indicated for that type, are strictly prohibited
for use with this device.
Concernant les EVMs avec antennes détachables

Conformément à la réglementation d'Industrie Canada, le présent émetteur radio peut fonctionner avec une antenne d'un type et
d'un gain maximal (ou inférieur) approuvé pour l'émetteur par Industrie Canada. Dans le but de réduire les risques de brouillage
radioélectrique à l'intention des autres utilisateurs, il faut choisir le type d'antenne et son gain de sorte que la puissance isotrope
rayonnée équivalente (p.i.r.e.) ne dépasse pas l'intensité nécessaire à l'établissement d'une communication satisfaisante. Le
présent émetteur radio a été approuvé par Industrie Canada pour fonctionner avec les types d'antenne énumérés dans le
manuel d’usage et ayant un gain admissible maximal et l'impédance requise pour chaque type d'antenne. Les types d'antenne
non inclus dans cette liste, ou dont le gain est supérieur au gain maximal indiqué, sont strictement interdits pour l'exploitation de
l'émetteur
3.3 Japan
3.3.1 Notice for EVMs delivered in Japan: Please see http://www.tij.co.jp/lsds/ti_ja/general/eStore/notice_01.page 日本国内に
輸入される評価用キット、ボードについては、次のところをご覧ください。
http://www.tij.co.jp/lsds/ti_ja/general/eStore/notice_01.page
3.3.2 Notice for Users of EVMs Considered “Radio Frequency Products” in Japan: EVMs entering Japan may not be certified
by TI as conforming to Technical Regulations of Radio Law of Japan.
If User uses EVMs in Japan, not certified to Technical Regulations of Radio Law of Japan, User is required to follow the
instructions set forth by Radio Law of Japan, which includes, but is not limited to, the instructions below with respect to EVMs
(which for the avoidance of doubt are stated strictly for convenience and should be verified by User):
1. Use EVMs in a shielded room or any other test facility as defined in the notification #173 issued by Ministry of Internal
Affairs and Communications on March 28, 2006, based on Sub-section 1.1 of Article 6 of the Ministry’s Rule for
Enforcement of Radio Law of Japan,
2. Use EVMs only after User obtains the license of Test Radio Station as provided in Radio Law of Japan with respect to
EVMs, or
3. Use of EVMs only after User obtains the Technical Regulations Conformity Certification as provided in Radio Law of Japan
with respect to EVMs. Also, do not transfer EVMs, unless User gives the same notice above to the transferee. Please note
that if User does not follow the instructions above, User will be subject to penalties of Radio Law of Japan.
【無線電波を送信する製品の開発キットをお使いになる際の注意事項】開発キットの中には技術基準適合証明を受けて
いないものがあります。技術適合証明を受けていないもののご使用に際しては、電波法遵守のため、以下のいずれかの
措置を取っていただく必要がありますのでご注意ください。
1. 電波法施行規則第6条第1項第1号に基づく平成18年3月28日総務省告示第173号で定められた電波暗室等の試験設備でご使用
いただく。
2. 実験局の免許を取得後ご使用いただく。
3. 技術基準適合証明を取得後ご使用いただく。
なお、本製品は、上記の「ご使用にあたっての注意」を譲渡先、移転先に通知しない限り、譲渡、移転できないものとします。
上記を遵守頂けない場合は、電波法の罰則が適用される可能性があることをご留意ください。日本テキサス・イ
ンスツルメンツ株式会社
東京都新宿区西新宿６丁目２４番１号
西新宿三井ビル
3.3.3 Notice for EVMs for Power Line Communication: Please see http://www.tij.co.jp/lsds/ti_ja/general/eStore/notice_02.page
電力線搬送波通信についての開発キットをお使いになる際の注意事項については、次のところをご覧ください。http:/
/www.tij.co.jp/lsds/ti_ja/general/eStore/notice_02.page
3.4 European Union

3.4.1 For EVMs subject to EU Directive 2014/30/EU (Electromagnetic Compatibility Directive):
This is a class A product intended for use in environments other than domestic environments that are connected to a
low-voltage power-supply network that supplies buildings used for domestic purposes. In a domestic environment this
product may cause radio interference in which case the user may be required to take adequate measures.
4 EVM Use Restrictions and Warnings:

4.1 EVMS ARE NOT FOR USE IN FUNCTIONAL SAFETY AND/OR SAFETY CRITICAL EVALUATIONS, INCLUDING BUT NOT
LIMITED TO EVALUATIONS OF LIFE SUPPORT APPLICATIONS.
4.2 User must read and apply the user guide and other available documentation provided by TI regarding the EVM prior to handling
or using the EVM, including without limitation any warning or restriction notices. The notices contain important safety information
related to, for example, temperatures and voltages.
4.3 Safety-Related Warnings and Restrictions:
4.3.1 User shall operate the EVM within TI’s recommended specifications and environmental considerations stated in the user
guide, other available documentation provided by TI, and any other applicable requirements and employ reasonable and
customary safeguards. Exceeding the specified performance ratings and specifications (including but not limited to input
and output voltage, current, power, and environmental ranges) for the EVM may cause personal injury or death, or
property damage. If there are questions concerning performance ratings and specifications, User should contact a TI
field representative prior to connecting interface electronics including input power and intended loads. Any loads applied
outside of the specified output range may also result in unintended and/or inaccurate operation and/or possible
permanent damage to the EVM and/or interface electronics. Please consult the EVM user guide prior to connecting any
load to the EVM output. If there is uncertainty as to the load specification, please contact a TI field representative.
During normal operation, even with the inputs and outputs kept within the specified allowable ranges, some circuit
components may have elevated case temperatures. These components include but are not limited to linear regulators,
switching transistors, pass transistors, current sense resistors, and heat sinks, which can be identified using the
information in the associated documentation. When working with the EVM, please be aware that the EVM may become
very warm.
4.3.2 EVMs are intended solely for use by technically qualified, professional electronics experts who are familiar with the
dangers and application risks associated with handling electrical mechanical components, systems, and subsystems.
User assumes all responsibility and liability for proper and safe handling and use of the EVM by User or its employees,
affiliates, contractors or designees. User assumes all responsibility and liability to ensure that any interfaces (electronic
and/or mechanical) between the EVM and any human body are designed with suitable isolation and means to safely
limit accessible leakage currents to minimize the risk of electrical shock hazard. User assumes all responsibility and
liability for any improper or unsafe handling or use of the EVM by User or its employees, affiliates, contractors or
designees.
4.4 User assumes all responsibility and liability to determine whether the EVM is subject to any applicable international, federal,
state, or local laws and regulations related to User’s handling and use of the EVM and, if applicable, User assumes all
responsibility and liability for compliance in all respects with such laws and regulations. User assumes all responsibility and
liability for proper disposal and recycling of the EVM consistent with all applicable international, federal, state, and local
requirements.
5. Accuracy of Information: To the extent TI provides information on the availability and function of EVMs, TI attempts to be as accurate
as possible. However, TI does not warrant the accuracy of EVM descriptions, EVM availability or other information on its websites as
accurate, complete, reliable, current, or error-free.
6. Disclaimers:
6.1 EXCEPT AS SET FORTH ABOVE, EVMS AND ANY MATERIALS PROVIDED WITH THE EVM (INCLUDING, BUT NOT
LIMITED TO, REFERENCE DESIGNS AND THE DESIGN OF THE EVM ITSELF) ARE PROVIDED "AS IS" AND "WITH ALL
FAULTS." TI DISCLAIMS ALL OTHER WARRANTIES, EXPRESS OR IMPLIED, REGARDING SUCH ITEMS, INCLUDING BUT
NOT LIMITED TO ANY EPIDEMIC FAILURE WARRANTY OR IMPLIED WARRANTIES OF MERCHANTABILITY OR FITNESS
FOR A PARTICULAR PURPOSE OR NON-INFRINGEMENT OF ANY THIRD PARTY PATENTS, COPYRIGHTS, TRADE
SECRETS OR OTHER INTELLECTUAL PROPERTY RIGHTS.
6.2 EXCEPT FOR THE LIMITED RIGHT TO USE THE EVM SET FORTH HEREIN, NOTHING IN THESE TERMS SHALL BE
CONSTRUED AS GRANTING OR CONFERRING ANY RIGHTS BY LICENSE, PATENT, OR ANY OTHER INDUSTRIAL OR
INTELLECTUAL PROPERTY RIGHT OF TI, ITS SUPPLIERS/LICENSORS OR ANY OTHER THIRD PARTY, TO USE THE
EVM IN ANY FINISHED END-USER OR READY-TO-USE FINAL PRODUCT, OR FOR ANY INVENTION, DISCOVERY OR
IMPROVEMENT, REGARDLESS OF WHEN MADE, CONCEIVED OR ACQUIRED.
7. USER'S INDEMNITY OBLIGATIONS AND REPRESENTATIONS. USER WILL DEFEND, INDEMNIFY AND HOLD TI, ITS
LICENSORS AND THEIR REPRESENTATIVES HARMLESS FROM AND AGAINST ANY AND ALL CLAIMS, DAMAGES, LOSSES,
EXPENSES, COSTS AND LIABILITIES (COLLECTIVELY, "CLAIMS") ARISING OUT OF OR IN CONNECTION WITH ANY
HANDLING OR USE OF THE EVM THAT IS NOT IN ACCORDANCE WITH THESE TERMS. THIS OBLIGATION SHALL APPLY
WHETHER CLAIMS ARISE UNDER STATUTE, REGULATION, OR THE LAW OF TORT, CONTRACT OR ANY OTHER LEGAL
THEORY, AND EVEN IF THE EVM FAILS TO PERFORM AS DESCRIBED OR EXPECTED.
8. Limitations on Damages and Liability:

8.1 General Limitations. IN NO EVENT SHALL TI BE LIABLE FOR ANY SPECIAL, COLLATERAL, INDIRECT, PUNITIVE,
INCIDENTAL, CONSEQUENTIAL, OR EXEMPLARY DAMAGES IN CONNECTION WITH OR ARISING OUT OF THESE
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User's Guide

SLAU748B – October 2017 – Revised September 2018

SimpleLink™ Ethernet MSP432E401Y Microcontroller

The SimpleLink™ Ethernet MSP432E401Y Microcontroller LaunchPad™ Development Kit is a low-cost

Figure 1. SimpleLink Ethernet MSP432E401Y LaunchPad Development Kit

1.1 Kit Contents

1.2 Using the Ethernet LaunchPad Development Kit

1.4 BoosterPack Plug-in Modules

Table 1. MSP-EXP432E401Y Specifications

Figure 2. SimpleLink Ethernet LaunchPad Development Kit Block Diagram

2.1 Functional Description

2.1.2 Ethernet Connectivity

2.1.2.1 RJ-45 Connections

2.1.3 USB Connectivity

2.1.4 Motion Control

2.1.5 User Switches and LEDs

2.1.6 BoosterPack Plug-in Modules and Headers

2.1.6.1 BoosterPack Plug-in Module Interface 1

Table 2. BoosterPack Plug-in Module Interface 1 GPIO and Signal Muxing

2.1.6.2 BoosterPack Plug-in Module Interface 2

Table 3. BoosterPack 2 GPIO and Signal Muxing

Table 3. BoosterPack 2 GPIO and Signal Muxing (continued)

2.1.6.3 Breadboard Connection

2.1.6.4 Other Headers and Jumpers

Figure 3. Default Jumper Locations

2.1.7 Serial Bootloader

Figure 4. BSL Header and Resistors

Table 6. Resistors for Serial Bootloader Protocols

2.2 Power Management

2.2.1 Power Supplies

2.2.2 Low Power Modes

2.3 Debug Interface

2.3.1 XDS-110 Debug Interface

2.3.2 External Debugger

2.3.3 Virtual COM Port

3.1 Software Description

3.2 Source Code

3.3 Tool Options

3.4 Programming the Ethernet LaunchPad Development Kit

PD7 128 PD7 PE5 124 PE5 2 PJ1 4 3

PL2 83 TARGET_TXD 1 2 PA1 PH3 15 16 PE1

Figure 5. Ethernet LaunchPad Development Kit Schematics (1 of 5)

C17 R24 R23 R22 R21 C16

1000pF C31 R47

DEBUG_VBUS 3 4 PF4 PF0

EN0TXO_P 57 PQ4 R50 TPS2052BDRBR

Figure 6. Ethernet LaunchPad Development Kit Schematics (2 of 5)

1 R102 XDS_VBUS XDS_VBUS R122 VBUS_DETECT

GND R134 XDS_GND

Orderable: MSP-EXP432E401Y Designed for: Public Release Mod. Date: 10/12/2017

Figure 7. Ethernet LaunchPad Development Kit Schematics (3 of 5)

GND DEBUG_VBUS +3V3

XDS_VCC J102 +3V3 J11

8 VCC GND 4 8 VCC GND 4

Orderable: MSP-EXP432E401Y Designed for: Public Release Mod. Date: 10/12/2017

Figure 8. Ethernet LaunchPad Development Kit Schematics (4 of 5)

Orderable: MSP-EXP432E401Y Designed for: Public Release Mod. Date: 10/17/2017

Figure 9. Ethernet LaunchPad Development Kit Schematics (5 of 5)

28 Revision History SLAU748B – October 2017 – Revised September 2018