S32SDK For S32K1xx RTM 4.0.0 ReleaseNotes

S32 SDK Release Notes
Version 4.0.0 RTM
© 2020 NXP Semiconductors B.V.

Contents
1. DESCRIPTION .......................................................................................................................................3
2. NEW IN THIS RELEASE .......................................................................................................................4
2.1 New features from S32K1xx RTM 3.0.3 and S32K14xW EAR 0.8.0. .............................................4
2.2 List of fixed issues from S32K1xx RTM 3.0.3 and S32K14xW EAR 0.8.0. .....................................4
3. SOFTWARE CONTENTS ......................................................................................................................5
3.1 Drivers..............................................................................................................................................5
3.2 PAL ..................................................................................................................................................5
3.3 Middleware ......................................................................................................................................6
3.4 Libraries ...........................................................................................................................................6
3.5 RTOS ...............................................................................................................................................6
4. DOCUMENTATION ...............................................................................................................................7
5. EXAMPLES ............................................................................................................................................8
6. SUPPORTED HARDWARE AND COMPATIBLE SOFTWARE ........................................................ 13
6.1 CPUs............................................................................................................................................. 13
6.2 Boards........................................................................................................................................... 13
6.3 Compiler and IDE versions ........................................................................................................... 14
7. KNOWN ISSUES AND LIMITATIONS ............................................................................................... 14
7.1 Standalone installation.................................................................................................................. 14
7.2 Hardware support ......................................................................................................................... 14
7.3 Drivers ........................................................................................................................................... 14
7.4 Examples ...................................................................................................................................... 16
8. COMPILER OPTIONS ........................................................................................................................ 17
8.1 IAR Compiler/Linker/Assembler Options ...................................................................................... 17
8.2 GCC Compiler/Linker/Assembler Options .................................................................................... 18
8.3 GHS Compiler/Linker/Assembler Options .................................................................................... 19
8.4 DIAB Compiler/Linker/Assembler Options.................................................................................... 20
8.5 ARMC Compiler/Linker/Assembler Options ................................................................................. 21
9. ACRONYMS ....................................................................................................................................... 24
10. VERSION TRACKING ........................................................................................................................ 25
© 2020 NXP Semiconductors B.V. 2

1. Description
The S32 Software Development Kit (S32 SDK) is an extensive suite of peripheral abstraction
layers, peripheral drivers, RTOS, stacks and middleware designed to simplify and accelerate
application development on NXP S32K microcontrollers.
All software included in this release have RTM quality level in terms of features, testing and
quality documentation, according to NXP software release criteria. RTM releases contain all
planned features implemented and tested. RTM releases are candidates that can be used in
production.
This SDK can be used standalone or it can be used with S32 Design Studio IDE (see
Supported hardware and compatible software).
Refer to Product license (License.txt) for licensing information and Software content register
(SW-Content-Register-S32-SDK.txt) for the Software contents of this product. The files can
be found in the root of the installation directory.
This release is delivered with support for S32 Configuration Tool. Migration from projects
created for S32K1xx with RTM 3.0.x to the S32K1xx with RTM 4.0.0 is supported in S32
Design Studio 3.3.
For support and issue reporting use the following ways of contact:
 NXP Support to https://www.nxp.com/support/support:SUPPORTHOME
 NXP Community https://community.nxp.com/community/s32/s32k

2. New in this release
2.1 New features from S32K1xx RTM 3.0.3 and S32K14xW EAR 0.8.0.
General
 This release is delivered with support for S32 Configuration Tool (S32CT) instead of
Processor Expert Configurator (PEx).
Examples
 Split flexio_i2s example into flexio_i2s_master and flexio_i2s_slave example.
 Split i2s_pal example into i2s_pal_master and i2s_pal_slave example.
LinStack
 Support interleave mode for versions: LIN 2.0, LIN 2.1, LIN 2.2 and J2602.
Timing_PAL
 Improved TIMING_Lpit_IrqHandler and TIMING_Lptmr_IrqHandler. Checking
channel’s type will be executed before jumping to callback function.
AMMCLib
 Integrated AMMCLib RTM 1.1.20.
SCST
 Integrated version 1.0.5 for S32K14x.
 Integrated version 1.0.1 for S32K11x.
Flash
 Added functions to get the error bit status (CDFDIF, EDFDIF, PDFDIF) on
S32K14xW.
2.2 List of fixed issues from S32K1xx RTM 3.0.3 and S32K14xW EAR 0.8.0.
Component Issue
FlexIO_I2S FlexIO_I2S slave read wrong data in some cases when its bit clock and
word select edges were not synchronized.
FlexCan No warning was displayed in the FlexCAN configuration component when
the values for Pretended Networking feature exceed the maximum values
("Needed Matches" should not exceed 255, range of ID values for ID
filtering should be 0 - 0x1FFFFFFF).
FlexCan Fixed issue of Sporius ISR Trigger or Message Buffer (MB) Status
desynchronization avoiding trapping in ISR loop.
ENET ENET driver was replaced the macro FEATURE_ENET_WAKEUP_IRQS
to FEATURE_ENET_WAKE_IRQS.
SAI Fixed the issue that data received after aborting transfer maybe corrupted
because of residue data remaining in fifo.
LinStack Configuration tool showed error when “Time out units (us)” value is not
divisible by "Idle timeout (s)".
Clock_manager SPLL could be enabled even if xosc was configured with low frequency
range.
SBC All sbc_uja116x components showed baud rate settings from the first lpspi
component. Currently, each sbc_uja116x component has the baud rate
configured in the lpspi component that is using.

3. Software Contents
3.1 Drivers
 ADC
 CMP
 CRC
 CSEc
 DMA
 EIM
 ENET
 ERM
 EWM
 FLASH
 FLASH_MX25L6433F
 FLEXCAN
 FLEXIO (I2C, SPI, I2S, UART profiles)
 FTM
 LIN
 LPI2C
 LPIT
 LPSPI
 LPTMR
 LPUART
 MCU (Clock Manager, Interrupt Manager, Power Manager)
 MPU
 PINS
 PDB
 PHY_TJA110x
 QSPI
 RTC
 SAI
 TRGMUX
 WDOG
3.2 PAL
 ADC
 CAN
 I2C
 I2S
 IC
 MPU
 OC
 PWM
 SECURITY

 SPI
 TIMING
 UART
 WDG
3.3 Middleware
 LIN stack – provides support for LIN 2.0, LIN 2.1, LIN 2.2 and J2602 communication
protocols
 Support interleave mode for versions: LIN 2.0, LIN 2.1, LIN 2.2 and J2602
 TCP/IP stack – available for S32K148, for more details see TCP/IP stack release
notes (in the SDK installation folder)
 SBC drivers – provides support for UJA116x System Basis Chips
Note: For ISELED and NFC contact your Sales representative or FAE for more information.
3.4 Libraries
 sCST RTM 1.0.1 – available for S32K11x

 sCST RTM 1.0.5 – available for S32K14x
 AMMCLib RTM 1.1.20 – available for S32K1xx
3.5 RTOS
 FreeRTOS version 10.2.1

4. Documentation
 Quick start guide available in “doc” folder.

 User and integration manual available at “doc\Start_here.html”.
 Driver user manuals available in “doc” folder.

5. Examples
Type Name Description

adc_hwtrigger Uses PDB to trigger an ADC conversion with a
configured delay and sends the result to host via
LPUART.
adc_pal The application uses ADC PAL to trigger multiple
executions of two groups of ADC conversions: first
group configured for SW triggering and second group
for HW triggering. For each execution of a group of
conversions, an average conversion value is
computed in SW, and the average value is printed on
UART.
adc_swtrigger Uses software trigger to periodically trigger an ADC
conversion and sends the result to host via LPUART.
can_pal Shows the usage of the CAN PAL module with
Flexible Data Rate
cmp_dac Configures the analog comparator to compare the
input from the potentiometer with the internal DAC
(configured to output half of the reference voltage) and
shows the result using the LEDs found on the board.
crc_checksum The CRC is configured to generate the cyclic
Driver examples
redundancy check value using 16 and 32 bits wide

result.
csec_keyconfig The example demonstrates how to prepare the MCU
before using CSEc(Key configuration, flash
partitioning).
edma_transfer Demonstrates the following eDMA use cases: single
block memory to memory transfer, a loop memory to
memory transfer, memory to memory transfer using
scatter/gather, LPUART transmission/reception using
DMA requests.
eim_injection The purpose of this demo is to provide the user check
able correction of ECC.
Module EIM enable user addition error to RAM (low).
And enable user can use module ERM to read
address that user already error to region RAM. User
seen RED_LED off when ERM read right address
which EIM injected error.
enet_ping Shows the usage of a basic ping application using the
ENET driver
erm_report The purpose of this driver application is to show the
user how to use the EWM from the S32K148 using the
S32 SDK API.
This Example only debug equal Flash
This example use module EIM to addition error to
RAM and use module ERM to read address and notify
interrupt.

ewm_interrupt Shows the usage of the EWM driver.
flash_partitioning Writes, verifies and erases data on Flash.
flexio_i2c Demonstrates FlexIO I2C emulation. Use one instance

of FlexIO and one instance of LPI2C to transfer data
on the same board.
flexio_i2s_master Demonstrates FlexIO I2S emulation for master
configurations. Use one instance of FlexIO to
instantiate master drivers to transfer data on the same
board.
flexio_i2s_slave Demonstrates FlexIO I2S emulation for slave
configurations. Use one instance of FlexIO to
instantiate slave drivers to transfer data on the same
board.
flexio_spi Demonstrates FlexIO SPI emulation for both master
and slave configurations. Use one instance of FlexIO
to instantiate master and slave drivers to transfer data
on the same board.
flexio_uart Demonstrates FlexIO UART emulation for both TX
and RX configurations. Use one instance of FlexIO to
instantiate UART transmitter and receiver drivers to
transfer data from/to the host.
ftm_combined_pwm Uses FTM PWM functionality using two combined
channels to light two LEDs on the board with opposite
pulse width. The light's intensity is increased and
decreased periodically.
ftm_periodic_interrupt Uses FTM Timer functionality to trigger an interrupt at
a given period which toggles a LED.
ftm_pwm Uses FTM PWM functionality using a single channel to
light a LED on the board. The light's intensity is
increased and decreased periodically.
ftm_signal_measurement Using one FTM instance the example application
generates a PWM signal with variable frequency
which is measured by another FTM instance
configured in signal measurement mode.
i2c_pal Shows the usage of I2C PAL driver in both master and
slave configurations using FLEXIO and LPI2C
ic_pal Shows the usage of the IC_PAL

i2s_pal_master Demonstrates I2S_PAL emulation for master
configurations. Use one instance of FlexIO or SAI to
instantiate master drivers to transfer data on the same
board.
i2s_pal_slave Demonstrates I2S_PAL emulation for slave
configurations. Use one instance of FlexIO or SAI to
instantiate slave drivers to transfer data on the same
board.
lin_slave_baremetal Shows the usage of LIN driver in slave mode.

lpi2c_master Shows the usage of the LPI2C driver in Master
configuration
lpi2c_slave Shows the usage of the LPI2C driver in Slave
configuration
lpit_periodic_interrupt Shows how to initialize the LPIT to generate an

interrupt every 1 s. It is the starting point for any
application using LPIT.
lpspi_dma The application uses two on board instances of
LPSPI, one in master configuration and the other one
is slave to communicate data via the SPI bus using
DMA.
lpspi_transfer Uses one instance of the LPSPI as slave to send ADC
data to the master LPSPI instance which is on the
same board. The master uses data received to feed a
FlexTimer PWM.
lptmr_periodic_interrupt Exemplifies to the user how to initialize the LPTIMER
so that it will generate an interrupt every 1 second. To
make the interrupt visible a LED is toggled every time
it occurs.
lptmr_pulse_counter Shows the LPTIMER pulse count functionality by
generating an interrupt every 4 rising edges.
lpuart_echo Simple example of a basic echo using LPUART.
mpu_memory_protection Configures MPU to protect a memory area and
demonstrates that read access is correctly restricted.
mpu_pal_memory_protection The purpose of this demo application is to show you
how to configure and use the Memory Protection Unit
PAL
oc_pal Shows the Periodic Event Generation functionality of
the OC_PAL
pdb_periodic_interrupt Configures the Programmable Delay Block to
generate an interrupt every 1 second. This example
shows the user how to configure the PDB timer for
interrupt generation. The PDB is configured to trigger
ADC conversions in ADC_HwTrigger_Example.
Shows the usage of the PHY module with
phy_autoneg
autonegociation
power_mode_switch Demonstrates the usage of Power Manager by
allowing the user to switch to all power modes
available.
qspi_external_flash The purpose of this demo is to present the usage of
the flash_mx25l6433f (external serial flash) and QSPI
drivers. The flash_mx25l6433f driver allows the
application to use an external Macronix MX25L6433F
serial flash device, using the QuadSPI interface for
communication.
rtc_alarm Show the frequently used RTC use cases such as the
generation of an interrupt every second and triggering
an alarm.
sai_transfer Demonstrates the usage of the SAI module driver

sbc_uja1169 Show the usage of the SBC UJA1169 driver with low
power modes
security_pal This is an application created to show the generation
of rnd and CBC encryption/decryption of a string.
spi_pal The purpose of this application is to show you how to

use the LPSPI and FLEXIO Interfaces on the
S32K144 using the S32 SDK API.
The application uses one board instance of LPSPI in
slave configuration and one board instance of FLEXIO
in master configuration to communicate data via the
SPI bus using interrupts.
timing_pal The purpose of this application is to show you how to
use the TIMING PAL over LPIT, LPTMR and FTM
timers on the S32K144 using the S32 SDK API.
The application uses one board instance of LPIT,
LPTMR and FTM to periodically toggle 3 leds.
trgmux_lpit The purpose of this demo application is to show you
how to use the Trigger MUX Control of the S32K14x
MCU with this SDK.
uart_pal_echo The purpose of this demo is to show the user how
UART PAL works over FLEXIO_UART or LPUART
peripherals.
The user can choose whether to use FLEXIO_UART
or LPUART.
The board sends a welcome message to the console
with further instructions.
wdg_pal_interrupt The purpose of this driver application is to show the
user how to use the WDG PAL from the S32K148
using the S32 SDK API.
The examples use the SysTick timer from the ARM
core to refresh the WDG PAL counter for 30 times.
After this the WDG PAL counter will expire and the
CPU will be reset.
wdog_interrupt Shows the basic usage scenario and configuration for
the Watchdog.
adc_low_power This demo shows the user how to reduce CPU
overhead and power usage by triggering ADC
conversions with the LPIT via TRGMUX. The CPU is
set in the STOP mode via the Power Manager API,
Demos
with the wakeup condition being the validity of the

ADC conversion result, the latter being a value greater
than half of the ADC reference voltage achieved by
using the hardware compare functionality. If the
condition is met, the value in the form of a graph is
sent using LPUART and DMA to further reduce the
CPU usage.

Anfc Shows the integration between Automotive NFC stack
and S32SDK
flexcan_encrypted Uses two boards to demonstrate FlexCAN
functionality with Flexible Data Rate on. LEDs on a
board are toggled depending on the buttons actioned
on the other board. Also demonstrates the use of SBC
driver to configure the CAN transceiver from EVB
board. The application is configured to use CSEc to
encrypt the data on security enabled parts.
Freemaster This demo uses the FreeMASTER Run-Time
Debugging Tool to visualize ADC
conversions and allows the user to monitor the ADC
sampling rate for
different ADC configurations (ADC sampling time and
resolution can be
controlled through FreeMASTER Variable Watch).
The application uses FreeMASTER SCI driver for
communication.
Freertos This demo application demonstrates the usage of the
SDK with the included FreeRTOS. Uses a software
timer to trigger a led and waits for a button interrupt to
occur.
hello_world This is a simple application created to show the basic
configuration with S32DS
hello_world_iar This is a simple application created to show the basic
configuration with IAR Embedded Workbench
hello_world_mkf This is a simple application created to show the basic
configuration with makefile for the supported compilers
lin_master This demo application shows the usage of LIN stack in
master mode.
lin_slave This demo application shows the usage of LIN stack in
slave mode.
Lwip Shows the usage of lwIP stack.
sCST Demo application created to demonstrate sCST
integration with S32 SDK

6. Supported hardware and compatible software
6.1 CPUs
 S32K116_32 revision 1.0, maskset 0N96V
 S32K144_48 revision 2.1, maskset 0N57U
 S32K144_64 revision 2.1, maskset 0N57U
 S32K144_100_LQFP revision 2.1, maskset 0N57U
 S32K144_100_BGA revision 2.1, maskset 0N57U
 S32K146_100_LQFP revision 1.0, maskset 0N73V
 S32K146_100_BGA revision 1.0, maskset 0N73V
 S32K148_100_LQFP revision 1.0, maskset 0N20V
 S32K148_100_BGA revision 1.0, maskset 0N20V
 S32K144W_64 revision 1.0, maskset 0P64A
The following processor reference manual has been used to add support:
 S32K1XXRM Rev. 12.1, 02/2020
The following errata documents were taken into consideration:

 S32K142 0N33V errata: S32K142_0N33V_Rev06Mar2019
 S32K144 0N57 errata: S32K144_0N57_Rev06Mar2019
 S32K116 0N96V errata: S32K116_0N96V_Rev07Jan2019
 S32K118 0N97V errata: S32K118_0N97V_Rev07Jan2019
 S32K144W 0P64A errata: S32K144W_0P64A Rev 14 Feb 2020
6.2 Boards
 S32K-MB with mini module S32K144-100LQFP REV X1/X2
 S32K-MB with mini module S32K14xCVD-Q144 REV X2/X3
 S32K-MB with mini module S32K14xCVD-Q100 REV A
 S32K-MB with mini module S32K1xxCVD-Q048 REV X1
 S32K-MB with mini module S32K1xxCVD-Q064 REV X2

 S32K144-EVB-Q100 REV X3
 S32K14W-EVB-Q064 REV X1
6.3 Compiler and IDE versions

 GreenHills compiler v. 2017.1.4
 IAR compiler v. 8.11.2
 GCC compiler for ARM v. 6.3.1 20170509
 Wind River Diab Compiler v5.9.6.2
 ARM Compiler 6.6.1 Long Term Maintenance
 S32 Design Studio 3.3 IDE
7. Known issues and limitations

7.1 Standalone installation
 The installer will automatically append the new SDK path to the S32SDK_PATH
variable. Please make sure that only the desired value is kept, if the variable is used
by previous projects.
 Custom installation type is not fully supported, keep “All Packages” selection in
Choose Components page.
 Code generated by S32 Configuration Tool may contain MISRA violations.
7.2 Hardware support

 Support for S32K14xW was validated on S32K144W with 0P64A maskset
7.3 Drivers
ALL DRIVERS
 Drivers may not respect the requirements for nesting level and cyclomatic complexity
due to an issue in tools.
 The generated configuration name for some modules might be changed after
switching pins variant if using custom name. In order to avoid this, Click to
Peripherals/Refresh to update configuration name before clicking to Update Code
button.
CPU
 When using DIAB toolchain on S32K11x and the interrupt handlers are overwritten
with INT_SYS_InstallHandler, the core will not return from interrupt handlers that are
not calling other functions or writing a global variable. Workaround: Make sure that all
interrupt handlers are performing at least one function call or are writing a global
variable.
 ALIGNED macro is not supported for aligning function when using IAR Compiler.
CLOCK

 CLOCK_SYS_GetFreq function returns obsolete core clock frequency right after
VLPR to HSRUN power mode transition because SCS bit field from SCG_CSR
register is not immediately updated (workaround: function to be called twice, second
call returns correct value).
 The default clock configuration always sets the SPLLDIVx_CLK, SIRCDIVx_CLK,
FIRCDIVx_CLK, SOSCDIVx_CLK divider by 1 in RUN mode. This does not follow the
recommendation in table 27-1 Clock description, RM rev 12.1 because the clock
migration from projects created for S32K1xx with RTM 3.0.x to the S32K1xx with RTM
4.0.0 may have error. User can configure divider in each power mode if needed.
EDMA
 When using Single-block transfer or Multi-block transfer, NBYTES (Number of bytes
to be transferred in each service request of the channel) shall be always configurable
on 30 bits instead of 32 bits.
EIM
 An attempt to invert more than 2 bits in check bit mask or data mask might result in
undefined behavior. To avoid this situation, you should invert a maximum of two bits.
ENET
 The wakeup interrupt is not enabled
FlexIO, SAI
 FlexIO drivers and the SAI driver cannot be simultaneously used in DMA mode due
to overlapping DMA requests.
FlexIO_I2C
 No STOP condition is generated when aborting a transfer due to NACK reception.
 No clock stretching when the application does not provide data fast enough, so Tx
underflows and Rx overflows are possible.
 The driver does not support multi-master mode. It does not detect arbitration loss
condition.
 Due to device limitations, it is not always possible to tell the difference between NACK
reception and receiver overflow.
 FlexIO_I2C may not create the N-ACK after receiving last data byte. This case only
occurs when another interrupt takes over flexIO_I2C interrupt.
Note: FLEXIO I2C issues described above are caused by Hardware limitations.
FlexIO_SPI
 The driver does not support back-to-back transmission mode for CPHA = 1
FTM
 Module can be used only in one mode (e.g. only PWM, OC). For example, this
configuration is not possible: 4 channels of FTM0 run in PWM and 4 channels of FTM0
run in input capture.
 Complementary channel is not enabled in all configurations for independent channels.
The workaround is to use complementary channel only for combined channels.
LPSPI
 When a SPI transfer in slave mode over DMA is initialized with an invalid address for
the TX buffer, the driver can never finish the transfer
I2C_PAL, LPI2C

 When (LPI2C|I2C)_MasterAbortTransfer is called after a transfer operation was
started and the address was not sent, the bus may hang. Workaround is to avoid
calling the function shortly after a transfer was initiated.
LPI2C
 LPI2C_DRV_MasterAbortTransferData function can’t abort a master receive transfer
because the module sees the whole receive as a single operation and will not stop it
even if the FIFO is reset.
 Minimum allowed value for HIGH period of the SCL is sometimes violated in standard
mode.
RTC
 When using LPO clock as input, the user may need to use LPO trimming to obtain the
32kHz frequency needed by RTC module.
SBC
 All SBC components share the same SPI configuration. For each SBC component the
SPI controller and configuration index shall be manually selected.
Timing_PAL
 For TIMING_PAL over FTM, the TIMING_GetElapsed and TIMING_GetRemaining
functions return invalid value if the FTM interrupt occurs between 'Get current counter
value' and 'Get channel start value' within these functions.
 The TIMING_GetElapsed and TIMING_GetRemaining do not detect elapsed or
remaining time if the period is expired in case timer channel type is one-shot.
MPU
 On S32K14xx, if there is a PFlash access protection error caused by CM4, both slave
port 0 & slave port 2 will report the same error.
SAI
 Tx Data fifo is not cleared in some case after user calls SAI_DRV_AbortSending
function because of residue data remaining in fifo.
7.4 Examples
 Running the FLASH driver example from the flash will secure the device. To unsecure
the MCU a mass erase of the flash needs to be done.
 Hello World example S32K146, S32K116, S32K118, S32K142W and S32K144W
cannot be supported on IAR IDE.
 After partitioning Flash for CSEc operation, using the JLink Flash configuration of any
other project will not work anymore.
Workaround:
- Run csec_keyconfig example with ERASE_ALL_KEYS 0, using PEmicro debug
configuration
- Run csec_keyconfig example with ERASE_ALL_KEYS 1, using PEmicro debug
configuration
 Example projects for IAR Embedded Workbench use simulator as default debugger.
The user has to manually select and configure the debug probe prior to downloading
to the target.

8. Compiler options
The example projects are using the first level of optimizations (low optimizations).
For exceptions from the following compiler settings, additional information can be found in the
SDK documentation, Build Tools section.
8.1 IAR Compiler/Linker/Assembler Options

Table 8.1 IAR Compiler Options
Option Description
-Ol Low optimizations
-e Allow IAR extensions
--cpu=Cortex-M4 / --cpu Cortex-M0+ Selects target processor: Arm Cortex M4 / Arm
Cortex M0+
--thumb Selects generating code that executes in Thumb
state.
--fpu VFPv4_sp / --fpu none Use floating point instructions / Use software
floating point
--debug Include debug information
-D<cpu_define> Define a preprocessor symbol for MCU
-warnings_are_errors Treat code warnings as errors
Table 8.2 IAR Assembler Options
Option Description
--cpu Cortex-M4 / --cpu Cortex-M0+ Selects target processor: Arm Cortex M4 / Arm
Cortex M0+
state.
floating point
-DSTART_FROM_FLASH Mandatory when flash target is used
Table 8.3 IAR Linker Options
Option Description
--cpu Cortex-M4 / --cpu Cortex-M0+ Selects target processor: Arm Cortex M4 / Arm
Cortex M0+
state.
floating point
--map <map_file> Produce a linker memory map file
--entry Reset_Handler Make the symbol Reset_Handler be treated as a
root symbol and the start label of the

application
--config <linker_file.icf> Use the specified linker file
8.2 GCC Compiler/Linker/Assembler Options

Table 8.3 GCC Compiler Options
Option Description
-mcpu=cortex-m4 / -mcpu=cortex-m0plus Selects target processor: Arm Cortex M4 / Arm
Cortex M0+
-mthumb Selects generating code that executes in Thumb
state.
-O1 Optimize
-funsigned-char Let the type char be unsigned, like unsigned char
-funsigned-bitfields Bit-fields are signed by default
-fshort-enums Allocate to an enum type only as many bytes as it
needs for the declared range of possible values.
-ffunction-sections Place each function into its own section in the
output file
-fdata-sections Place data item into its own section in the output
file
-fno-jump-tables Do not use jump tables for switch statements
-std=c99 Use C99 standard
-g Generate debug information
-mfloat-abi=hard / -mfloat-abi=soft Use FPU instructions / Use software FP
-mfpu=fpv4-sp-d16 Specify the FPU variant (only for S32K14x)
-Wall Produce warnings about questionable constructs
-Wextra Produce extra warnings that -Wall
-Wstrict-prototypes Warn if a function is declared or defined without
specifying the argument types.
-pedantic Issue all the warnings demanded by strict ISO C
-Wunused Produce warnings for unused variables
-Werror Treat warnings as errors
-Wsign-compare Produce warnings when comparing signed type
with unsigned type
Table 8.4 GCC Assembler Options

Option Description
Cortex M0+
state.

-Wall Produce warnings about questionable constructs
-Wextra Produce extra warnings that -Wall
-Wstrict-prototypes Warn if a function is declared or defined without
specifying the argument types.
-x assembler-with-cpp Preprocess assembly files
Table 8.6 GCC Linker Options
Option Description
Cortex M0+
state.
--entry=Reset_Handler Make the symbol Reset_Handler be treated as a
application
-T<linker_file.ld> Use the specified linker file
-Xlinker –gc-sections Remove unused sections
-Wl, -Map=<map_file> Produce a map file
-lgcc Link libgcc
-lc Link C library
-lm Link Math library
8.3 GHS Compiler/Linker/Assembler Options

Table 8.5 GHS Compiler Options
Option Description
-cpu=cortexm0plus / -cpu=cortexm4 Selects target processor: Arm Cortex M4 / Arm
Cortex M0+
-thumb Selects generating code that executes in Thumb
state.
-fhard / -fsoft Use FPU instructions / Use software FP
-fpu=vfpv4_d16 Specify FPU type (only for S32K14x)
-c99 Use C99 standard
--gnu_asm Enables GNU extended asm syntax support
-Ogeneral Optimize
-gdwarf-2 Generate DWARF 2.0 debug information

-G Generate debug information
--quit_after_warnings Treat warnings as errors
-Wimplicit-int Produce warnings if functions are assumed to
return int
-Wshadow Produce warnings if variables are shadowed
-Wtrigraphs Produce warnings if trigraphs are detected
-Wundef Produce a warning if undefined identifiers are used
in #if preprocessor statements
Table 8.8 GHS Assembler Options
Option Description
Cortex M0+
-fhard / -fsoft Use FPU instructions / Use software FP
-fpu=vfpv4_d16 Specify FPU type (only for S32K14x)
-preprocess_assembly_files Preprocess assembly files
DSTART_FROM_FLASH Mandatory when flash target is used
Table 8.9 GHS Linker Options
Option Description
Cortex M0+
-thumb Selects generating code that executes in Thumb
state.
-entry=Reset_Handler Make the symbol Reset_Handler be treated as a
application
-T<linker_file.ld> Use the specified linker file
-map=<map_file> Produce a map file
-larch Link architecture specific library
8.4 DIAB Compiler/Linker/Assembler Options

Table 8.10 DIAB Compiler Options
Option Description
-tARMCORTEXM4LV / Selects target processor: Arm Cortex M4 / Arm
-tARMCORTEXM0PLS Cortex M0+
state.
-Xdialect-c99 Use C99 standard
-g Add debug information to the executable

-O Optimize
-Xstop-on-warning Treat warnings as errors
Table 8.11 DIAB Assembler Options

Option Description
state.
-Xpreprocess-assembly Preprocess assembly files
Table 8.12 DIAB Linker Options
Option Description
-Xremove-unused-sections Removes unused code sections
-lc Link the standard C library to the project in order to
support elementary operations that are used by the
drivers
-lm Link the standard math library to the project in order
to support elementary math operations that are
used by the drivers
<linker_file.dld> Use the specified linker file
-e Reset_Handler Make the symbol Reset_Handler be treated as a
application
-m6 > <map_file> Produce a linker map
-Xpreprocess-lecl Perform pre-processing on linker scripts
8.5 ARMC Compiler/Linker/Assembler Options

Table 8.13 ARMC Compiler Options
Option Description
--target=arm-arm-none-eabi Select arm-none-eabi as target architecture
--cpu=cortex-m4 / --cpu=cortex-m0plus Selects target processor: Arm Cortex M4 / Arm
Cortex M0+
state.
-O1 Optimize
-fshort-enums Allocate to an enum type only as many bytes as it
needs for the declared range of possible values.
-fdata-sections Place data item into its own section in the output
file

-std=c99 Use C99 standard
-g Generate debug information
-Weverything Produce warnings for unused variables
-Wno-switch-enum Do not issue warnings for enum values that are not
explicitly treated in switch statements
-Wno-cast-align Do not issue warnings for cast statements that
increase the required alignment
-Wno-cast-qual Do not issue warnings for cast statements that are
discarding const qualifier.
-Wno-covered-switch-default Do not issue warnings for “default” switch case
being present when all enum values are covered in
a switch
-Wno-reserved-id-macro Do not issue warnings when macros starting with
double underscore (e.g. __IO) are present in the
code.
-Wno-padded Do not issue warnings when padding is added.
Table 8.14 ARMC Assembler Options
Option Description
Cortex M0+
--cpreproc Instructs the assembler to call armcc to preprocess
the input file before assembling it
--cpreproc_opts Enables the assembler to pass options to the
compiler when using the C preprocessor
-DSTART_FROM_FLASH Mandatory define when flash target is used
Table 8.15 ARMC Linker Options

Option Description
Cortex M0+
--entry Reset_Handler Make the symbol Reset_Handler be treated as a
application
--scatter “<scatter_file>” Use the specified scatter file
--datacompressor off Turn off compression for data sections
--map Produce a map file
--list=<map_file> Assign a file for the map
--symbols Save the symbol information in the map file

--predefine="-mcpu=cortex-m0plus" or Selects target processor for preprocessor
--predefine="-mcpu=cortex-m4"
Note: The symbol <linker_file> must be replaced with the corresponding path and linker file name per
device, memory model and target compiler.
E.g. C:\NXP\S32_SDK\platform\devices\S32K144\linker\gcc\S32K144_64_flash.ld - for S32K144, 64 KB
of SRAM and Flash target on GCC.
Symbol <map_file> shall be replaced with the desired map file name.
Symbol <cpu_define> shall be replaced with CPU_S32K144HFT0VLLT for S32K144, CPU_S32K148 for
S32K148, CPU_S32K142 for S32K142, CPU_S32K146 for S32K146, CPU_S32K144W for S32K144W and
CPU_S32K142W for S32K142W

9. Acronyms
Acronym Description
EAR Early Access Release
JRE Java Runtime Environment
EVB Evaluation board
PAL Peripheral Abstraction Layer
RTOS Real Time Operating System
PEx Processor Expert Configurator
PD Peripheral Driver
RTM Ready to Manufacture
S32DS S32 Design Studio IDE
SDK Software Development Kit
SOC System-on-Chip
sCST Structural Core Self Test
S32CT S32 Configuration Tool

10. Version Tracking
Date Version Comments Author

(dd-Mmm-YYYY)
Vlad Baragan-
30-Oct-2015 1.0 First version for EAR 0.8.0
Stroe
Vlad Baragan-
18-Dec-2015 1.1 Added patch 1
Stroe
Added drivers, new in release section, updated Vlad Baragan-
01-Apr-2016 2.0
examples, known limitations for EAR 0.8.1 Stroe
Updated new in this release section, known limitations

and examples description for EAR 0.8.2 release.
27-Oct-2016 3.0
Added “Compiler options” section.
Rares Vasile
Updated header, footer and front page with new logos
21-Dec-2016 4.0 Updated Release Notes for 0.9.0 BETA release Rares Vasile
23-Mar-2017 5.0 Updated Release Notes for 1.0.0 RTM release Rares Vasile
04-May-2017 6.0 Updated Release Notes for 0.8.3 EAR release Rares Vasile
Updated Release Notes for 0.8.3 EAR release -
10-May-2017 6.1 Added drivers, new in release section, updated Cezar Dobromir
examples, known limitations for EAR 0.8.3
27-Jun-2017 7.0 Updated for EAR 0.8.4 release Rares Vasile
31-Aug-2017 8.0 Updated for EAR 0.8.5 release Rares Vasile
27-Nov-2017 9.0 Updated for EAR 0.8.6 release Rares Vasile
3-May-2018 10.0 Updated for BETA 1.9.0 release Rares Vasile
26-Jun-2018 11.0 Updated for RTM 2.0.0 release Rares Vasile
21-Aug-2018 12.0 Updated for BETA 2.9.0 release Rares Vasile
21-Nov-2018 13.0 Updated for BETA 2.9.2 release Vlad Lionte
21-Feb-2019 14.0 Updated for RTM 3.0.0 release Vlad Lionte
28-Mar-2019 14.1 Updated for RTM 3.0.1 service release Vlad Lionte
Ovidiu-Marius
11-Oct-2019 14.2 Updated for RTM 3.0.2 service release
Alexandru
Cuong Nguyen
5-May-2020 15.0 Updated for RTM 3.0.3 service release
Van
Cuong Nguyen
12-June-2020 16.0 Updated for RTM 4.0.0 release
Van

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S32 SDK Release Notes

Version 4.0.0 RTM

© 2020 NXP Semiconductors B.V.

© 2020 NXP Semiconductors B.V. 2

© 2020 NXP Semiconductors B.V. 3

© 2020 NXP Semiconductors B.V. 4

© 2020 NXP Semiconductors B.V. 5

 sCST RTM 1.0.1 – available for S32K11x

 FreeRTOS version 10.2.1

© 2020 NXP Semiconductors B.V. 6

 Quick start guide available in “doc” folder.

© 2020 NXP Semiconductors B.V. 7

Type Name Description

redundancy check value using 16 and 32 bits wide

© 2020 NXP Semiconductors B.V. 8

flexio_i2c Demonstrates FlexIO I2C emulation. Use one instance

ic_pal Shows the usage of the IC_PAL

© 2020 NXP Semiconductors B.V. 9

lpit_periodic_interrupt Shows how to initialize the LPIT to generate an

© 2020 NXP Semiconductors B.V. 10

spi_pal The purpose of this application is to show you how to

with the wakeup condition being the validity of the

© 2020 NXP Semiconductors B.V. 11

© 2020 NXP Semiconductors B.V. 12

The following errata documents were taken into consideration:

© 2020 NXP Semiconductors B.V. 13

6.3 Compiler and IDE versions

7. Known issues and limitations

7.2 Hardware support

© 2020 NXP Semiconductors B.V. 14

© 2020 NXP Semiconductors B.V. 15

© 2020 NXP Semiconductors B.V. 16

8.1 IAR Compiler/Linker/Assembler Options

Table 8.2 IAR Assembler Options

Table 8.3 IAR Linker Options

© 2020 NXP Semiconductors B.V. 17

8.2 GCC Compiler/Linker/Assembler Options

Table 8.4 GCC Assembler Options

© 2020 NXP Semiconductors B.V. 18

Table 8.6 GCC Linker Options

8.3 GHS Compiler/Linker/Assembler Options

© 2020 NXP Semiconductors B.V. 19

Table 8.8 GHS Assembler Options

Table 8.9 GHS Linker Options

8.4 DIAB Compiler/Linker/Assembler Options

© 2020 NXP Semiconductors B.V. 20

Table 8.11 DIAB Assembler Options

Table 8.12 DIAB Linker Options

8.5 ARMC Compiler/Linker/Assembler Options

© 2020 NXP Semiconductors B.V. 21

Table 8.15 ARMC Linker Options

© 2020 NXP Semiconductors B.V. 22

© 2020 NXP Semiconductors B.V. 23

© 2020 NXP Semiconductors B.V. 24

Date Version Comments Author

Updated new in this release section, known limitations

27-Jun-2017 7.0 Updated for EAR 0.8.4 release Rares Vasile

31-Aug-2017 8.0 Updated for EAR 0.8.5 release Rares Vasile

27-Nov-2017 9.0 Updated for EAR 0.8.6 release Rares Vasile