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Assignment LAB1

This laboratory manual experiment explores the design and implementation of basic logic gates. It involves using DSCH 3 and MICROWIND 3.1 software to design AND, OR, EX-OR, and NOT gate circuits, simulate their outputs, and verify the output waveforms match the truth tables. Circuit layouts are created in both DSCH and Microwind and simulations are run to obtain timing diagrams of the input and output signals.

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midun
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264 views

Assignment LAB1

This laboratory manual experiment explores the design and implementation of basic logic gates. It involves using DSCH 3 and MICROWIND 3.1 software to design AND, OR, EX-OR, and NOT gate circuits, simulate their outputs, and verify the output waveforms match the truth tables. Circuit layouts are created in both DSCH and Microwind and simulations are run to obtain timing diagrams of the input and output signals.

Uploaded by

midun
Copyright
© © All Rights Reserved
Available Formats
Download as DOCX, PDF, TXT or read online on Scribd
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FACULTY OF ENGINEERING AND BUILT ENVIRONMENT

ADVANCED VLSI DESIGN


MEE 1123
LABORATORY MANUAL
EXPERIMENT 1

STUDENT NAME: MIDUN MOHANAN

STUDENT ID :0125230133

PROGRAMME : MASTERS IN ELECTRICAL AND ELECTRONICS

SEMESTER:1
FACULTY OF ENGINEERING AND BUILT
ENVIRONMENT

EXPERIMENT 1 (CLO 6, PLO 2):


THE DESIGN AND IMPLEMENTATION OF BASIC GATES.

1.0 Objectives

1. Design and implementation of Basic Gates – AND, OR, EX-OR.


2. To show the output waveform using DSCH 3 and MICROWIND 3.1.

2.0 Equipment
Software: DSCH 3 and MICROWIND 3.1
3.0 Theory

Logic gates are an important concept in electronics. These are important digital devices that are mainly based on the Boolean function. Logic gates are
used to carry out logical operations on single or multiple binary inputs and give one binary output. In simple terms, logic gates are the electronic
circuits in a digital system.

Types of Basic Logic Gates


There are several basic logic gates used in performing operations in digital systems. The common ones are:

 OR Gate
 AND Gate
 NOT Gate
 XOR Gate
Logic Symbol & Truth Table:

NOT Gate XOR Gate


AND Gate OR Gate

4.0 Procedure

1. Design the CMOS circuit diagram for NOT, AND, OR and XR gates in DSCH (Schematic Editor) and run the simulation to obtain timing diagram
for input and output by referring the following CMOS circuit diagram:
NOT Gate XOR Gate
AND Gate OR Gate

2. Display the layout of DSCH schematic diagram.


3. Display the output results for DSCH schematic simulation.
4. Draw the layout design using the schematic (NOT, AND, OR and XOR) as reference in Microwind software tool.
5. Run the simulation to obtain the timing diagram of input and output.
6. Display the layout design of NOT, AND, OR and XOR.
7. Display the output results for Microwind simulation.
8. Analyse the simulation result with truth table in stated in theory parts.

5.0 Conclusion
By using DSCH and Microwind software, circuit layout of NOT, AND, OR and XOR logic gates is prepared, simulation
carried out to obtain the timing diagram of inputs and outputss and output waveform verified as per truth table.
DSCH-NOT GATE
CIRCUIT
NOT GATE-OUTPUT WAVE
FORM
DSCH-AND GATE
CIRCUIT
OUTPUT WAVE
FORM-
AND GATE
DSCH CIRCUIT-OR
GATE
OUTPUT WAVEFORM-
OR
GATE
DSCH CIRCUIT-XOR
GATE
OUTPUT WAVEFORM-
XOR
GATE
NOT GATE CIRCUIT
IN
MICROWIND
NOT GATE
WAVEFORM IN
MICROWIND
AND GATE CIRCUIT
IN
MICROWIND
AND GATE
WAVEFORM IN
MICROWIND
OR GATE CIRCUIT IN
MICROWIND
OR GATE WAVEFORM
IN
MICROWIND
XOR GATE CIRCUIT
IN
MICROWIND
XOR GATE
WAVEFORM IN
MICROWIND

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