Acseh0304 (DLD) 2
Acseh0304 (DLD) 2
Acseh0304 (DLD) 2
ACSEH0304
Roll. No:
SECTION A 20
(a) 10101
(b) 11011
(c) 1000
(d) 101011
(a) a > b
(b) a – b
(c) a < b
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(d) a = b
(a) 4
(b) 8
(c) 5
(d) 10
1 The D flip flop obtained from SR flip flop by just putting _____. (CO3) 1
(a) 2
(b) 3
(c) 4
(d) 5
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1 PLDs with programmable AND and fixed OR arrays are called __________. (CO5) 1
(a) PAL
(b) PLA
(c) APL
(d) PPL
SECTION B 30
3 Realize all the basic logic gates operation using universal gates. (CO1) 6
3 Find the simplilfied form of Y= A’B’ C’ +A’B C’+ AB’C+ A using K-map. (CO1) 6
3.e. Draw the truth table, characteristic table and excitation table of a T flip flop and J-K flip 6
flop. (CO3)
3.f. What is the modulus of the counter? Design mod-5 ripple counter. (CO4) 6
SECTION C 50
4 Minimize the four variable logic function using Quine Mc-Clusky Method (CO1) 10
F(A, B, C, D) = Σm (0,1, 3, 7, 8, 9, 11, 15)
4 Construct the hamming code for data 01101101. Use even parity (CO1) 10
5 Design a combinational circuit that accepts a three-bit number and generates an output 10
binary number equal to the square of the input number. (CO2)
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6 Define counters. Draw the logic diagram for synchronous counter that count from 0000 to 10
1111. Explain how it counts the numbers. (CO3)
7 Derive the state table and state diagram for the sequential circuit shown in fig. (CO4) 10
7 A sequential Circuit has one input and one output. The state diagram is shown in figure. 10
Design the sequential circuit using T Flip-flop. (CO4)
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iii) F3(x,y,z) = ∑m(3,5)
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