Location via proxy:   [ UP ]  
[Report a bug]   [Manage cookies]                
0% found this document useful (0 votes)
7 views44 pages

03 2019 Joint KPS AKPA Symposium Woong Huh

Download as pdf or txt
Download as pdf or txt
Download as pdf or txt
You are on page 1/ 44

Adv. Mater.

30, 1801447 (2018)

Synaptic Barristor Based on


Phase-Engineered 2D Heterostructures

2019 Joint KPS - AKPA Symposium


March 03, 2019
1 1 1 2 3
Woong Huh , Seonghun Jang , Jae Yoon Lee , Hu Young Jeong , Hong-Gyu Park
1,* 1,*
Gunuk Wang , Chul-Ho Lee
1
KU-KIST Graduate School of Converging Science & Technology, Korea University
2
School of Materials Science and Engineering, UNIST
3
Department of Physics, Korea University
* Co-worked with Seonghun Jang and Gunuk Wang
Contents
 Introduction

 The needs for a new way computing

 Memristor: Promising candidate for neuro computing

 2D Materials for neuro-inspired computing

 Synaptic Barristor Using 2D Heterojunctions

 Our strategy : Artificial modulatory synapse

 Monolithic phase engineering

 Neuromorphic application mimicking biological synapses

 Summary
The needs for a new way computing
 An explosive increase in data

Brain inspired computing for


E-efficient processing

Neuron Digital processor

 Neuro inspired computing : How to reduce computing step Front. Neurosci. 5, 108 (2011)
 Series operation  Parallel operation
(Von neumann) (Neuro computing)

Comput. Electr. Eng. 63, 99 (2017)

→ Fundamentally different computing structures for efficient operation.


Biological vs. Artificial synapses
 Biological synapse

Synaptic functions
Long-Term Potentiation (LTP)
Long-Term Depression (LTD)
Dynamic synapse: Short-Term
Plasticity (STP)
Learning rule: Spike Timing
Dependent Plasticity (STDP)
….
ACS Nano 11, 3110 (2017)

 Artificial synapse

Applications
 Pattern & Image recognition
 Data mining
 Non-linear data processing
...

Nano Lett. 10, 1297 (2010)


Artificial synaptic devices
 Memristors using emerging memories ReRAM • Growth of a metallic filament
 Resistance state changes like an analog • Drift of oxygen vacancies
signal according to electrical pulses

Nano Lett. 10, 1297 (2010)


PCRAM Crystalline state Amorphous state

Nature 453, 80(‘08)


Digital-like analog-like
Nano Lett. 10, 1297 (2010)

Proc. IEEE. 98, 2201 (2010)


FeRAM Modulation of electrical polarization

→ Memristor can mimic biological synapses


Nat. Mater. 11, 860 (2012)
Two terminal resistive switching for artificial synapse
 ReRAM (Resistive Memory)

Pre
Synapse Post  Memristive switching induced by atomic drifting
neuron
neuron

Metal Oxide Metal

 Two terminal structures

Metal

Insulator

Metal

 In order to induce a change in resistance, device must have MIM 2 terminal structures.
 In this structure, it is difficult to control on / off of the device or to adjust the current level with the
dynamic range.
2D materials for electrostatically tunable electronics

Semi-metal Semiconductor Insulator


(Graphene) (TMDC) (h-BN)

Adv. Mater. 28, 5293 (2016)


Science 336, 1140 (2012)

 Barristor has the variable schottky barrier through the junction of graphene and Silicon or TMDCs.
 The dirac cone of the graphene moves by the gate voltage, the schottky barrier is changed at the
Gr/semiconductor junction and it becomes the tunable diode.
Our strategy : Gate tunable memristor
 Device structure Adv. Mater. 30, 1801447 (2018)
Memory part
D D

Resistive
WOx memory
S
WSe2
Gr G
Barristor
G S
Selector part( to prevent sneak current)
 Resistive memory : Nonvolatile bipolar switching  Barristor : Gate tunable operation
10-7 1.5
on
10-8

10-9 reset 1.0


Ag set

ID(nA)
10-10
ID(A)

Interface oxide

WOx 10-11 0.5


WSe2
Graphene 10-12
off
-13
10 0.0

10-14
-0.2 0.0 0.2 -80 -60 -40 -20 0 20 40
V (V) V (V)
Advantages of our device structures
 Resistive memory Resistive
D
memory

S
Barristor

 Memristor (artificial synapses)

2-terminal memristor 3-terminal memristor Without Vmod With Vmod

VS

Adv. Mater. 27, 7720 (2015)

 Using 2D materials, it is possible to increase the tunability of the devices with the structural diversity.
Monolithic phase engineering
2D materials
Monolithic growth of WOx
(Direct oxidation of WSe2)

?
Semi-metal Semiconductor Materials for
(Graphene) (TMDC) Memristor ML-WSe2 ML-WSe2

 Layer-by-layer oxidation
 OM image with variable oxidation time  PL enhancement
Monolayer Pristine
Bilayer After 20 min
After 30 min
After 40 min

Intensity (a.u)
10㎛ 10㎛ 10㎛ 10㎛

Pristine 20 min 35 min 40 min

Ozone treatment at 100 ℃


1.4 1.6 1.8
* Collaboration with Jae Yoon Lee @ Korea University Energy (eV)
Monolithic phase engineering
 XPS (monolayer)

 10nm-thick-phase engineering for stable resistive switching


 OM image  Cross-sectional HRTEM  EDS elemental mapping

5um

5um

* Collaboration with Hu Young Jeong @ UNIST


Resistive switching behavior
WOx/WSe2/Gr vs. WSe2/Gr
WOx only
(control 1)

WOx/WSe2
(control 2)

 The Ag/WOx/WSe2/graphene devices exhibit


typical resistive switching behaviors in the ID–VD
curves, while no hysteresis is observed in the
Ag/WSe2/graphene devices.
Interface-dominant switching mechanism

Reactive metal

Reactive metal

Noble metal

 The ultrathin oxide layers were formed by partial oxidation of Ag (Ti), inducing oxygen vacancies in the
vicinity of the interface, which attribute to interface-dominant memristive switching.
 The variation of an interface barrier at Ag/AgOx (or TiOx)/WO3-x induced by oxygen vacancies under the
programming pulses could lead to the memristive switching.
Gate tunable switching behavior

 The switching phenomena came from tungsten oxide is considerably modulated


by varying the VG due to the presence of varied schottky barrier.
 Such gate-tunable memristive switching characteristics occur
when the schottky barrier height is changed by gate voltage.
 Devices consume low power down to 0.1nW due to its ultrathin body.
Two-neural synaptic application
 Our device ( At VG = 0 V )  Analog-like potentiation

Drain
 Potentiation & depression curve

WOx
Source
WSe2
Gr

VG = 0 V

 The analog-like change in PSC is observed as consecutive input spikes are stimulated.
 The device can also implement LTP or LTD as sequentially applying excitatory or inhibitory spikes.
Number & Frequency dependent function
 Number-dependent function
 Synaptic device can be further programmed
to mimic either STP or LTP depending on the
Long Term Plasticity VPulse N = 30 number and frequency of input spike (N).

 The increased PSC recovers to its original


VPulse
N=1 value when N < 5, mimicking STP, while the
Short
PSC is persistent when N > 10, mimicking
LTP.

 Frequency-dependent function

VPulse Short
 Δt = 30 ms (short), the PSC gradually
increases and tends to saturate with an
increasing number of spikes, mimicking LTP.
VPulse
Long
 In contrast, the PSC does not noticeably
change at Δt = 300 ms (long), mimicking STP.
Heterosynaptic plasticity
Two-neuronal synapses Three terminal synapses

Pre Post

Pre Post
Modulatory
terminal

Mod Adv. Mater. 27, 7720 (2015)


vs

Appl. Phys. Lett. 102, 183510 (2013)

- Signal processing is only accomplished


by communication between
pre and post neurons. → Complex structure & behavior

 Biological synapse does not consist solely of a two-neural system, the neuromodulator such as an
astrocyte was recently proposed to play a critical role in cellular programming to achieve a high level of
neural information processing.

 With this modulatory terminal, human brain can process information energy-efficiently.
Energy consumption related to the number of spikes
 Number-dependent function

Long Term Plasticity VPulse


N = 30
To induce a conversion from STP
to LTP, a process of increasing
the number of spikes is required,
which leads to high energy
VPulse
N=1 consumption.
Short

If It is possible to induce
transition with fewer spikes,
we can use energy efficiently.
Enhanced modulation with gate terminal
Two-neuronal synaptic system Modulated synaptic system

Modulator

vs

 The potentiation and depession processes, are accelerated by applying a larger negative VG.
 This result implies the conversion from STP to LTP can be occured with fewer spikes.
 The ability to accelerate the modulation of the synaptic weight can offer potential advantages
to improve the recognizing accuracy and reduce the learning time of the pattern recognition.
Summary

 Device structure & fabrication


 Devices are composed of the vertically stacked memristor and barristor based on 2D materials.
 The memristor and barristor are monolithically integrated by layer-by-layer oxidation and vdW
assembly of 2D materials (including WSe2 and graphene).

 Device characteristics
 Devices are operated as artificial synapse with enhanced tunability.
 Memristive switching behavior is tuned by varying the gate voltage due to modulation of the
Schottky barrier.
 SET/RESET voltages(~1V) are lower than those of conventional s due to atomically thin structures.
 Pre & post neuron are connected to synapse, and the signals can be enhanced by the gate terminal.

D D
Resistive
WOx Memory
S
WSe2
Gr G
Barristor
G S
Thank you for your attention.
Fabrication process
 Fabrication process

2 Marker patterning 4 e-
beam lithography
& metal deposition(Ag)

1 Exfoliated Gr 5 e-
beam lithography
3 StackingWSe2/WOx flake
on the exfoliated Gr & metal deposition(Cr/Pd/Au)
Fabrication process
 Thickness control

5.0nm
2.0nm

1.3nm 10nm

10um 10um 10um

- Pristine - After 10min - After 90min

8
Before oxidation
7 After 10min
6 After 90min

Height(nm)
4
3
2
1
0
-1
-2
0 2 4 6 8
Nano Lett. 15(3), 2067(‘15)
Distance(um)
Fabrication process
 Monolithic oxidation process
 Monolayer
30000 Pristine
20min 100℃
30min 100℃

Intensity (a.u)
WOx 20000

10000

0
ML-WSe2 ML-WSe2 1.4 1.6 1.8 2.0

Energy (eV)

Monolayer  Bilayer
Bilayer

Pristine
9000 20min 100℃
30min 100℃
40min 100℃

Intensity (a.u)
10㎛ 10㎛ 10㎛ 10㎛
6000
Pristine 20 min 35 min 40 min

3000

Ozone treatment at 100 ℃


0
1.4 1.6 1.8 2.0

Energy (eV)
- Disappeared PL & Raman intensity
* Collaboration with Jae Yoon Lee @ Korea University
Mechanism of switching
 Cross-sectional TEM images & EDS line profiling
Reactive metal - Based on the existence of interfacial oxide layer
between Ag (or Ti) and WO3–x and the bipolar
switching with the negative SET voltage, the
switching behavior may be attributed to the
migration of oxygen vacancies and electrochemical
redox reactions at the interface.

Reactive metal
Ti

Noble metal
Basic performance with a low power feature
 Low power consumption

Current-Voltage Power-Voltage
101 101
100 100
10-1 10-1
10-2 10-2
10-3 Pt/WOx/Al 10-3 Pt/WOx/Al

Power(W)
Al/WOx/FTO
10-4 10-4
Al/WOx/FTO
Cu/WOx/TiN Cu/WOx/TiN
Iset(A)

Ti/WOx:N/Pt Ti/WOx:N/Pt
10-5 IrOx/Al2O3/WOx/W
Al/Gr/WOx/Al
10-5 IrOx/Al2O3/WOx/W
Al/Gr/WOx/Al
10-6 TiN/WOx/W
10-6 TiN/WOx/W
Synaptic barristor WOx/Au coreshell WOx/Au coreshell

10-7 (Vg=60/0/-85V)
Cu/WOx*H2O/ITO-PET
ITO/WO3/ITO 10-7 Synaptic barristor
Cu/WOx*H2O/ITO-PET
ITO/WO3/ITO
Pt/WOx/W
10-8 10-8
Pt/WOx/W
Al/WOx/Pt
Cu/WOx/Pt
(Vg=60/0/-85V) Al/WOx/Pt
Cu/WOx/Pt
10-9 W/WOx/TiN
Vg=60V
10-9 W/WOx/TiN
Vg=60V
10-10 Vg=0V
Vg=-85V 10-10 Vg=0V
Vg=-85V

10-11 10-11
0 1 2 3 4 5 0 1 2 3 4 5
Vset(V) Vset(V)

- The selection criterion was limited to WOx , and the set voltage and the current in LRS state were recorded.

- The data in black shade is the result of examining the set V and current of the previously announced WO x based memory.

- Since we can control the amount of current flowing as we change the gate voltages,
we use the power consumption according to various gate V for comparison.
Number & Frequency dependent function

 Number-dependent function
 Synaptic device can be further programmed
to mimic either STP or LTP depending on the
Long Term Plasticity N = 30 number and frequency of input spike (N).

 The increased PSC recovers to its original


N=1 value when N < 5, mimicking STP, while the
Short
PSC is persistent when N > 10, mimicking
LTP.

 Frequency-dependent function
Short
 Δt = 30 ms (short), the PSC gradually
increases and tends to saturate with an
increasing number of spikes, mimicking LTP.
Long
 In contrast, the PSC does not noticeably
change at Δt = 300 ms (long), mimicking STP.
Time dependent potentiation
1.5x10-6
 Paired pulse facilitation (PPF)
1.0x10-6

Id(A)
5.0x10-7

0.0

 Our artificial synapses -0.1 0.0 0.1

Vd(V) Annual Review of Physiology 64, 335(2002)

- Ʈ1 = 17ms, Ʈ2 = 639ms - Ʈ1 = 40ms, Ʈ2 = 300ms


- we obtained two decaying time constants, τ1 = 17 ms and τ2 = 640 ms,
which were similar to the reported values of biological synapses.
Stability of our devices
 Stability with a gate tunable feature

Vd= -0.2V Vd= -0.2V Vd= -0.3V

Endurance Endurance with variable gate V Retention with variable gate V

-Since we tested at various voltages from -0.2V to -0.3V, we labeled Y axis as Siemens for comparison.

- Basically, we measure endurance up to 1000 times and retention up to 5000 seconds.


Promising Materials for neuro-inspired computing
 Memristor based on 2D materials

ACS Nano 11, 3110 (‘17)


ACS Nano 11, 1091 (‘17)

Nature 554, 500 (‘18) Adv. Mater. 29, 1703363 (‘17)

- These works have a similar structure to the basic three-terminal MOSFET (synaptic transistor),
and still have problems such as circuit complexity.

- These works also do not attempt to solve the problems,


but just porve that it works as a memristor.
Mechanism of resistive switching

LRS
D
TE (Ag)
Interfacial oxide

WOx WOx
S
RESET
WSe2 BE (WSe2, Gr) HRS
Gr

SET
G

Migration of VO & metal ion

LRS
 The device exhibits a transition from HRS to LRS in
RESET negative VD polarity corresponding to the ‘SET’ process,
SET and vice versa in positive VD polarity corresponding to
the ‘RESET’ process, indicating bipolar resistive switching.
HRS  The migration of oxygen vacancies and electrochemical
redox reactions at the Ag/WOx interface may be
responsible for this switching behavior
The needs for a new way computing
 An explosive increase in data
Brain inspired computing for
E-efficient processing

 Neuro computing : how to reduce computing step Front. Neurosci. 5, 108 (2011)
 Series operation  Parallel operation
(Von neumann) (Neuro computing)

Comput. Electr. Eng. 63, 99 (2017)

→ Fundamentally different computing structures for efficient operation.


The needs for a new way computing
 Biological synapse
- pre & post neurons respond differently to the same stimulus.
Same stimulus

ACS Nano 11, 3110 (2017) Different response


 Artificial synapse

Nano Lett. 10, 1297 (2010) Nature Commun. 4, 2676 (2010)

- Artificial synapses mimic step-wise change of states, which is similar to function of the biological synapses.
The needs for a new way computing
 An explosive increase in data
Solution 1
Decreasing energy consumption
per computation step

Solution 2
Decreasing volatility of the data storage

Solution 3
Reducing computation step

 Neuro computing : how to reduce computing step Front. Neurosci. 5, 108 (2011)
 Series operation  Parallel operation
(Von neumann) (Neuro computing)

Comput. Electr. Eng. 63, 99 (2017)

→ Fundamentally different computing structures for efficient operation.


The needs for a new way computing
 Memristor using emerging memories ReRAM - Growth of Metallic filament
 Memristor - Drift of oxygen vacancy
- Resistance state changes like an analog
according to the applied bias.

Nano Lett. 10, 1297 (2010)


PCRAM Crystalline state Amorphous state

Metallic filament Proc. IEEE. 98, 2201 (2010)


Step-wise change of Crystalline state FeRAM Directional change of polarization
Polarization

Step-wise change of resistance state Nat. Mater. 11, 860 (2012)


Promising Materials for neuro-inspired computing
 Resistive memory
- Memristive switching due to its atomic drifting
Pre
Synapse Post
neuron
neuron

Metal Oxide Metal


power consumption
- Still suffering from uncontrollable filament formation
weak tunability
 2D materials

Semi-metal Semiconductor Insulator


(Graphene) (TMDC) (h-BN)
Nature Nanotech. 6, 147 (‘11) Nature 526, 91 (‘15)

→ Promising candidates for tunable & low power electronics


Our strategy : Gate tunable memristor
 Device structure Phase-engineering : Low power
Memory part Gr

D D

Resistive WSe2/WOx
10μm

2 WOx memory
S
WSe2
3 Gr 1 G
Barristor
Structures : Complexity G S
2D materials : Tunbale & Low power
Selector part( to prevent sneak current)
 ReRAM : Nonvolatile-7bipolar switching  Barristor : Improved circuit complexity
10 1.5
on
10-8

10-9 reset 1.0


Ag set

ID(nA)
10-10
ID(A)

Interface oxide

WOx 10-11 0.5


WSe2
Graphene 10-12
off
-13
10 0.0

10-14
-0.2 0.0 0.2 -80 -60 -40 -20 0 20 40
V (V) V (V)
Heterosynaptic plasticity
 Two-neural synapses (previously reported works)

Appl. Phys. Lett. 102, 183510 (2013)

Nano Lett. 10, 1297 (2010)


- Signal processing is only accomplished by communication between pre and post neurons.
 Actual synapses : complex structure & behavior

Chemical synapse
Electrical synapse

Modulatory
terminal
Astrocyte
Nature Review. 27, 7720 (2015)
Adv. Mater. 27, 7720 (2015)

- Signal processing is enhanced by a heterosynaptic function involving a third factor


such as astrocyte, combination of chemical & electrical synapse and other modulatory terminals.
How to learn?
 Learning based on fuzzy logic
→ Fuzzy logic : There are a infinite gray scale concentration between black and white

Binary logic Fuzzy logic

Not learned Learned Not learned Learning Learned

 Von Neumann architecture (Current computing logic structure)


→ Because it follows binary logic, learning based on fuzzy logic is impossible directly.

Memory

Bus

Input CPU Output


Two terminal WOx ReRAM
 Mechanism
- Zero bias - Negative bias(TE)
-
Ag Ag Thinning of interface oxide
Interface oxide Interface oxide due to the drift of oxygen groups

WOx WOx
WSe2 WSe2
Graphene Graphene
+

Ag Ag
10-4 10-4 Au
WOx
10-4
WOx WOx
WSe2 Au WSe2
10-6 10-6
Au -6 Au
10
Id(A)

10-8
Id(A)

Id(A)
10-8
10-8
-10
10-10 10

10-10
10-12 10-12

10-14 10-14 10-12


-0.9 -0.6 -0.3 0.0 0.3 -1.2 -0.9 -0.6 -0.3 0.0 0.3 -1.0 -0.5 0.0 0.5 1.0
Vd(V) Vd(V) Vd(V)
Two terminal WOx ReRAM
 Mechanism
- Zero bias - Negative bias(TE)
-
Ag Ag
WOx WOx
Drift of oxygen groups
WSe2 WSe2
Au Au
Oxygen groups

Ag metal
+

Ag Ag
10-4 10-4 Au
WOx
10-4
WOx WOx
WSe2 Au WSe2
10-6 10-6
Au -6 Au
10
Id(A)

10-8
Id(A)

Id(A)
10-8
10-8
-10
10-10 10

10-10
10-12 10-12

10-14 10-14 10-12


-0.9 -0.6 -0.3 0.0 0.3 -1.2 -0.9 -0.6 -0.3 0.0 0.3 -1.0 -0.5 0.0 0.5 1.0
Vd(V) Vd(V) Vd(V)
Gate tunable ReRAM as a sneak current-free structure

 Device structure
Memory part Gr

D D

WSe2/WOx
10μm

Memristor
WOx
S
WSe2 G
Gr Barristor

S
G
Selector part( to prevent sneak current)
Fabrication process
 Fabrication process

4 e-
beam lithography
Marker patterning
& metal deposition(Ag)

1 Gr 5 e-
beam lithography
exfoliation 3 StackingWSe2/WOx flake
on the exfoliated Gr & metal deposition(Cr/Pd/Au)
Fabrication process
* Collaboration with Hu Young Jeong @ UNIST
 HRTEM image
Ag - It present the possibility that the oxide
Interface oxide inside WOx can be moved by Ag electrode

Amorphous-WOx ~10nm

- The interface between WOx and WSe2


WSe2 is extremely clean and uniform due to
the monolithic oxidation process
SiO2
 EDS elemental mapping

Ag Ag

WOx O

W
WSe2 Se

- STEM image - Ag -O -W - Se
mapping mapping mapping mapping

You might also like