Unit 1

Microprocessors & Microcontroller Applications
Microprocessors & Microcontroller Applications

Introduction
• The basic block diagram of a computer is shown in Figure. The computer comprises
four basic units, namely, input (I/P), memory, output (O/P), and central processing
unit.
Introduction
Input Devices
•An input device accepts data from the environment, converts it into digital form
and sends it to the memory of the computer for storing.
• Commonly used input devices are punched cards, paper tapes, magnetic tapes,
floppy disks, and magnetic disks.
• A keyboard terminal can be used as input to the computer.
• The input is then converted into machine code and transmitted into the memory
of the computer for processing.
Introduction
Memory
•A computer system also has storage areas, often referred to as memory. The memory
unit stores the information to be processed by the CPU.
•This information consists of the program as well as data.
•The memory can receive data, hold them and deliver them when instructed to do so.
• The storage available in the memory is also known as main storage or primary
storage
Introduction
Output Devices
•When a program is executed in the computer, the result will be computed and readily
available for display.
•The computer needs output devices to display the information to the user.
• The most commonly used output devices are monitor screens, printers, graphics
plotters and speech
Introduction
Central Processing Unit
•The central processing unit is the brain of the computer.
• It executes the programmer’s software and controls the memory, input and output
devices.
• Programs are stored in the memory.
•The CPU fetches instructions of a program sequentially from the memory. It fetches
one instruction at a time, decodes it and then executes it.
The ALU performs the actual processing of
data including addition, subtraction,
multiplication and also division.
The control unit directs and coordinates all
activities of the computer system including
the following:
Control of input and output devices
Entry and retrieval of information from
storage
Routing of information between storage and
arithmetic logic unit
Direction of arithmetic and logical
operations
Basic Concepts of Microprocessors
Microcomputer –a computer with a microprocessor as its CPU. Includes memory,
I/O etc.
Microprocessor –silicon chip which includes ALU, register circuits & control circuits
Microcontroller –silicon chip which includes microprocessor, memory & I/O in a

single package.
What is a Microprocessor ?
The word comes from the combination micro and processor.
Processor means a device that processes whatever. In this context processor means a
device that processes numbers, specifically binary numbers, 0’s and 1’s.
To process means to manipulate. It is a general term that describes all
manipulation. Again in this content, it means to perform certain operations on
the numbers that depend on the microprocessor’s design.
What about micro?

• Micro is a new addition.
In the late 1960’s, processors were built using discrete elements.
These devices performed the required operation, but were too large and too slow.
In the early 1970’s the microchip was invented.

All of the components that made up the processor were now placed on a single piece
of silicon. The size became several thousand times smaller and the speed became
several hundred times faster. The “Micro”Processor was born.
Definition of the Microprocessor
The microprocessor is a programmable device that takes in numbers, performs on
them arithmetic or logical operations according to the program stored in memory
and then produces other numbers as a result.
Lets expand each of the Red Bold words:
Programmable device: The microprocessor can perform different sets of operations on

the data it receives depending on the sequence of instructions supplied in the given
program. By changing the program, the microprocessor manipulates the data in
different ways.
Instructions: Each microprocessor is designed to execute a specific group of

operations. This group of operations is called an instruction set. This instruction set
defines what the microprocessor can and cannot do.
Takes in Numbers: The microprocessor has a very narrow view on life. It only
understands binary numbers.
A binary digit is called a bit (which comes from binary digit). The microprocessor
recognizes and processes a group of bits together. This group of bits is called a
“word”.
Arithmetic and Logic Operations:
Every microprocessor has arithmetic operations such as add and subtract as part of its
instruction set.
Most microprocessors will have operations such as multiply and divide.
In addition, microprocessors have logic operations as well. Such as AND, OR, XOR,
shift left, shift right, etc.
Stored in memory :
Memory is the location where information is kept while not in current use.
Memory is a collection of storage devices. Usually, each storage device holds one bit.
Also, in most kinds of memory, these storage devices are grouped into groups of 8.
These 8 storage locations can only be accessed together. So, one can only read or
write in terms of bytes to and form memory.
It is measured in Kilos, Megas and lately Gigas.
When a program is entered into a computer, it is stored in memory. Then as the

microprocessor starts to execute the instructions, it brings the instructions from
memory one at a time.
Produces:
For the user to see the result of the execution of the program, the results must be
presented in a human readable form.
The results must be presented on an output device.
This can be the monitor, a paper from the printer, a simple LED or many other forms.
Analog Between Microprocessor and Human brain

Brain gets input from nose, eyes and ears
Sends processed information to output devices such as the face with is capacity to
register expression, the mouth, the hands, or feet.
Every μp recognizes and produces a group of bits called word.

Microprocessor are classified according to their word length.
A processor with an 8-bir word is known as an 8-bir microprocessor.
Evolution of the Microprocessor
In 1971, the Intel Corporation introduced the first 4-bit microprocessor 4004 which
was developed using LSI technology.
In 1972, the 8-bit microprocessor 8008 was produced by Intel.
These microprocessors were not able to survive as general-purpose microprocessors
due to their limitations and low performances.
The first general-purpose 8-bit microprocessor 8080 was developed in 1974 by Intel.
The microprocessor 8085 followed 8080 with some additional features.
The limitations of 8-bit microprocessors were low operating speed, limited memory-
addressing capability, less number of general-purpose registers and less number
of instructions.
To overcome all limitations of the 8085 microprocessor, a 16-bit microprocessor 8086
was developed in 1978.
Thereafter, the 80186 processor was designed in 1982.

But due to need of large memory in advance applications, processor designers put
effort to design advanced microprocessors.
The 80286 microprocessor is the first advanced microprocessor with proper memory
management and protection abilities.
It was developed by Intel in 1982 and it has an address capability of 16 Mbyte and its
operating frequency is 12.5 HMz.
The first 32-bit processor was 80386.
The name Pentium was derived from the Greek pente, meaning ‘five’, and the Latin
ending -ium.
The term ‘Pentium processor’ refers to a family of microprocessors that share a
common architecture and instruction set.
The original Pentium processor was a 32-bit microprocessor produced by Intel. The
first Pentium processors, P5, were developed in 1993.
The Pentium Pro is a sixth-generation x86 microprocessor developed and introduced

by Intel in November 1995.
The Pentium II processors refer to Intel’s sixth-generation micro-architecture called

‘Intel P6’, introduced in May 1997. This processor consisted of 7.5 million transistors.
The Pentium III processors were based on the sixth-generation Intel P6

microarchitecture introduced in February 1999.
A dual-core processor is a CPU with two separate cores on the same die, each with its
own cache.
It is the equivalent of getting two microprocessors in one. The dual core processor is
the first double core technology from Intel.
Intel Core 2 Extreme Quad-Core Processor QX6000 was introduced by Intel in 2007.
How Does the Microprocessor Work?
The instructions are stored sequentially in the memory.
The microprocessor fetches the first instruction from its memory sheet, decodes and
execute is continued until the microprocessor comes across an instruction to stop.
During the entire process, the microprocessor uses the system bus to fetch the binary
instructions and data from the memory. It uses register section to store data
temporarily and performs the computing function in the ALU section.
Finally it sends out the result in binary, using the same lines to the output (7 segment
display)
Microprocessor Instruction sets and
Computer languages
Each machine has its own set of instructions based on the design of its CPU or its
microprocessor .
To communicate with the computer, one must give instructions in binary language
(machine language)
Programmers can write programs called assembly language programs.
Due to the difficulty in writing a programs in set of 0 and 1 computer manufacturers
have devised English-like words to represent the binary instructions of a machine.
Computer languages
Machine Language
The number of bits in a word for a given machine is fixed and words are formed
through various combinations of these bits.
For example a machine with a word length of eight bits can have 256 (2^8)
combinations of eight bits.
The μp design engineer selects combinations of bit patterns and gives a specific
meaning to each combination by using electronic logic circuits; this is called an
instruction.
Instructions are made up of one word or several words.
Computer languages
8085 Machine Language
Computer languages
8085 Assembly Language
Computer languages
ASCII Code
Example: Hexadecimal 30H to 39h represents 0 to 9 digits

41h to 54 H represents A to Z
Computer languages
Writing and Executing an Assembly Language program
A Program is a set of logically related instructions written in a specific sequence to
accomplish a task.
The following steps are necessary for write and execute an assembly langauge
program:
Computer languages
Operating System
8085 microprocessor
• The Intel 8085 is a microprocessor, i.e., an 8-bit parallel central processing unit
implemented in silicon gate NMOS/HMOS/C-MOS technology.
• It is available in a 40-pin IC package fabricated on a single LSI chip.
• It is designed with higher processing speed, ranging from 3 MHz to 5 MHz Lower
power consumption and power-down mode is provided, thereby offering a high level
of system integration.
• This processor uses a multiplexed address/data bus. The address bus is split between
the 8-bit address bus and the 8-bit data bus.
The features of 8085 microprocessors are given below:

1. Low power dissipation: about 50 mW
2. Single +3 to +6 V power supply
3. Operating temperature from –40 to + 85°C
4. On-chip clock generator incorporating external crystal oscillators
5. Four-vectored interrupt including one non-maskable
6. Serial input/Serial output port
7. Addressing capability to 64K bytes of memory
8. TTL compatible
9. Available in 40-pin plastic DIP package
Pin Diagram of 8085 microprocessor
In 8085 all the signals can be classified into six groups:
(1) Address bus
(2) Data bus
(3) Control and status signals
(4) Power supply and frequency signals
(5) Externally initiated Signals
(6) Serial I/O ports
Control and status signals
Power Supply and Clock Frequency
Externally Initiated Signals n including Interrupts
HLDA pin is used to respond to the HOLD request.

Externally Initiated Signals n including Interrupts
Architecture of 8085 microprocessor
It consists of three main sections: an arithmetic and logic unit, timing and control unit
and a set of registers.
Operation of 8085 microprocessor
microprocessor performs four different operations:
memory read, memory write, input/output read and input/output write.
In the memory read operation, data will be read from memory

In the memory write operation, data will be written in the memory
Data input from input devices are I/O read operations
Data output to output devices are I/O write operations
The memory read/write and Input/Output read and write operations are performed as
part of communication between the microprocessor and memory or Input/Output
devices. Microprocessors communicate with the memory, and I/O devices through
address bus, data bus and control bus
For this communication, firstly the microprocessor identifies the peripheral devices by
proper addressing. Then it sends data and provides control signal for synchronization.
System Bus
The system bus is collection of wires which are used to transfer binary numbers, one bit
per wire.
The 8085 microprocessor communicates with memory and input and output devices
using three buses, namely, address bus, data bus and control bus
System Bus
A 16-bit binary number allows 2^16 different numbers, or 65536 different numbers,
i.e., 0000 0000 0000 0000 up to 1111 1111 1111 1111.
The Intel 8085 microprocessor has 65536 = 64K, (where 1K = 1024) memory for
locations and each memory location contains 1 byte of data.
The address bus is unidirectional. That means numbers can only be sent from
microprocessor to memory, and not the other way.
System Bus
Data BUS
In the 8085 microprocessor, the data size is 8 bits.

The data bus is used to move or transfer data in binary form.
The data is transferred between the microprocessor and external devices.
There are 2^8 combinations of binary digits.
Data bus is used to transmit ‘data’, i.e., information, results of arithmetic, etc, between
the memory and the microprocessor. This bus is bi-directional.
The address/data bus sends data and addresses at different instant of time. Therefore, it
transmits either data or an address at a particular moment.
The AD-bus always operates in the time-shared mode.
System Bus
8085 microprocessor has 11 control lines, namely
The microprocessor cannot function correctly without these vital control signals. The
control bus carries control signals, partly unidirectional, partly bi-directional.
Memory Read Operation
Figure shows the memory read operation.
Initially, the microprocessor places a 16-bit address on the address bus.
Then the external decoder logic circuit decodes the 16-bit address on the address bus
and the memory location is identified.
Thereafter, the microprocessor sends MEMR control signal which enables the
memory IC.
After that, the

content of the
memory location is
placed on the data
busthat,
After andthealso sent oftothe memory location is placed on the data bus and also sent to the
content
the microprocessor.
microprocessor.
μP Communication and Bus Timings
Process of communication means reading from and writing into memory.
Communication is related to the system clock
The first step in the communication process is reading from memory or fetching an
instruction
Analogy
After that, the content of the memory location is placed on the data bus and also sent to the
microprocessor.
The timing of data flow when the instruction code 0100 1111(4FH –MOV C, A)
stored in location 2005H, is being fetched
microprocessor.
Figure shows the timing of how
a data Byte is transferred from
memory to the MPU.
Figure show 5 different groups

of signals in relation to the
system clock.
Address and data bus are

shown as 2 parallel lines.
The
After that,crossover
the content of thememory
of the lines location is placed on the data bus and also sent to the
indicates that a new byte is
microprocessor.
placed on the bus
Dashed straight line indicated

the high impedance state.
To fetch the byte following steps are required
microprocessor.
At T1
The high order memory address
20H is placed on the address
lines
The low order memory address

05H is placed on the bus AD7-
AD0.
ALE signal goes high
IO/M
After barcontent
that, the signalof the
goes low location is placed on the data bus and also sent to the
memory
(memory read operation).
microprocessor.
microprocessor.
In step 2
Control signal RD bar is
activated for enabling the
memory chip
microprocessor.
microprocessor.
In step 3
When memory is enabled,
The instruction byte (4FH) is
placed on the bus AD7-AD0
and transferred to the
microprocessor.
The RD bar signal causes 4FH

to be placed on bus AD7-AD0.
When RD bar goes high, it
causes the bus to go into high
impedance.
microprocessor.
microprocessor.
In step 4
The machine code (4FH) is
decoded by the instruction
decoder, and the contents of the
accumulator are copied into
register C.
The task is completed in T4
microprocessor.
Demultiplexing the Bus AD0-AD7
Timing Figure shows that the
address on the high order
(20H) remains on the bus for
three clock periods.
While low order address
(05H) is lost after the one
period .
microprocessor.
microprocessor.
microprocessor.
The 8085 Programmable Registers
Registers:
AfterFollowing
that, the content of are
registers the memory location
include in 8085 is placed on the data bus and also sent to the
microprocessor
microprocessor.
• One 8-bit accumulator (ACC) known as register A
• Six 8-bit general-purpose registers: B, C, D, E, H and L
• One 16-bit Stack Pointer (SP)
• One 16-bit Program Counter (PC)
• Flag register
General-purpose registers :
The Intel 8085 has six general-purpose registers to store 8-bit data and these
registers are identified as B, C, D, E, H and L.
When two registers are combined, 16-bit data can be stored in a register pair. The
only possible combinations of register pairs are BC, DE and HL.
These register pairs are used to perform 16-bit operations.
Accumulator:
The accumulator is an 8-bit register, which is part of the Arithmetic Logic Unit
(ALU).
This is identified as register A or ACC.
It is used to store 8-bit data and to perform arithmetic as well as logic operations.
AfterThe
that,final result ofoftheanmemory
the content operation performed
location is placedin
on the ALUbusisand
the data also
alsostored
sent toin
thethe
microprocessor.
accumulator.
Program counter :
The program counter is a 16-bit special-purpose register.
This is used to hold the memory address of the next instruction which will be
executed.
Actually, this register keeps track of memory locations of the instructions during
execution of program.
The microprocessor uses this register to execute instructions in sequence.
For this, the microprocessor increments the content of the program counter.
Stack pointer:
The stack pointer is a 16-bit register, which is used to point the memory location
called the stack.
AfterThe stack
that, is a sequence
the content of memory
of the memory locations
location in the
is placed on R/W memory.
the data bus and also sent to the
microprocessor.
The starting of the stack is defined by loading a 16-bit address into the stack pointer.
Flag Registers:
The Arithmetic Logic Unit (ALU) includes five flip-flops, which are set or reset
after an ALU operation according to data conditions of the result in the accumulator
and other general-purpose registers.
The status of each flip-flop is known as a flag.

Five flags namely, Carry flag (CY), Parity flag (P), Auxiliary Carry flag (AC), Zero
flag (Z), and Sign (S) flags.
The most commonly used flags are Carry(CY), Zero(Z) and Sign(S).
For example, after addition of two 8-bit numbers, if the sum in the accumulator is
Afterlarger
that, than eight bits,
the content of thethe flip-flop,
memory which
location is is usedon
placed to the
indicate a carry,
data bus is set
and also totoone.
sent the So
microprocessor.
the Carry flag (CY) is set to1.
If the result is zero after any arithmetic operation, the Zero (Z) flag is set to one.
Figure shows an 8-bit register, which indicates bit positions of different flags.
This register is known as flag register and it is adjacent to the accumulator.

microprocessor.
Though it is an eight-bit register, only five bit positions out of eight are used to store
the outputs of the five flip-flops.
Flags are used in the decision-making process of the microprocessor.

Carry Flag: The arithmetic operation generates a carry in case of addition or a
borrow in case of subtraction after execution of an arithmetic instruction and the
carry flag is set to 1.
Parity Flag: After an arithmetic or logical operation, if the number of 1s in the

result is even (even parity), this parity status flag (P) is set, and if the number of 1s
is odd (odd parity), this flag is reset.
For example, if the data byte is 1 1 1 1 1 1 1 1, the number of 1s in the data byte is
eight (even parity) and the parity flag (P) is set to 1.
Auxiliary carry Flag : In arithmetic operations of numbers, if a carry is generated

by bit D3 and passed on to D4, the auxiliary carry flag (AC) is set. Actually this flag
Afteris that,
usedthefor internally
content Binary Coded
of the memory location Decimal (BCD)
is placed on operations
the data andsent
bus and also thisto is
thenot
microprocessor.
available for the programmer to change the sequence of operations through jump
instructions.
Zero Flag: When an 8-bit ALU operation results in zero, the Zero (Z) flag is set;
otherwise it is reset.
Sign Flag:
The sign flag has its importance only when a signed arithmetic operation is
performed.
In arithmetic operations of signed numbers where the bit D7 is used to indicate a
sign, this flag is set to indicate the sign of a number.
The most significant bit of an 8-bit data is the sign bit.
When a number is negative, the sign bit is 1. If the number is positive, the sign bit
is 0.
For an 8-bit signed operation, the remaining 7 bits are used to represent the
magnitude of a number.
After that, the content of the memory location is place on the data bus and also sent to the
microprocessor.
Internal Data Operations and the 8085 Registers
microprocessor.
microprocessor.
microprocessor.
Peripheral or Externally Initiated Operations
microprocessor.
Memory
microprocessor.
Storage Element: Flip-Flop or Latch
In this latch the stored bit is always available on the output line Dout.
To avoid unintentional change in the input and control the availability of the output,
we use two tristate buffers on the latch.
By using these buffers we can write into the latch by enabling the input buffer and
read from it by enabling the output buffer.
Four such cells or latches grouped together this is a register, which has four input
lines and four output lines and can store four bits. Size becomes 4 bits.
Four input lines and four output lines and can

store four bits.
Size of this register is specified either as 4-bit
or 1x4 bits.
Four registers with eight cells are arranged in a sequence.

To write into and read from any one of the registers should be enabled.
The two input lines A1 and A0 have 4 different bit combinations and each combination
identified one register.
Enable signal in latch is replaced by address lines .
Two chips with four registers each. There are total 8 registers therefore we need three
address lines, but one line should be used to select between the two chips.
The additional signal called chip select .
Assume we have available four address lines and two memory chips with four registers each.
Requirements of Memory Chip
Requirements of Memory Chip
Memory Map and Addresses
In 8 bit microprocessor, 16 address lines are available for memory.
It is capable of identifying 2^16 (65536) memory registers, each register with a16-
bit address
The entire memory addresses can range from 0000 to FFFF in Hex.
A memory map is a pictorial representation in which memory devices are located in
the entire range of address.
Memory addresses provide the locations of various memory devices in the system
Analogy
Consider a memory chip with 256 registers.
For 256 registers we require8 address lines.
What is purpose of rest 8 address lines?
Remaining 8 address lines to assign fixed logic to generate a constant number.
Example
How you divide the address lines for a memory 1K (1024X8).
Example
Memory Address lines
For a chip with 256 registers, we need 256 binary numbers to identify each register.
Each address line can assume only two logic states (0 and 1)
Therefore we need to find the power of 2 that will give us 256 combinations.
Memory Word Size

Example
Example
Example
Memory Classification
The presence of
diodes stores 1
and absence
stores 0
Input and Output Devices
Input and Output Devices
Tri-State Devices
Buffer
Decoder
Encoder
D Flip-Flop and Latch
Generating Control Signal
The OR gates functionally connected as negative NAND gate s

The IO/M bar

Example of 8085 based microcomputer
The 8085 Machine Cycles and Bus Timings
All Instructions are divided into few basic machine cycles and these machine cycles are
divided into precise system clock periods
When the instruction code 01001111 (4FH-MOV C,A) stored in the location 2005H
When the instruction code 01001111 (4FH-MOV C,A) stored in the location 2005H
Memory Read Cycle
Operation during T1-T4
How to recognize machine cycles
How to recognize machine cycles
Memory Interfacing
During the execution of program, the microprocessor needs to access memory
frequently to read instruction codes and data stored in memory the interfacing
circuit enables that access.
Memory has certain signal requirements to write into and read from its registers.
Similarly, the microprocessor initiates a set of signals when it wants to read from and
write into memory.
The interfacing process involves designing a circuit that will match the memory
requirements with the microprocessor signals.
Memory Interfacing
Memory Structure and its requirement
Figure shows a R/W memory chip it has 2048 registers and each register can store 8
bits indicating by 8 input and 8 output data lines.
The chip has 11 address lines, one chip select, and two control lines: RD bar to
enable the output buffer and WR bar to enable input buffer
Memory Interfacing
Memory Structure and its requirement
There is a quartz window on the chip

that is Used to expose the chip to
ultraviolet rays for erasing the program.
Once the chip is programmed, the

window is covered with opaque tape to
avoid accidental erasing
Memory Interfacing
Basic Concepts in Memory Interfacing
The Microprocessor should

Memory Interfacing
Memory Read Operation
Memory Interfacing
Memory Interfacing
Memory Write Operation
In write operation, the 8085 places the address and data and asserts the IO/Mbar
signal.
After allowing sufficient time for data to become stable, it asserts the write (WRbar)
signal.
The IO/Mbar and WRbar signals can be combined to generate the MEMWbar
control signal that enables the input buffer of the memory chip and stores the byte in
the selected memory register.
Memory Interfacing
Memory Interfacing
Address Decoding
12 address lines are connected to the memory chip , and the remaining four address
lines (A15-A12) of the 8085 microprocessor must be decoded.
Memory Interfacing
Address Decoding
Two methods are used for decodeing these lines:
(1) By using a NAND gate
(2) By using a 3-to-8 decoder
Memory Interfacing
Interfacing Circuit
Memory Interfacing
Interfacing Circuit
Memory Interfacing
Interfacing Circuit
Memory Interfacing
Interfacing Circuit
Memory Interfacing
Address Decoding and Memory Addresses
Memory Interfacing
When the 8085 asserts the RD bar signal, the output buffer is enabled and the
contents of the Register 0FFFH are placed on the data bus for the processor to read.
Memory Interfacing
Interfacing the 8155 Memory Segment
Example: Designing Memory for the MCTS
Now we will design an interfacing circuit for the microprocessor controlled
temperature system
Testing and Troubleshooting Memory Interfacing Ckts
Troubleshooting microprocessor based system
In troubleshooting analog circuits a commonly used technique is signal injection.

To use this concept we need to generate a constant and identified signal and check
various points in relation to that signal.
We can generate such a signal by asking the processor to execute a continuous loop
called diagnostic routine
Diagnostic routine to generate a steady signal




Interfacing I/O Devices
In the peripheral I/O, the instructions IN/OUT are used for data transfer, and the
device is identified by an 8-bit address.
In the memory-mapped I/O, memory related instructions are used for data transfer,
and the device is identified by a 16-bit address.
Similarly, the instruction IN can be used to accept data from 256 different input ports
I/O Execution
OUT instruction 8085
The 8085 executes the OUT instruction in three machine cycles and it takes ten T-
states (clock periods) to complete the execution.
I/O Execution
I/O Execution
I/O Execution
IN instruction 8085
I/O Execution
IN instruction 8085
I/O Execution
I/O Execution
Device Selection and Data Transfer
When should we enable the latch to catch that

information?
What should be the address of that

latch?
I/O Execution
The latch should be enabled when IO/M bar is high and WRbar is active low.
I/O Execution
I/O Execution
I/O Execution
Absolute vs Partial Decoding
In above figure all 8 address lines are decoded to generate one unique output pulse
the device will be selected only with address 01H. This called absolute decoding.
I/O Execution
Absolute vs Partial Decoding
The output port (latch) can be accessed by the Hex addresses 00, 01, 02 and03. The
partial decoding is a commonly used technique in small system.
Such multiple addresses will not cause any problems, provided these addresses are
not assigned to any other output ports
I/O Execution
Input Interfacing
I/O Execution
Interfacing I/O Using Decoders
Step1: Here we use a 3-to-8decoder and a 4

input NAND gate.
The address lines A2, A1,and A0 are used as
input to decoder, and A7-A3 are used to enable
the decoder.
The address line A7 is directly connected to E3
(active high enable line), and the address lines
A6-A3 are connected to E1 bar and E2 bar
(active low enable lines) using the NAND gate.
The decoder has eight output lines thus we can
use this circuit to generate eight device address
pulses for eight different addresses.
I/O Execution
Step2:
The second step is to combine
the decoded address with an
appropriate control signal to
generate the I/O select pulse.
The output O0 of the decoder

is logically ANDed in a
Negative AND gate with the
LOW bar control signal.
The output of the gate is the

I/O select pulse for an output
port.
I/O Execution
Step3 :
The third step is to use pulse (generated in second step) to enable the output port.
Figure shows that the I/O select pulse enables the LED latch with the output port
address F8H.
I/O Execution
Step3 :
The third step is to use pulse (generated in second step) to enable the output port.
Figure shows that the I/O select pulse enables the LED latch with the output port
address F8H.
Interfacing Output Displays
Illustration: LED Display for binary data
Address bus A7-A0 is decoded by
using an 8input NAND gate.
The output of the NAND gate goes
low only when the address lines carry
the address FFH.
The output of the NAND gate is
combined with the microprocessor
control signal IOW bar in a NOR gate.
The output of NOR gate goes high to
generate an I/O select pulse when both
inputs are low.
Meanwhile the contents of the
accumulator have been put on the data
bus.
The I/O select pulse is used as a clock

pulse to activate the D-type latch, and
the data are latched and displayed.
In this circuit the LED cathodes are
connected to the Qbar output of the
latch.
When The data line (Do) has 1, the
output Qbar is o and corresponding
LED is turned ON
Here we use 74LS373 octal latch as

an interfacing device.
The 74LS373 includes D-latches
followed by tri-state buffers.
This device has two control signals:
Enable (G) to clock data in theflip
flops and output control (OC bar) to
enable the buffers.
Illustration: Seven Segment LED Display as an output
The seven segments A through G, are usually connected to data line D0 through D6,
respectively.
If the decimal point segment is being used, data line D7 is connected to DP otherwise
it is left open.
The binary code required to display a digit is determined by the type of the 7 segment
LED (Common anode or common cathode)
For example, to display digit 7 at the LED

Interfacing Input Devices
Illustration: Data Input from DIP switches
Now we analyze the circuit used for interfacing eight DIP switches
The circuit includes the 74LS138 3 to 8 decoder to decode the low order bus and the
tri state octal buffer to interface the switches to the data bus.
Interfacing Circuit
When a switch is closed, it has logic 0 and when it is open, it is tied to+5V,
representing logic 1.
In Figure the switches S7-S0 are open and S2-S0 are closed; thus the input reading
will be F8H.
Memory Mapped I/O
Memory Mapped I/O
The STA is a three byte instruction The first byte is the opcode and the second and
third bytes specify the memory address.
The 16 bit address 8000H is entered in the reverse order.
In this example, if an output device, instead of a memory register, is connected at
this address, the accumulator contents will be transferred to the output device,
This is called memory-mapped I/O technique.
Memory Mapped I/O
The instruction LDA (Load Accumulator Direct) transfers the data from a memory
location to the accumulator.
The LDA is also a 3 byte instruction: the second and thrid bytes specify the
memory location.
In the memory mapped I/O technique, an input device is connected instead of a

memory.
The input device will have the 16 bit address specified by the LDA instruction.
When the microprocessor executes the LDA instruction, the accumulator recives
data from the input device rather than from a memory location.
Memory Mapped I/O
Execution of Memory-Related Data Transfer Instructions
Memory Mapped I/O
Execution of Memory-Related Data Transfer Instructions
Memory Mapped I/O
Device selection and data transfer in memory-mapped I/O require three steps:
Memory Mapped I/O
Illustration: Safety Control System Using Memory-Mapped I/O
technique
Figure shows a schematic of interfacing I/O devices using the memory-mapped I/O
technique.
The circuits includes one input port with Eight DIP switches and one output port to
control various processes and gates (which are turned on/off by the microprocessor
according to the corresponding switch position)
Memory Mapped I/O
technique
Memory Mapped I/O
technique
Output Port and its Address
If an output bit of the
74LS373 is high, it activates
the corresponding relay and
turns on the process; the
process remains on until the
bit stays high.
The 74LS373 is a latch followed by a tri-state buffer is shown in Figure.
The latch and the buffer are controlled independently by the Latch Enable (LE)
and Output Enable (OE bar).
When LE is high, the data enter the latch, and when LE goes low, data are latched.
The latched data are available on the output lines of the 74LS373 if the buffer is
enabled by OE bar (active low).
If OE bar is high, the output lines go into the high impedance state.
Memory Mapped I/O
technique
In figure OE bar is connected
to the ground (the latched data
will keep the relays on/off
according to the bit pattern).
The LE is connected to the

device select pulse, which is
asserted when the output O0
of the decoder and the control
signal MEMW bar go low.
Memory Mapped I/O
technique
Input Port and its Address
Memory Mapped I/O
technique
Instruction
Memory Mapped I/O
Testing and Troubleshooting I/O
Interfacing Circuits
Fixed-Point Arithmetic
Most of the real time signal processing algorithms have to operate on floating
point numbers. Algorithms that are implemented in high-level languages have
native support of floating-point math operations.
When such algorithms are used in systems with processors that have support for
only integer math, significant overhead occurs both in terms of memory and
performance. For such processors, fixed point numbers are used.
Q-format (short form to represent fixed-point) is representation of decimal data

into a specific format which accommodates sign bit, integer bits and fractional
bits.
Fixed-Point Notation
A K-bit fixed-point number can be interpreted as either:
an integer (i.e., 20645)
a fractional number (i.e., 0.75)
Fixed-Point Arithmetic
Integer Fixed-Point Representation
N-bit fixed point, 2’s complement integer representation
Difficult to use due to possible overflow

In a 16-bit processor, the dynamic range is-32,768 to 32,767.
Example:
200 × 350 = 70000, which is an overflow!
Fractional-Point Arithmetic
Fractional Fixed-Point Representation
• Also called Q-format
• Fractional representation suitable for DSP algorithms.
• Fractional number range is between 1 and -1
• Multiplying a fraction by a fraction always results in a fraction and will not
produce an overflow (e.g., 0.99 x 0.9999 less than 1)
• Successive additions may cause overflow
• Represent numbers between
• Q represents the “Quantity of fractional bits”

• Number following the Q indicates the number of bits that are used for the
fraction.
• Q15 used in 16-bit DSP chip, resolution of the fraction will be 2^–15
•Q15 means scaling by 1/215
• Q15 means shifting to the right by 15
Truncation
• Magnitude of truncated number always less than or equal to the original value
Rounding
• Magnitude of rounded number could be smaller or greater than the original
value
• Error tends to be minimized (positive and negative biases)
Popular technique: rounding to the nearest integer
Example:
INT[251.2] = 251 (Truncate or floor)
ROUND [ 251.2] = 252 (Round or ceil)
ROUNDNEAREST [251.2] = 251
Q format Multiplication
Product of two Q15 numbers is Q30.
So we must remember that the 32-bit product has two bits in front of the binary
point.
Since NxN multiplication yields 2N-1 result
Addition MSB sign extension bit
General Fixed-Point Representation
Qm.n notation
• m bits for integer portion
• n bits for fractional portion
• Total number of bits N = m + n + 1, for signed numbers
Example: 16-bit number (N=16) and Q2.13 format

2 bits for integer portion
13 bits for fractional portion
1 signed bit (MSB)
Special cases:
16-bit integer number (N=16) => Q15.0 format
16-bit fractional number (N = 16) => Q0.15 format; also known as Q.15 or
Q15
General Fixed-Point Representation
N-bit number in Qm.n format:
Value of N-bit number in Qm.n format:

How to Compute Fractional Number
Example

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Microprocessors & Microcontroller Applications

Microprocessors & Microcontroller Applications

Microcontroller –silicon chip which includes microprocessor, memory & I/O in a

What about micro?

In the early 1970’s the microchip was invented.

Lets expand each of the Red Bold words:

Programmable device: The microprocessor can perform different sets of operations on

Instructions: Each microprocessor is designed to execute a specific group of

When a program is entered into a computer, it is stored in memory. Then as the

The results must be presented on an output device.

Analog Between Microprocessor and Human brain

Every μp recognizes and produces a group of bits called word.

Thereafter, the 80186 processor was designed in 1982.

The Pentium Pro is a sixth-generation x86 microprocessor developed and introduced

The Pentium II processors refer to Intel’s sixth-generation micro-architecture called

The Pentium III processors were based on the sixth-generation Intel P6

Example: Hexadecimal 30H to 39h represents 0 to 9 digits

The features of 8085 microprocessors are given below:

HLDA pin is used to respond to the HOLD request.

In the memory read operation, data will be read from memory

In the 8085 microprocessor, the data size is 8 bits.

8085 microprocessor has 11 control lines, namely

After that, the

Figure show 5 different groups

Address and data bus are

Dashed straight line indicated

The low order memory address

ALE signal goes high

The RD bar signal causes 4FH

The task is completed in T4

The status of each flip-flop is known as a flag.

This register is known as flag register and it is adjacent to the accumulator.

Flags are used in the decision-making process of the microprocessor.

Parity Flag: After an arithmetic or logical operation, if the number of 1s in the

Auxiliary carry Flag : In arithmetic operations of numbers, if a carry is generated

Four input lines and four output lines and can

Four registers with eight cells are arranged in a sequence.

Memory Word Size

The OR gates functionally connected as negative NAND gate s

The IO/M bar

There is a quartz window on the chip

Once the chip is programmed, the

The Microprocessor should

Troubleshooting microprocessor based system

In troubleshooting analog circuits a commonly used technique is signal injection.

Diagnostic routine to generate a steady signal

Diagnostic routine to generate a steady signal

Diagnostic routine to generate a steady signal

Diagnostic routine to generate a steady signal

When should we enable the latch to catch that

What should be the address of that

Step1: Here we use a 3-to-8decoder and a 4

The output O0 of the decoder

The output of the gate is the

The I/O select pulse is used as a clock

Here we use 74LS373 octal latch as

For example, to display digit 7 at the LED

Illustration: Data Input from DIP switches

In the memory mapped I/O technique, an input device is connected instead of a