Lab 15
Lab 15
Lab 15
Lab 15
The Ripple Counter
OBJECTIVES
COMPONENTS REQUIRED
THEORY
A counter is a register capable of counting number of clock pulse arriving at its clock input.
Counter represents the number of clock pulses arrived. A specified sequence of states appears as
counter output. This is the main difference between a register and a counter. There are two types
of counter, synchronous and asynchronous. In synchronous common clock is given to all flip
flop and in asynchronous first flip flop is clocked by external pulse and then each successive flip
flop is clocked by Q or Q output of previous stage. A soon the clock of second stage is triggered
by output of first stage. Because of inherent propagation delay time all flip flops are not activated
at same time which results in asynchronous operation.
Fig: 10-1
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Digital Logic Design By Muhammad Hammad
Fig:10-2
TRUTH TABLE
CLK QA QB QC QD
0 0 0 0 0
1 1 0 0 0
2 0 1 0 0
3 1 1 0 0
4 0 0 1 0
5 1 0 1 0
6 0 1 1 0
7 1 1 1 0
8 0 0 0 1
9 1 0 0 1
10 0 1 0 1
11 1 1 0 1
12 0 0 1 1
13 1 0 1 1
14 0 1 1 1
15 1 1 1 1
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Digital Logic Design By Muhammad Hammad
Fig:10-3
TRUTH TABLE
CLK QA QB QC QD
0 0 0 0 0
1 1 0 0 0
2 0 1 0 0
3 1 1 0 0
4 0 0 1 0
5 1 0 1 0
6 0 1 1 0
7 1 1 1 0
8 0 0 0 1
9 1 0 0 1
10 0 0 0 0
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Digital Logic Design By Muhammad Hammad
Fig:10-4
TRUTH TABLE
CLK QA QB QC QD
0 0 0 0 0
1 1 0 0 0
2 0 1 0 0
3 1 1 0 0
4 0 0 1 0
5 1 0 1 0
6 0 1 1 0
7 1 1 1 0
8 0 0 0 1
9 1 0 0 1
10 0 1 0 1
11 1 1 0 1
12 0 0 0 0
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Digital Logic Design By Muhammad Hammad
PROCEDURE
REVIEW QUESTIONS
1. Counters can be used as frequency dividers. When the clock frequency in Fig:9-2 was 1
kHz, what was the output frequency of flip-flop A and flip-flop B?
fA= _________________________________
fB= _________________________________
2. Would inverters on the clock inputs change the count direction of a ripple counter?
3. How many flip-flops are needed to build a moduIus-5 counter?
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