Location via proxy:   [ UP ]  
[Report a bug]   [Manage cookies]                
Scribd Logo
Upload

Welcome to Scribd!

  • 27 views

    Lab 15

    Uploaded by

    ALISHBA AZAM
    The document describes the design and operation of ripple counters, including 4-bit, mod-10, and mod-12 ripple counters. It contains the objectives, components required, theory of operation, pin diagrams, logic diagrams, and truth tables for each counter. A ripple counter uses cascaded flip-flops in which the clock of each subsequent stage is triggered by the output of the previous stage, resulting in asynchronous operation. The counters can be used as frequency dividers, with the output frequency of each stage being half the input frequency.

    Copyright:

    © All Rights Reserved
    Download as PDF, TXT or read online from Scribd

    Lab 15

    Uploaded by

    ALISHBA AZAM
    27 views5 pages
    The document describes the design and operation of ripple counters, including 4-bit, mod-10, and mod-12 ripple counters. It contains the objectives, components required, theory of operation, pin diagrams, logic diagrams, and truth tables for each counter. A ripple counter uses cascaded flip-flops in which the clock of each subsequent stage is triggered by the output of the previous stage, resulting in asynchronous operation. The counters can be used as frequency dividers, with the output frequency of each stage being half the input frequency.

    Original Description:

    RIPPLEC OUNTER

    Copyright

    © © All Rights Reserved

    Available Formats

    PDF, TXT or read online from Scribd

    Did you find this document useful?

    Is this content inappropriate?

    The document describes the design and operation of ripple counters, including 4-bit, mod-10, and mod-12 ripple counters. It contains the objectives, components required, theory of operation, pin diagrams, logic diagrams, and truth tables for each counter. A ripple counter uses cascaded flip-flops in which the clock of each subsequent stage is triggered by the output of the previous stage, resulting in asynchronous operation. The counters can be used as frequency dividers, with the output frequency of each stage being half the input frequency.

    Copyright:

    © All Rights Reserved
    Download as PDF, TXT or read online from Scribd
    Download as pdf or txt
    27 views5 pages

    Lab 15

    Uploaded by

    ALISHBA AZAM
    The document describes the design and operation of ripple counters, including 4-bit, mod-10, and mod-12 ripple counters. It contains the objectives, components required, theory of operation, pin diagrams, logic diagrams, and truth tables for each counter. A ripple counter uses cascaded flip-flops in which the clock of each subsequent stage is triggered by the output of the previous stage, resulting in asynchronous operation. The counters can be used as frequency dividers, with the output frequency of each stage being half the input frequency.

    Copyright:

    © All Rights Reserved
    Download as PDF, TXT or read online from Scribd
    Download as pdf or txt
    of 5

    Digital Logic Design By Muhammad Hammad

    Lab 15
    The Ripple Counter
    OBJECTIVES

    After completing this experiment, you will be able to:


    • Design and verify 4 bit ripple counter
    • Design and verify mod 10/ mod 12 ripple counter
    • Explain how the counter is a frequency divider

    COMPONENTS REQUIRED

    • Two 7476 JK flip flop ICs


    • One 7400, 2 I/P NAND gate

    THEORY
    A counter is a register capable of counting number of clock pulse arriving at its clock input.
    Counter represents the number of clock pulses arrived. A specified sequence of states appears as
    counter output. This is the main difference between a register and a counter. There are two types
    of counter, synchronous and asynchronous. In synchronous common clock is given to all flip
    flop and in asynchronous first flip flop is clocked by external pulse and then each successive flip
    flop is clocked by Q or Q output of previous stage. A soon the clock of second stage is triggered
    by output of first stage. Because of inherent propagation delay time all flip flops are not activated
    at same time which results in asynchronous operation.

    PIN DIAGRAM FOR IC 7476

    Fig: 10-1

    1|Page
    Digital Logic Design By Muhammad Hammad

    LOGIC DIAGRAM FOR 4 BIT RIPPLE COUNTER

    Fig:10-2

    TRUTH TABLE

    CLK QA QB QC QD

    0 0 0 0 0
    1 1 0 0 0
    2 0 1 0 0
    3 1 1 0 0
    4 0 0 1 0
    5 1 0 1 0
    6 0 1 1 0
    7 1 1 1 0
    8 0 0 0 1
    9 1 0 0 1
    10 0 1 0 1
    11 1 1 0 1
    12 0 0 1 1
    13 1 0 1 1
    14 0 1 1 1
    15 1 1 1 1

    2|Page
    Digital Logic Design By Muhammad Hammad

    LOGIC DIAGRAM FOR MOD - 10 RIPPLE COUNTER:

    Fig:10-3

    TRUTH TABLE

    CLK QA QB QC QD
    0 0 0 0 0
    1 1 0 0 0
    2 0 1 0 0
    3 1 1 0 0
    4 0 0 1 0
    5 1 0 1 0
    6 0 1 1 0
    7 1 1 1 0
    8 0 0 0 1
    9 1 0 0 1
    10 0 0 0 0

    3|Page
    Digital Logic Design By Muhammad Hammad

    LOGIC DIAGRAM FOR MOD - 12 RIPPLE COUNTER

    Fig:10-4

    TRUTH TABLE

    CLK QA QB QC QD
    0 0 0 0 0
    1 1 0 0 0
    2 0 1 0 0
    3 1 1 0 0
    4 0 0 1 0
    5 1 0 1 0
    6 0 1 1 0
    7 1 1 1 0
    8 0 0 0 1
    9 1 0 0 1
    10 0 1 0 1
    11 1 1 0 1
    12 0 0 0 0

    4|Page
    Digital Logic Design By Muhammad Hammad

    PROCEDURE

    • Connections are given as per circuit diagram.


    • Logical inputs are given as per circuit diagram.
    • Observe the output and verify the truth table.

    REVIEW QUESTIONS

    1. Counters can be used as frequency dividers. When the clock frequency in Fig:9-2 was 1
    kHz, what was the output frequency of flip-flop A and flip-flop B?
    fA= _________________________________
    fB= _________________________________
    2. Would inverters on the clock inputs change the count direction of a ripple counter?
    3. How many flip-flops are needed to build a moduIus-5 counter?

    5|Page

    You might also like