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Part 1 - Introduction To ARM and The Basics of Microcontroller Programming

The document provides an introduction to ARM-based microcontrollers and the STM32 platform. It discusses the ARM architecture and Cortex-M cores, giving an overview of the STM32 architecture including memory mapping and peripheral interfaces. Example STM32 boards are described. The document serves as an introduction for developing microcontroller projects using the ARM and STM32 platform.

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jikru
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© © All Rights Reserved
Available Formats
Download as PDF, TXT or read online on Scribd
0% found this document useful (0 votes)
183 views

Part 1 - Introduction To ARM and The Basics of Microcontroller Programming

The document provides an introduction to ARM-based microcontrollers and the STM32 platform. It discusses the ARM architecture and Cortex-M cores, giving an overview of the STM32 architecture including memory mapping and peripheral interfaces. Example STM32 boards are described. The document serves as an introduction for developing microcontroller projects using the ARM and STM32 platform.

Uploaded by

jikru
Copyright
© © All Rights Reserved
Available Formats
Download as PDF, TXT or read online on Scribd
You are on page 1/ 61

Introduction to ARM and the Basics of

Microcontroller Programming

• An Overview of Microprocessor & Microcontroller System --- 2


• Introduction to ARM Based Processors (STM32) --- 6
• Some Basic Circuits --- 22
• Flowchart, Pseudocode & State Diagram--- 33
• Project Development --- 44
• Minimum Board & Multi-learning Shield --- 50
• References --- 61

1
An Overview of the
Microprocessor and
Microcontroller
Systems

2
Microprocessor System

3
Microprocessor Bus System

4
Microcontroller System

5
Introduction to ARM
Based Processors
Advanced RISC Machines = Acorn RISC Machine

6
ARM - Introduction

(1) ARM - a families of Reduced Instruction Set Computing


(RISC) architectures

 ARM - an acronym for: Advanced RISC Machines


 (2) ARM Holdings develops the instruction set and architecture for ARMbased
products
 There are many silicone manufacturers that develop, produce and sell
microcontrollers based on ARM architecture and core.
o ST Microelectronics is the only manufacturer selling a complete portfolio of Cortex-
M based processors.
 ARM based products have become extremely popular
o > 50 billion ARM processors produced in 2014
o equip about 75 percent of the world’s mobile devices, for example Apple’s iPhone are
based on an ARM architecture (ARMv8-A).

(3) ARM - Several families of complete cores which are the


building blocks (core) of CPUs produced by many silicon
manufacturers
7
ARM Cortex is a wide set of 32/64-bit architectures and cores really popular in the embedded world. Cortex microcontrollers are
divided into three main subfamilies:
Cortex-A, which stands for Application
- providing a range of solutions for devices undertaking complex computing tasks, such as hosting a rich Operating System (OS)
platform (Linux and its derivative Android are the most common ones), and supporting multiple software applications.
- Cortex-A cores equip the processors found in most of mobile devices, like phones and tablets. In this market segment we can
find several silicon manufacturers ranging from those who sell catalogue parts (TI or Freescale) to those who produce
processors for other licensees.
- Among the most common cores in this segment, we can find Cortex-A7 and Cortex-A9 32-bit processors, as well as the latest
ultra-performance 64-bit Cortex-A53 and Cortex-A57 cores.
Cortex-M, which stands for eMbedded
- is a range of scalable, compatible, energy efficient and easy to use processors designed for the low-cost embedded market.
The Cortex-M family is optimized for cost and power sensitive MCUs suitable for applications such as Internet of Things,
connectivity, motor control, smart metering, human interface devices, automotive and industrial control systems, domestic
household appliances, consumer products and medical instruments.
- In this market segment, we can find many silicon manufacturers who produce Cortex-M processors: ST Microelectronics is one
of them.
Cortex-R, which stand for Real-Time
- offering high-performance computing solutions for embedded systems where reliability, high availability, fault tolerance,
maintainability and deterministic real-time response are essential.
- Cortex-R series processors deliver fast and deterministic processing and high performance, while meeting challenging real-
time constraints.
- They combine these features in a performance, power and area optimized package, making them the trusted choice in
reliable systems demanding fault tolerance. 8
ARM - Motivation

They are Cortex-M based MCUs: ARM has become a sort of standard in the embedded world; this is especially true for Cortex-A
processors. Investing on this platform is a good choice.

Free ARM based tool-chain: it is possible to work with completely free tool-chains, without investing a lot of money to start
working with this platform.

Know-how reuse: STM32 is a quite extensive portfolio, which is based on a common denominator: their main CPU platform. This
ensures, for example, that know-how acquired working on a given STM32Fx CPU can easily be applied to other devices from the
same family. Moreover, working with Cortex-M processors allows you to reuse much of the acquired skills if you (or your boss)
decide to switch to Cortex-M MCUs from other vendors (assumption).

Pin-to-pin compatibility: most of STM32 MCUs are designed to be pin-to-pin compatible inside the extensive STM32 portfolio.

5V tolerant: Most STM32 pins are 5V tolerant. Level shifter is not required to interface other devices that do not provide 3.3V
I/O . Microcontroller interfacing to target device/s becoming easier.
32 cents for 32 bit: STM32F0 is the right choice if you want to migrate from 8/16-bit MCUs to a powerful and coherent platform,
while keeping a comparable target price. You can use an RTOS to boost your application and write much better code

Integrated bootloader: STM32 MCUs are equipped with an integrated bootloader, which allows the reprogramming of internal
flash memory using several communication peripherals (USART, I²C, etc.).
9
ARM - Disadvantages
Learning curve: STM32’s learning curve can be quite steep, especially for inexperienced users. ST documentation has not been
the best for inexperienced people, too vague and without clear examples.

Lack of official tools: ST does not provide a decent formal development environment (previously) like other manufacturers for
example Microchip. In fact, stm32CubeIDE was launched in 2019.

Fragmented and dispersive documentation: It is indeed a very large database on the ST website, but there is still a lack of good
documentation especially for its HAL. For beginners to the STM32 ecosystem and the Cortex-M world face, it is a very difficult
journey. We are trying to write a book to overcome this abyss.

Buggy HAL: HAL from ST contains some bugs, and some of them are really severe and cause confusion in beginners.

Lack of MCUs for the IoT: The Internet of Things is a current trend in electronics. Just recently (2019), ST launched MCU for IoT
applications.

10
CORTEX M0 – Functional Block Diagram

The CM0 core has a Harvard


architecture meaning that it
uses separate interfaces to
fetch instructions (Inst) and
(Data).

The interface between the


Cortex-M0 and manufacturer
specific hardware is through
three memory buses–ICode,
DCode, and System – which
are defined to access
different regions of memory.

11
The STM32L0xx Architecture The 32-Bit Multilayer AHB Busmatrix connects the Master device to the Slave device
Allowing several masters on the bus to communicate with slaves simultaneously.
Cortex®-bus connects the DCode/ICode bus of
the Cortex®-M0+ core to the BusMatrix. This
bus is used by the core to fetch instructions, get
data and access the AHB/APB resources.

DMA-bus connects the AHB master interface of


the DMA to the BusMatrix which manages the
access of the different masters to Flash memory
and data EEPROM, the SRAM and the
AHB/APB peripherals
The BusMatrix is composed of two masters
(CPU, DMA) and three slaves (NVM interface,
SRAM, AHB2APB1/2 bridges).

APB1 and APB2 operate at a maximum


frequency of 32 MHz
AMBA - ARM Advanced Microcontroller Bus Architecture
AHB - AMBA High-performance Bus
APB - Advanced Peripheral Bus
CPU – Central Processing Unit
DMA – Direct Memory Access
DRAM – Dynamic Random Access Memory
EEPROM – Electrically Erasable Programmable Read Only Memory
NVM – Non-volatile Memory
SRAM – Static Random Access Memory
RNG – Random Number Generator
CRC – Cyclic Redundancy Check 12
AES – Advanced Encryption Standard
The STM32L053x6/8 Block Diagram

In the STM32, the ICode bus connects the CM0


instruction interface to Flash Memory

The DCode bus connects to Flash memory for


data fetch and the System bus provides
read/write access to RAM and the STM32
peripherals

The peripheral sub-system is supported by the


AHB bus which is further divided into two sub-
bus regions AHB1 and AHB2. The STM32 provides
a sophisticated direct memory access (DMA)
controller that supports direct transfer of data
between peripherals and memory.

13
The STM32L053x6/8 Memory Map

• Program memory, data memory, registers and I/O ports are organized
within the same linear 4-Gbyte address space.
• The bytes are coded in memory in Little Endian format.
• The lowest numbered byte in a word is considered the word’s least
significant byte and the highest numbered byte the most significant.
• The addressable memory space is divided into 8 main blocks, of 512
Mbytes each

14
General-purpose inputs/outputs (GPIOs)

Each of the GPIO pins can be configured by software as output (push-pull or open-
drain), as input (with or without pull-up or pull-down) or as peripheral alternate
function. Most of the GPIO pins are shared with digital or analog alternate
functions, and can be individually remapped using dedicated alternate function
registers. All GPIOs are high current capable. Each GPIO output, speed can be
slowed (40 MHz, 10 MHz, 2 Hz, 400 kHz). The alternate function configuration of
I/Os can be locked if needed following a specific sequence in order to avoid
spurious writing to the I/O registers. The I/O controller is connected to a dedicated
IO bus with a toggling speed of up to 32 MHz.

15
General-purpose inputs/outputs (GPIOs) – Block Diagram

16
Basic structure of a 5-Volt tolerant I/O port bit

17
Input floating/pull up/pull down configurations

18
Output configuration

19
Alternate function configuration

20
High impedance analog configuration

21
Some basic circuits
Important for microcontroller connection to another device

22
Logic level – TTL & CMOS STANDARD TTL Typical
𝑉 ( ) 2.4𝑉 3.6𝑉
𝑉 ( ) 0.4𝑉 0.2𝑉
𝑉 ( ) 2.0𝑉
𝑉 ( ) 0.8𝑉

𝑉 𝑉 ( )
( ) STANDARD CMOS
Typical
𝑉 ( ) 𝑉 ( ) 𝑉 − 0.05 ≈𝑉
𝑉 ( )
𝑉 ( ) 𝑉 +0.05 ≈𝑉
𝑉 ( ) 0.7 𝑉
𝑉 ( ) 0.3 𝑉
𝑉 ( )

𝑉 ( ) 𝑉 ( ) Minimum output voltage at logic High


𝑉 ( ) Maximum output voltage at logic Low
𝑉 ( ) Minimum input voltage at logic High
𝑉 ( )
𝑉 ( ) Maximum input voltage at logic Low
𝑉 ( )
23
Loading characteristics - (Selected TTL & CMOS)

In the data sheet, they are –ve,


which shows the flow of the
current, not the magnitude of
the current

𝐼 Output current at logic High


𝐼 Output current at logic Low
𝐼 Input current at logic High
𝐼 Input current at logic Low

24
Current sourcing and sinking

25
Some definitions.

Active low switch: Switch produces logic ‘0’ when pressed, other case logic ‘1’
Active high switch: Switch produces logic ‘1’ when pressed, other case logic ‘0’

Active low LED: LED is activated (GLOW) when logic ‘0’ is applied.
Active high LED: LED is activated (GLOW) when logic ‘1’ is applied.

26
Active low & high outputs – TTL & CMOS

𝑉 ( ) −𝑉 ( )
𝑅 ≥
𝐼 ( )

𝑉 −𝑉 ( ) 𝑉 ( )
𝑅 ≥ 27
𝐼 ( )
Active low & high inputs – TTL & CMOS
𝑉 − 𝑉 ( )
𝑅 ≤
𝐼 ( )

𝑉 − 0.9𝑉
𝑅 =
𝐼 ( )

𝑉 ( ) −𝐺
𝑅 ≤
𝐼 ( )

0.5𝑉 ( )
𝑅 =
𝐼 ( )
28
Note: the equation ensures that the logic retains logic ‘1’ and logic ‘0’.
Pull Up

Require Require
No pull up/down pull up

29
Pull Down

Require Require
No pull up/down pull up

30
Open Drain/Collector

For connections that require only ground or Logic ‘0’.


31
Example of a driving (ON/OFF) motor.
Push pull

Sometimes
Require
No pull up/down

For connections that require


Logic ‘0’ AND ‘1’. Example of a
driving logic gate.

32
Flowcharts, Pseudocode
& State Machines
• Techniques for representing workflows or processes,
algorithms, step -by -step approaches to completing tasks

33
Flowcharts
Definition: A flowchart is a picture of the separate steps of a process in sequential order. It is
a generic tool that can be adapted for a wide variety of purposes, and can be used
to describe various processes, such as a manufacturing process, an administrative or
service process, or a project plan.
https://asq.org/quality-resources/flowchart
A graphical representation of a computer program in relation to its sequence of
functions

34
Flowchart
Block Propose Solution
Direct the codes development

TERMINATOR start/stop/end/return

PROCESS Such x <= y

DATA Such get SW1

PREDEFINED
function/ subroutine such delay_ms
PROCESS

DECISION Such SW1 closed?

35
Example Flowchart - Jackpot 1

36
Example Flowchart - Jackpot 2
SortToken

reg1<=reg1&3
reg2<=reg2&3
reg3<=reg3&3
T<=0

all regs =3? no


any regs =3? no

yes all regs equal?


yes no
yes

T<=1 T<=2 T<=3

return T

37
Pseudocode
Definition: Pseudocode is an artificial and informal language that helps
programmers develop algorithms. Pseudocode is a "text-based" detail
(algorithmic) design tool. The rules of Pseudocode are reasonably
straightforward. All statements showing "dependency" are to be indented.
Available at: https://www.unf.edu/~broggio/cop2221/2221pseu.htm

38
Example Pseudocode - Jackpot 1

Initialize counter to zero


While button is not pressed
roll variable seeds // seeds++
Transfer [seeds] into var reg2,reg1,reg0
Do
roll seeds => reg0 // reg0=reg0^(seeds>>1);
roll seeds => reg1
roll seeds => reg2
While button is pressed
Toggle led indicator 5 times (at an interval 200ms)
Limit all regs by 2-bit
Display all regs
Sort and display scores

39
State Machines
Definition: A state diagram is a type of diagram used in computer
science and related fields to describe the behavior of systems.
Available at: https://en.wikipedia.org/wiki/State_diagram

40
Example State Machine – Using switch construct
IN
Normally uses switch case construct – allows only 1 sub-task to be processed at a time
Moving across the state is determined by flag/state
Flag/state can be fixed or modified in the program
s0? F Program can be added or removed easily
T s1? F
T
s2? F
Sub-task0
Sub-task1 T s3? F
T
Sub-task2
Sub-task3
Sub-task(n-1)

OUT
41
Example State Machine - Jackpot 1

Divide the entire task into sub-tasks as small as possible 42


Arrange all subtasks into logical connections
Project Development
An insight view

43
Project Development

Control Validate

Assurance Verify

44
DEFINE
To clearly state accomplishment of the project
WHY? To study feasibility of the project
To ensure the project can, in fact be accomplished

Describe in “details” What the device is to do?


HOW? Provide specification that fully describe the function of the project
Provide anticipate budget, resources required & time plan
Macro-level block diagram
RESULTS? * Shows in general the circuit/s that will make up the project
* Reasonably ascertain that the project will work
Complete set of specifications
• Electrical/functional specifications
• Operating specifications – detail operation or/and human interfacing

Project proposal
•Summarize the definition phase
•Summarize the research and feasibility testing
•Written list of specifications
•Anticipated budget
•Schedule of completion
Note: This is also known as the Feasibility study •Investment result in a successful outcome 45
DESIGN
FILL in the MACRO BLOCKS with actual circuitry
WHAT? FORM the flowchart/software outline the project software

HARDWARE DESIGN STEPS


1-Detail the macro block given in definition phase
2-Thoroughly research both relevant components and circuits for the blocks
3-Develop a tentative circuit schematic for each of the blocks
4-Create an overall schematic for the project
HOW? SOFTWARE DESIGN STEPS
1-List the tasks to be completed by the software
2-Prioritize and determine which TASKS need to be handled on an interrupt basis
3-Create a software flowchart or outline for each interrupt function.
4-Create a software flowchart or outline for each others project’s task.

1- Detailed/tentative block diagram


RESULTS? 2- Complete set of schematics
3- Set of software flowcharts or outlines
46
BUILD AND TEST PROTOTYPE
o Ensures the correct input signal is applied to the controller
WHY? o Ensures the correct output of the controller drive the output
circuitry in the expected manner
o Thus, minimizes/burdens the problem into software

CONSTRUCT AND TEST THE CIRCUIT


HOW? 1. Construct the circuit (sub-blocks)
2. Test each sub-block against functional test listed

 Use actual input and output devices wherever possible


 Use simulated input if required

RESULTS? TESTED FUNCTIONAL HARDWARE PROTOTYPE

47
SOFTWARE DEVELOPMENT & SYSTEM INTEGRATION

WHAT? Writing and testing the software against the project specifications

Writing and testing the software


1. Use simple function to exercise each of input and output device functions
HOW? 2. Individually test each of the functions
3. Write overall software in stepwise fashion +++++++++++

 Start with code for output devices, example a display

RESULTS? Fully working project using the real or simulated input output

48
SYSTEM TEST

WHY? GAIN CUSTOMER ACCEPTANCE

1. Put the project into use


HOW? 2. Test in accordance with the final specification developed earlier

 Demonstration for the customer

RESULTS? Fully working project

Credit to Barnet et. all


49
An overview Nucleo-L053R8 ,
bluepill-F103 & Arduino Multi-
learning board

50
NUCLEO-L053R8 – Printed Circuit Board Look

51
NUCLEO-L053R8 – Pin Assignment

52
ST morpho connector on NUCLEO-L053R8

1. Default state of BOOT0 is 0. It can be set to 1 when


a jumper is on pin5-7 of CN7.Two unused jumpers
are available on CN11 and CN12 (bottom side of the
board).
2. U5V is 5 V power from ST-LINK/V2-1 USB connector and it
rises before +5V.
3. PA13 and PA14 share with SWD signals connected to ST-
LINK/V2-1, it is not recommend to use them as IO pins if
ST-LINK part is not cut.
4. Refer to Table 10: Solder bridges for details.

53
Arduino connectors on NUCLEO-L053R8

54
NUCLEO-L053R8 – Circuit Diagram (en.DM00105823)

55
NUCLEO-L053R8 – Blue Push Button & Green LED Circuit Diagram
(en.DM00105823)

Active low switch configuration


Active high LED configuration

56
Arduino Multi-Learning Shield

Features
 3 x active low push button
 4 x active low LEDs
 1 x active buzzer
 1 x on-board preset (0 – 5v)
 1 x 4-multi 7-segment (common anode)
 4 x servo/dc motor terinal (5v)
 2 x external analog input (LM35)

57
Arduino Multi Functions Learning Shield – Circuit Diagram

58
Bluepill STM32F103C8T6 – Pin Assignment

59
* Please refer to DocID13587 Rev 17.pdf for detail of STM32F103C8T6
Bluepill STM32F103C8T6 – Schematic Circuit

60
References
[1] STML0x3 Data Sheet, DocID025844 Rev 7, October 2016
[2] STML0x3 Reference Manual, DocID025274 Rev 3, RM0367, May 2015
[3] Cortex®-M0 Programming manual, PM0223 Rev 5, October 2019
[4] STM32™ Nucleo boards, DocID025838 Rev 5, NUCLEO-XXXXRX, September 2014
[5] blue pill STM32 based, available at https://stm32-base.org/boards/STM32F103C8T6-Blue-Pill.html

61

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