P2 LM#01 Ecec0224 Rodriguez
P2 LM#01 Ecec0224 Rodriguez
P2 LM#01 Ecec0224 Rodriguez
0224
Module Overview
Module Overview
Introduction
Amplifiers are circuit that can make a weak signal to have enough power at the output to be
process by the intended receiver. These signals vary in frequency. An amplifier can be
designed to accept a certain range of frequency and reject other signal outside of its range.
This is called Amplifier Frequency Response. A fundamental knowledge needed in the
analysis of frequency response of amplifiers is the AC analysis of the transistor. In this
module a thorough AC analysis of BJT and FET will be covered in preparation for the study
of amplifier frequency response.
Learning Outcomes
• Analyze and solve problems on BJT and FET AC circuits
Duration
(Specify the number of hours allotted for this module. Likewise, specify the number of hours allotted per
topic. In a separate sheet, a calendar depicting all the deadlines and due dates may be provided for
progress monitoring.)
Delivery Mode
The delivery mode of this module will be done in online platform. It will be the combination
of synchronous and asynchronous learning.
Criteria Description %
Able to translate the thought of the problem into
Understanding circuit diagram or any visual drawing that signifies 15%
student’s understanding of the problem.
correct answer
TOTAL 100%
Pre-Assessment
Instruction: Select the best answer. Write the complete answer (do not include the letter) of
the chosen answer in a separate sheet of paper. Scanned copy or take a picture of your answer
sheet and submit it to our google classroom acct. Don’t forget to write your name at the upper
left most part of your answer sheet. Use A4 bond paper.
b. Drain terminal
c. Emitter terminal
d. Gate terminal
19. The output of a common source amplifier is measured at ______________.
a. Source terminal
b. Drain terminal
c. Emitter terminal
d. Gate terminal
20. Which of the following amplifier configuration has the highest power gain
a. Common drain
b. Common emitter
c. Common gate
d. Source follower
1.1 0224
Learning Module 01
Amplifier Circuit
Analysis
Course Packet 1.1
Objectives
• Describe the AC equivalent circuit of BJT and explain the characteristics of each amplifier
configurations.
• Solve BJT amplifier circuit parameters.
Duration
• Topic 01: BJT AC Analysis 7.5 hours
(2 hours self-directed learning with practical exercises
and 1 hour assessment)
Delivery Mode
The delivery mode of this module will be done in online platform. It will be the combination
of synchronous and asynchronous learning.
SCORE
Criteria
10 30 60 80 100
Sometimes Consistently
Promptness Seldom Often respond More often
respond to respond to
and respond to to post and respond to
discussion post in less
initiative discussion some posting post and all
and most of than 12 hours.
and late are within 24 posting are less
(30%) the posting Demonstrate
posting. hours than 24 hours
are late. self-initiative.
Consistently
Rarely post Most posts are Frequently posts topics
Rarely post
topics and short in length posts topic that related to the
topics and
Relevance of offer no and offer are related to subject matter.
always
Post further slight insight discussion Cites
makes
insight into into the topic content and additional
(50%) irrelevant
the topic with with quite prompts references
remarks to
occasional relevant to the further related to topic
the topic.
off-topics subject matter. discussion. to clarify the
idea.
You are required to post your idea or opinion based from the argument posted by the faculty
on Google Classroom stream page. This is an open online discussion where students in this
class are encourage to participate and post their idea open-mindedly.
Readings
1. Floyd, T. L. (2012). Electronic Devices (9th ed.). Prentice Hall.Supplemental reading
on an introduction to digital system to further understand the lesson
2. Malvino, A.P., Bates, D. J. (2015). Electronics Principles (8th ed.). McGraw – Hill
Education.
Shcultz, M. E. (2015). Grob’s Basic Electronics (Engineering Technologies and the Trades)
(12th ed.). McGraw – Hill Education.
BJT Analysis
Course Packet 1.1
Introduction
In previous course packet, we use capital letters for the subscript of DC parameters. For the
following discussion, lower case subscript will be used to designate AC parameters. Table 1
show the example designation of AC parameter.
An amplifier must be operated at linear region to provide an exact replica of the input signal.
This is called Linear Amplifier. One design consideration in small signal analysis is that the
transistor must be carefully bias at the center of the AC load line. Figure 1.1 shows the DC
load line of a linear amplifier. It can be observed that the Q – point is at the center of the load
line and the output signal is the exact replica of the input signal. A phase inversion of 1800
occurs between the base voltage and the collector voltage.
transistor. Table 2 shows the list of h – parameter and its corresponding description while
Table 3 shows the different h – parameters for the three BJT amplifier configurations.
Table 3: h – parameters for common – base, common – collector and common – emitter
Configuration Description
Common – Base hib ,hrb ,hfb ,hob
Common – Collector hic ,hrc ,hfc ,hoc
Common – Emitter hie ,hre ,hfe ,hoe
r – parameter
The r – parameter model is the transistor model that will be used on the succeeding
discussion in this course packet. Table 4 shows the different r – parameters and its
description. The parameter 𝑟𝑏′ has very small value that it can be neglected and replace by a
short circuit. The parameter 𝑟𝑐′ is usually in the range of hundred of kilo ohms. This large
amount of resistance can be replaced by an open circuit. Applying this approximation in r –
parameter model would simplify the AC equivalent circuit of BJT like what is shown in
Figure 4.2. The left figure shows the general r – parameter model including all the r –
parameters while the figure on the right shows a simplified r – parameter model where r –
parameters are replace with its approximate equivalent circuit.
Table 4: r - parameters
r - Parameter Description Characteristics
𝜶𝒂𝒄 𝐼 Current gain almost equal to
Alpha ac ( 𝑐⁄𝐼 )
𝑒
1
𝜷𝒂𝒄 𝐼 High current gain
Beta ac( 𝑐⁄𝐼 )
𝑏
Figure 1.2: Generalized r – parameter model (left) and simplified r – parameter model (right)
Amplifier Configurations
The BJT amplifier configuration is categorized in the manner of the placement of input and
output. The input of the amplifier is the AC input signal and the output is the AC output
signal.
1. Common – Emitter
✓ The input is placed at the base and the output is taken at the collector.
✓ Emitter terminal is “common” to the input and output side.
✓ Figure 1.4a shows a voltage divider bias, common emitter amplifier circuit.
The input a signal is coupled by a capacitor. The output collector terminal
has also a capacitor before any load can be connected. The purpose of having
a capacitor coupling at the input and output side is to preserve the DC bias
operating point.
𝑅′ = 𝑅1 ||𝑅2
𝒁𝒊 = 𝑹′ ||𝜷𝒓′𝒆
𝑍𝑜 = 𝑅𝐶 ||𝑟𝑜
𝒁𝒐 ≅ 𝑹𝑪 ; 𝒊𝒇 𝒓𝒐 ≥ 10R𝑪 (𝒖𝒏𝒍𝒐𝒂𝒅𝒆𝒅)
𝒁𝒐 = 𝑹𝑪 ||𝑹𝑳 ; (𝒍𝒐𝒂𝒅𝒆𝒅)
Voltage Gain (AV):
𝑽𝒐 −𝑹𝑪
𝑨𝒗 = = ; 𝒖𝒏𝒍𝒐𝒂𝒅𝒆𝒅
𝑽𝒊 𝒓𝒆
𝑽𝒐 −𝑹𝑪 ||𝑹𝑳
𝑨𝒗 = = ; 𝒍𝒐𝒂𝒅𝒆𝒅
𝑽𝒊 𝒓𝒆
𝑨𝒊 ≅ 𝜷| 𝒓𝒐 ≥10R𝑪 , R𝑩≥10𝜷𝒓𝒆
Power Gain (Ap):
𝑨𝒑 = 𝑨𝒗 𝑨𝒊
2. Common – Collector
✓ Also known as “Emitter Follower Circuit”
✓ Input signal is connected at the base and output is taken at the emitter.
✓ Collector is common at the input and output side of the circuit.
✓ There is no phase inversion at the output signal.
✓ High current gain but low voltage gain (A v is almost equal to 1)
✓ Power gain (Ap) is approximately equal to current gain (A i)
𝒁𝒊 = 𝑹𝑩 ||𝒁𝒃
𝒁𝒐 = 𝑹𝑬||𝒓𝒆
𝒁𝒐 ≅ 𝒓𝒆 | 𝑹𝑬 >>𝒓𝒆
Voltage Gain (AV):
𝑽𝒐 𝑹𝑬
𝑨𝒗 = =
𝑽𝒊 𝑹𝑬 + 𝒓𝒆
𝑉𝑜
𝐴𝑣 = ≅ 1| 𝑅𝐸 >>𝑟𝑒, R𝐸 +𝑟𝑒 ≅𝑅𝐸
𝑉𝑖
Current Gain (Ai):
𝒁𝒊
𝑨𝒊 = −𝑨𝒗
𝑹𝑬
Power Gain (Ap):
𝑨𝒑 ≅ 𝑨𝒊
3. Common – Base
✓ Input signal is connected at the emitter and output is taken at the collector.
✓ Base is common at the input and output side of the circuit.
✓ There is no phase inversion at the output signal.
✓ High voltage gain but low current gain (A i is almost equal to 1)
𝒁𝒐 = 𝑹 𝑪
Voltage Gain (AV):
𝑽𝒐 𝜶𝑹𝑪 𝑹𝑪
𝑨𝒗 = = ≅
𝑽𝒊 𝒓𝒆 𝒓𝒆
Example:
1. Determine the following AC parameter of a common emitter amplifier circuit.
a. r’e
b. Input impedance
c. Output impedance
d. Current gain
e. Voltage gain
f. Power gain
Solution:
Apply DC analysis to determine r’e:
Test if approximate analysis is applicable:
𝛽𝐷𝐶 𝑅𝐸 ≥ 10𝑅2
90(1𝑘Ω) ≥ 10(4.7𝑘Ω)
90𝑘Ω) ≥ 47𝑘Ω); therefore, approximate analysis can be used
𝑅2 4.7𝑘Ω
𝑉𝐵 = ( ) 𝑉𝐶𝐶 = ( ) 15𝑉 = 2.64𝑉
𝑅1 + 𝑅2 22𝑘Ω + 4.7𝑘Ω
𝐼𝐸 1.94𝑚𝐴
22𝑘Ω(4.7𝑘Ω)
𝑅′ = 𝑅1 ||𝑅2 = = 3.87𝑘Ω
22𝑘Ω + 4.7𝑘Ω
3.87𝑘Ω(13.4Ωx100)
𝑍𝑖 = 𝑅′ ||𝛽𝑟𝑒′ = = 𝟗𝟗𝟓. 𝟑𝟔𝛀
3.87𝑘Ω + (13.4Ωx100)
−𝑅𝐶 −2.2𝑘Ω
𝐴𝑣 = = = 𝟏𝟔𝟒. 𝟏𝟖
𝑟𝑒 13.4Ω
𝐴𝑝 = 𝐴𝑣 𝐴𝑖 = 164.18(100) = 𝟏𝟔𝟒𝟏𝟕. 𝟗𝟏
𝛽𝐷𝐶 𝑅𝐸 ≥ 10𝑅2
90(1𝑘Ω) ≥ 10(4.7𝑘Ω)
90𝑘Ω) ≥ 47𝑘Ω; therefore, approximate analysis can be used
𝑅2 4.7𝑘Ω
𝑉𝐵 = ( )𝑉 = ( ) 5.5𝑉 = 1.76𝑉
𝑅1 + 𝑅2 𝐶𝐶 10𝑘Ω + 4.7𝑘Ω
10𝑘Ω(4.7𝑘Ω)
𝑅′ = 𝑅1 ||𝑅2 = = 3.2𝑘Ω
10𝑘Ω + 4.7𝑘Ω
3.2𝑘Ω(2.45𝑘Ω)
𝑍𝑖 = 𝑅′||𝑍𝑏 = = 𝟏. 𝟑𝟗 𝒌𝛀
3.2𝑘Ω + 2.45𝑘Ω
1𝑘Ω(24.53Ω)
𝑍𝑜 = 𝑅𝐸 ||𝑟𝑒 = = 𝟐𝟑. 𝟗𝟒𝛀
1𝑘Ω + 24.53Ω
𝛽𝐷𝐶 𝑅𝐸 ≥ 10𝑅2
200(620Ω) ≥ 10(10𝑘Ω)
124𝑘Ω ≥ 100𝑘Ω; therefore, approximate analysis can be used
𝑅2 10𝑘Ω
𝑉𝐵 = ( )𝑉 = ( ) 24𝑉 = 7.5𝑉
𝑅1 + 𝑅2 𝐶𝐶 10𝑘Ω + 22𝑘Ω
26 𝑚𝑉 26𝑚𝑉
𝑟𝑒′ = = = 𝟐. 𝟑𝟕𝛀
𝐼𝐸 10.97𝑚𝐴
𝑍𝑜 = 𝑅𝐶 = 𝟏. 𝟐𝒌𝛀
Voltage Gain (AV):
𝑉𝑜 𝛼𝑅𝐶 𝑅𝐶 1.2𝑘Ω
𝐴𝑣 = = ≅ = = 𝟓𝟎𝟖. 𝟒𝟕
𝑉𝑖 𝑟𝑒 𝑟𝑒 2.36Ω
Power Amplifiers
Power amplifiers are called large signal amplifiers because it requires large amount of power
compare to a small signal amplifier. The power amplifier has a different design consideration
to that of the small signal amplifier. In small signal amplifier, the replication of the input
signal is very important. However, in large signal amplifier, the main concern is the amount
of power and efficiency of the amplifier circuit.
✓ DC Quiescent Power:
𝑷𝑫𝑸 = 𝑰𝑪𝑸 𝑽𝑪𝑬𝑸
Where:
𝐼𝐶𝑄 − 𝑐𝑜𝑙𝑙𝑒𝑐𝑡𝑜𝑟 𝑄 − 𝑝𝑜𝑖𝑛𝑡 𝑐𝑢𝑟𝑟𝑒𝑛𝑡
𝑉𝐶𝐸𝑄 − 𝑐𝑜𝑙𝑙𝑒𝑐𝑡𝑜𝑟 𝑡𝑜 𝑒𝑚𝑖𝑡𝑡𝑒𝑟 𝑄 − 𝑝𝑜𝑖𝑛𝑡 𝑣𝑜𝑙𝑡𝑎𝑔𝑒
✓ Output Power:
𝑽𝒄(𝐦𝐚𝐱) = 𝑰𝑪𝑸 𝑹𝒄
Where:
𝑉𝑐(max) − 𝑀𝑎𝑥𝑖𝑚𝑢𝑚 𝑐𝑜𝑙𝑙𝑒𝑐𝑡𝑜𝑟 𝑣𝑜𝑙𝑡𝑎𝑔𝑒
𝑅𝑐 − 𝑐𝑜𝑙𝑙𝑒𝑐𝑡𝑜𝑟 𝐴𝐶 𝑒𝑞𝑢𝑖𝑣𝑙𝑎𝑛𝑒𝑡 𝑟𝑒𝑠𝑖𝑠𝑡𝑎𝑛𝑐𝑒
𝑽𝑪𝑬𝑸
𝑰𝒄(𝐦𝐚𝐱) =
𝑹𝒄
𝑷𝒐𝒖𝒕(𝐦𝐚𝐱) = 𝑽𝒄(𝐦𝐚𝐱) 𝑰𝒄(𝐦𝐚𝐱)
Classes of Amplifier
1. Class A
✓ Q – point is biased at the center of the load line.
✓ The transistor is on during the full input cycle.
✓ Efficiency is up to 25%.
✓ Power Gain:
𝑷𝑳 𝑹𝒊𝒏
𝑨𝑷 = = 𝑨𝟐𝒗 ( )
𝑷𝒊𝒏 𝑹𝑳
✓ DC Quiescent Power:
𝑷𝑫𝑸 = 𝑰𝑪𝑸 𝑽𝑪𝑬𝑸
✓ Output Power:
𝑷𝒐𝒖𝒕(𝐦𝐚𝐱) = 𝟎. 𝟓𝑰𝑪𝑸 𝑽𝑪𝑬𝑸
2. Class B
✓ Q – point is biased at the cut – off.
✓ It is uses as push – pull amplifier where two class B transistors are used.
Transistor Q1 is on and Q2 is off during the 1st half off the cycle and Q2 turns
on and Q1 turns off during the 2nd half of the input cycle as shown in Figure
4.8b.
✓ The output of the two transistor is combined at the load.
✓ The transistor is on during only half of the input cycle and turns off at the
next half.
✓ It experiences cross over distortion.
✓ Efficiency is up to 50%.
The cross – over distortion is present in a class B push pull amplifier and it is
illustrated in Figure 1.8c. This cross – over distortion is introduced because of the
barrier potential present at the base emitter junction of each transistor. When the
input signal became less than 0.7V (for silicon diode) the two transistor Q1 and Q2 is
off at the same time.
Figure 4.8c: Cross – over distortion at the output of Class B push – pull amplifier
Figure 1.8d: Schematic diagram of class AB push – pull amplifier (left) and DC load line
(right)
4. Class C
✓ It is biased below the cut – off.
✓ The transistor only conducts less than 1800 of the input signal as show in
figure 4.8e.
✓ Efficiency is up to 99.99%
✓ Power dissipation and efficiency:
𝒕
➢ 𝑷𝑫(𝒂𝒗𝒈) = ( 𝑻𝒐𝒏 ) (𝑷𝑫(𝒐𝒏)) 𝑤ℎ𝑒𝑟𝑒 𝑃𝐷(𝑜𝑛) = 𝐼𝑐(𝑠𝑎𝑡) 𝑉𝑐𝑒(𝑠𝑎𝑡)
𝟎.𝟓𝑽𝟐𝑪𝑪
➢ 𝑷𝒐𝒖𝒕 = 𝑹𝒄
𝑷𝒐𝒖𝒕
➢ 𝜼=𝑷
𝒐𝒖𝒕 +𝑷𝑫(𝒂𝒗𝒈)
Figure 1.8e:Class C amplifier schematic diagram (left), Output signal (center), Loadline (right)
Determine the amplifier configuration, re, Zin, Zout, Av, Ai and Ap for the circuit shown below:
a.
b.
c.
e.
4.2 0214
Learning Module
Amplifier Circuit
Analysis
Course Packet 1.2
1.2 0224
Objectives
• Explain the characteristics of JFET amplifier configurations.
• Solve JFET amplifier circuit parameters.
• Explain the characteristics of MOSFET amplifier configurations.
• Solve MOSFET amplifier circuit parameters.
Duration
• Topic 02: JFET and MOSFET AC Analysis 4.5 hours
Delivery Mode
The delivery mode of this module will be done in online platform. It will be the combination
of synchronous and asynchronous learning.
SCORE
Criteria
10 30 60 80 100
1.2 0224
(30%) and late and most of are within 24 posting are less than 12 hours.
posting. the posting hours than 24 hours Demonstrate
are late. self-initiative.
Course Packet 1.2
Utilizes
poor Few Most of the
Errors in
Delivery of spelling grammatical post are All post are
spelling and
Post and and spelling grammatically grammatically
grammar
grammar in errors are correct with correct with no
(20%) evidenced in
all post; All noted in some rarely spelling errors.
several post.
post appear post. misspelling.
“hasty”
Consistently
Rarely post Most posts are Frequently posts topics
Rarely post
topics and short in length posts topic that related to the
topics and
Relevance of offer no and offer are related to subject matter.
always
Post further slight insight discussion Cites
makes
insight into into the topic content and additional
(50%) irrelevant
the topic with with quite prompts references
remarks to
occasional relevant to the further related to topic
the topic.
off-topics subject matter. discussion. to clarify the
idea.
You are required to post your idea or opinion based from the argument posted by the faculty
on Google Classroom stream page. This is an open online discussion where students in this
class are encourage to participate and post their idea open-mindedly.
Readings
1. Floyd, T. L. (2012). Electronic Devices (9th ed.). Prentice Hall.Supplemental reading
on an introduction to digital system to further understand the lesson
2. Malvino, A.P., Bates, D. J. (2015). Electronics Principles (8th ed.). McGraw – Hill
Education.
Shcultz, M. E. (2015). Grob’s Basic Electronics (Engineering Technologies and the Trades)
(12th ed.). McGraw – Hill Education.
1.2 0224
Lesson Proper
FET AC Analysis
Course Packet 1.2
Introduction
In previous course packet, we use capital letters for the subscript of DC parameters. For the
following discussion, lower case subscript will be used to designate AC parameters. Table 1
show the example designation of AC parameter.
Similar to BJT, one fundamental aspect of ac analysis is to define the FET AC model and the
AC equivalent circuit of the FET. Since JFET and D – MOSFET share the same operating
characteristics, their AC equivalent circuit is also the same. The only difference of JFET and D
– MOSFE is that in D – MOSFET, the value of VGS can be positive. Figure 1.1 shows the AC
equivalent circuit of the FET. Since FET has very high input impedance, the input side of the
circuit is represented by an open circuit. The drain current is represented by a current source
that is controlled by transconductance (g m) and AC gate to source voltage (Vgs). Remember
that FET is a voltage-controlled device. Parallel to the current source is the AC drain dynamic
resistance (rd). Tis resistance is commonly ignored because it has large amount of resistance.
1.2 0224
∆𝑰𝑫
𝒈𝒎 =
∆𝑽𝑮𝑺
Figure 1.1 show the graphical representation of the transconductance (g m). It can be observed
that the transconductance (gm) is the first derivative of the Shockley’s equation with respect to
Vgs.
Figure 1.2: Graphical representation of gm
2𝐼𝐷𝑆𝑆
𝑔𝑚0 = → 𝑓𝑜𝑟 𝑉𝐺𝑆 = 0
|𝑉𝑃 |
𝑽𝑮𝑺
𝒈𝒎 = 𝒈𝒎𝟎 (𝟏 − )
𝑽𝑷
1.2 0224
capacitor coupling at the input and output side is to preserve the DC bias
operating point.
✓ Output voltage signal has 1800 phase inversion
Course Packet 1.2
✓ Power gain (Ap) is equal to the product of current gain and voltage gain.
Figure 1.2b: AC equivalent circuit of a self – bias, common drain amplifier circuit
Equations:
𝑍𝑜 = 𝑅𝐷 ||𝑟𝑜
𝒁𝒐 ≅ 𝑹𝑫 ; 𝒊𝒇 𝒓𝒅 ≥ 10R𝑫 (𝒖𝒏𝒍𝒐𝒂𝒅𝒆𝒅)
𝒁𝒐 = 𝑹𝑫||𝑹𝑳 ; (𝒍𝒐𝒂𝒅𝒆𝒅)
Voltage Gain (AV):
𝒇𝒐𝒓 𝒓𝒅 ≥ 10R𝑫
𝑽𝒐
𝑨𝒗 = = −𝒈𝒎 (𝑹𝑫//𝒓𝒅 ) ; 𝒖𝒏𝒍𝒐𝒂𝒅𝒆𝒅
𝑽𝒊
1.2 0224
𝑽𝒐
𝑨𝒗 = = −𝒈𝒎 (𝑹𝑫//𝑹𝑳) ; 𝒍𝒐𝒂𝒅𝒆𝒅
𝑽𝒊
Course Packet 1.2
The last variation of common source JFET amplifier that will be discussed in this section is the
voltage divider bias. Figure 1.3a shows the schematic diagram of common source JFET
voltage divider bias circuit and Figure 1.3b shows the AC equivalent circuit. The input side of
the AC equivalent circuit is consisting of R1 and R2. The output side remains the same as the
self – bias circuit. The resistance RS is not part of the AC equivalent circuit because it has a
bypass capacitor.
1.2 0224
Course Packet 1.2
Figure 1.3a: Schematic diagram of common source JFET voltage divider bias circuit
Figure 1.3b: AC equivalent circuit of common source JFET voltage divider bias circuit
Equations:
𝑍𝑜 = 𝑅𝐷 ||𝑟𝑑
𝒁𝒐 ≅ 𝑹𝑫 ; 𝒊𝒇 𝒓𝒅 ≥ 10R𝑫 (𝒖𝒏𝒍𝒐𝒂𝒅𝒆𝒅)
𝒁𝒐 = 𝑹𝑫||𝑹𝑳 ; (𝒍𝒐𝒂𝒅𝒆𝒅)
Voltage Gain (AV):
𝑽𝒐
𝑨𝒗 = = −𝒈𝒎 (𝑹𝑫//𝒓𝒅 ) ; 𝒖𝒏𝒍𝒐𝒂𝒅𝒆𝒅
𝑽𝒊
𝑽𝒐
𝑨𝒗 = = −𝒈𝒎 (𝑹𝑫//𝑹𝑳) 𝒊𝒇 𝒓𝒅 ≥ 10R𝑫 ; 𝒍𝒐𝒂𝒅𝒆𝒅
𝑽𝒊
1.2 0224
Example:
1. Consider a JFET self – bias circuit shown below with the following DC operating
Course Packet 1.2
Solution:
𝑍𝑖 = 𝑅𝐺 = 𝟏𝑴𝛀
𝑍𝑜 = 𝑅𝐷 = 𝟐𝒌𝛀
2. Consider a JFET unbypass RS self – bias circuit shown below with the following DC
operating point, VGSQ = -2.6V, IDQ = 2.6 mA. Determine
a. gm
b. Zi
c. Zo
d. Av
1.2 0224
Solution:
Course Packet 1.2
𝑍𝑖 = 𝑅𝐺 = 𝟏𝑴𝛀
𝑍𝑜 = 𝑅𝐷 = 𝟑. 𝟑𝒌𝛀
3. Consider a D - MOSFET voltage divider – bias circuit shown below with the
following DC operating point, VGSQ = 0.35V, IDQ = 7.6 mA. Determine
a. gm
b. Zi
c. Zo
d. Av
Solution:
𝑅1 110𝑀Ω(10𝑀Ω)
𝑍𝑖 = = = 𝟗. 𝟏𝟕𝑴𝛀
𝑅2 110𝑀Ω + 10𝑀Ω
1.2 0224
𝑍𝑜 = 𝑅𝐷 = 𝟏. 𝟖𝒌𝛀
Course Packet 1.2
5. Common – Drain
✓ Also known as “Source Follower Circuit”
✓ Input signal is connected at the gate and output is taken at the source.
✓ Drain is common at the input and output side of the circuit.
✓ There is no phase inversion at the output signal.
✓ High current gain but low voltage gain (A v is almost equal to 1)
✓ Power gain (Ap) is approximately equal to current gain (A i)
Equations:
1.2 0224
Example:
1. Consider a JFET self – bias circuit shown below with the following DC operating
point, VGSQ = -2.86V, IDQ = 4.56 mA. Determine:
a. gm
b. Zi
c. Zo
d. Av
Solution:
𝑍𝑖 = 𝑅𝐺 = 𝟏𝑴𝛀
1.2 0224
1
𝟏 2.2𝑘Ω (2.28𝑚𝑠)
𝑍𝑜 ≅ 𝑹𝑺 // = = 𝟑𝟔𝟓. 𝟔𝟗𝛀
𝒈𝒎 2.2𝑘Ω + ( 1 )
Course Packet 1.2
2.28𝑚𝑠
6. Common – Gate
✓ Input signal is connected at the source and output is taken at the drain.
✓ Gate is common at the input and output side of the circuit.
✓ There is no phase inversion at the output signal.
✓ High voltage gain but low current gain (A i is almost equal to 1)
Figure 5.5b: AC equivalent circuit of JFET self – bias common – gate amplifier
Equations:
𝑍𝑜 = 𝑅𝐷 ||𝑟𝑑
1.2 0224
𝒁𝒐 ≅ 𝑹𝑫 ; 𝒊𝒇 𝒓𝒅 ≥ 10R𝑫 (𝒖𝒏𝒍𝒐𝒂𝒅𝒆𝒅)
𝒁𝒐 = 𝑹𝑫 ||𝑹𝑳 ; 𝒊𝒇 𝒓𝒅 ≥ 10R𝑫 (𝒍𝒐𝒂𝒅𝒆𝒅)
Voltage Gain (AV):
Course Packet 1.2
𝑽𝒐
𝑨𝒗 = = 𝒈𝒎 (𝑹𝑫//𝒓𝒅 ) ; 𝒖𝒏𝒍𝒐𝒂𝒅𝒆𝒅
𝑽𝒊
𝑽𝒐
𝑨𝒗 = = 𝒈𝒎 (𝑹𝑫//𝑹𝑳 ) 𝒊𝒇 𝒓𝒅 ≥ 10R𝑫 ; 𝒍𝒐𝒂𝒅𝒆𝒅
𝑽𝒊
Example:
1. Consider a JFET self – bias circuit shown below with the following DC operating
point, VGSQ = -2.2V, IDQ = 2.03 mA. Determine:
a. gm
b. Zi
c. Zo
d. Av
e. Output voltage
Solution:
1
1 1.1𝑘Ω ( )
𝑍𝑖 = 𝑅𝑆 // = 2.25𝑚𝑠 = 𝟑𝟏𝟔. 𝟓𝟓𝛀
𝑔𝑚 1.1𝑘Ω + ( 1 )
2.25𝑚𝑠
𝑍𝑜 ≅ 𝑅𝐷
𝒁𝒐 = 𝟑. 𝟔𝒌𝛀
1.2 0224
𝑉𝑜
𝐴𝑣 = = 𝑔𝑚 𝑅𝐷 = 2.25𝑚𝑆 (3.6𝑘Ω) = 𝟖. 𝟏
𝑉𝑖
Course Packet 1.2
𝑉𝑜 = 𝐴𝑣 𝑉𝑖 = 8.1(40𝑚𝑉 ) = 𝟑𝟐𝟒 𝒎𝑽
𝒈𝒎 = 𝟐𝒌(𝑽𝑮𝑺 − 𝑽𝑮𝑺(𝒕𝒉) )
Figure 6.6a shows the schematic diagram for a drain feedback E – MOSFET common source
amplifier and Figure 6.6b is the ac equivalent circuit.
1.2 0224
Equations:
𝑹𝑭 + 𝒓𝒅 //𝑹𝑫
𝒁𝒊 =
𝟏 + 𝒈𝒎 (𝒓𝒅 //𝑹𝑫)
𝑹𝑭
𝒁𝒊 = ; 𝒊𝒇 𝒓𝒅 ≥ 10R𝑫 (𝒖𝒏𝒍𝒐𝒂𝒅𝒆𝒅)
𝟏 + 𝒈 𝒎 𝑹𝑫
𝒁𝒐 = 𝑹𝑭 ||𝑹𝑳||𝒓𝒅
𝒁𝒐 = 𝑹𝑫 ; 𝒊𝒇 𝒓𝒅 𝒂𝒏𝒅 𝑹𝑭 ≥ 10R 𝑫 (𝒖𝒏𝒍𝒐𝒂𝒅𝒆𝒅)
𝒁𝒐 = 𝑹𝑫||𝑹𝑳 ; 𝒊𝒇 𝒓𝒅 𝒂𝒏𝒅 𝑹𝑭 ≥ 10R𝑫 (𝒍𝒐𝒂𝒅𝒆𝒅)
Voltage Gain (AV):
𝑽𝒐
𝑨𝒗 = = 𝒈𝒎 (𝑹𝑫//𝒓𝒅 //𝑹𝑭 ) ; 𝒖𝒏𝒍𝒐𝒂𝒅𝒆𝒅
𝑽𝒊
𝑽𝒐
𝑨𝒗 = = 𝒈𝒎 (𝑹𝑫 //𝑹𝑳) 𝒊𝒇 𝒓𝒅 𝒂𝒏𝒅 𝑹𝑭 ≥ 10R𝑫 ; 𝒍𝒐𝒂𝒅𝒆𝒅
𝑽𝒊
1.2 0224
1. Consider a JFET self – bias circuit shown below with the following DC operating
point, VGSQ = -3.2V, IDQ = 3 mA. Determine:
a. gm
b. Zi
c. Zo
d. Av
1.2 0224
1.2 0224
POST ASSESSMENT
post assessment
Pre-Assessment
Instruction: Select the best answer. Write the complete answer (do not include the letter) of
the chosen answer in a separate sheet of paper. Scanned copy or take a picture of your answer
sheet and submit it to our google classroom acct. Don’t forget to write your name at the upper
left most part of your answer sheet. Use A4 bond paper.
1.2 0224
1.2 0224
c. Emitter terminal
d. Gate terminal
19. The output of a common source amplifier is measured at ______________.
a. Source terminal
b. Drain terminal
c. Emitter terminal
d. Gate terminal
20. Which of the following amplifier configuration has the highest power gain
a. Common drain
b. Common emitter
c. Common gate
d. Source follower
1.2 0224
post assessment
1.2 0224
In what particular portion of this course packet, you feel that you are struggling or lost?
_____________________________________________________________________________
_____________________________________________________________________________
__________________________________________________________________________
To further improve this course packet, what part do you think should be enhanced?
_____________________________________________________________________________
_____________________________________________________________________________
__________________________________________________________________________
1.2 0224
Learner’s Feedback Form