BASIC ELECTRONICS LAB MANUAL Updated

BASIC ELECTRONICS
LABORATORY MANUAL
Course Code: 23ES1201/23ES1202
For 1ST /2ND SEMESTER, B.Tech Students
Dept. of Electronics and Communication Engineering
[This laboratory manual will guide to perform the necessary experiments to meet the requirement of
BPUT syllabus for Basic Electronics Lab for 1st/2nd semester students. It also contains the supplementary
materials like data sheets etc of some useful components to be used throughout the course.]
1
TABLE OF CONTENTS
RULES & REGULATIONS .......................................... Error! Bookmark not defined.
FORMAT FOR RECORD WRITING ......................... Error! Bookmark not defined.
MARK DISTRIBUTION ............................................... Error! Bookmark not defined.
LIST OF EXPERIMENTS ............................................ Error! Bookmark not defined.
LIST OF EXPERIMENTS TO BE PERFORMED .... Error! Bookmark not defined.
EXPERIMENT NO. - 01 .............................................................. Error! Bookmark not defined.
EXPERIMENT NO. -02 ............................................................... Error! Bookmark not defined.
EXPERIMENT No. - 03 .............................................................. Error! Bookmark not defined.
EXPERIMENT NO. - 04 .............................................................. Error! Bookmark not defined.

BASIC ELECTRONICS LABORATORY MANUAL
RULES & REGULATIONS
1. Don’t be late to the lab.

2. Switch off your CELL PHONE or put it in silent mode before getting into the
Lab.
3. Put your signature on attendance sheet first, submit the record and then go to
your Experiment table.
4. Without fair record and rough Observation copy you are not allowed to
the lab.
5. Handlings of other things, which are not related to the experiment, are strictly
prohibited inside the lab.
6. You may be charged with full cost and additional penalty for destroying the
equipments.
7. You should put on your own identity card.
8. Till the time you are inside the lab you should stick to your place and don’t
roam around.
9. Before leaving the lab, make sure that all instruments are switched off and
you have returned the issued components, otherwise all group members will
be punished.
10. Your rough copy must be verified by any of the instructors present there else
your record will not be considered to be authenticated.
11. You yourself will be responsible for exchange or missing of any precious
materials.
12. You can demand for marks on the basis of performance ONLY, but can’t beg.
13. You may be allowed for Extra labs if your application is forwarded through
proper channel within the time limit only, beyond which it will not be
entertained.
PARALA MAHARAJA ENGINEERING COLLEGE

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FORMAT FOR RECORD WRITING
1. Maintain the CONTENT page with date of performing the experiment,

experiment name, page nos.
2. Put the page numbers on the top of the individual page, Date & experiment
no.
3. Other formats includes, Aim of the experiment, apparatus required in tabular
form, theoretical description with required circuit diagram(s), and circuit
diagram (with proper labeling), observation table, calculations (if any) &
conclusion.
4. Put your full signature, roll no., sec. & group no. at bottom right corner of the
last page of each Experiment.
5. Record should be very neat and clean and all the circuits and tables should
be drawn with pencil only.
6. Bad hand writing may affect the record mark.
7. Incomplete record will lead towards negative marking
8. Rough observation copy should match with fair record.
9. Arrange the pages properly according to the experiment list.
10. Use the record and internal pages one side rolling (PMEC format ONLY).
11. Don’t submit loose sheets without record at any condition.
FORMAT
1. Aim of the Experiment
2. Apparatus Required
Sl. No. Name Specification Quantity
1
2
3. Theory (Theoretical Circuit diagram must be included)

4. Practical circuit diagram with practical component values and figure name.
5. Observation Table and calculations.
6. Conclusion
MARK DISTRIBUTION
Sl. No. Parts Marks

1 Attendance 20
2 Performance 20
3 Record 20
5 Via-voice/ Quiz 20
6 Lab Test 20
7 TOTAL 100
I hereby Mr./Ms………………………………………………..with roll

no…………………………have understood the above rules and
regulations of the Basic Electronics Lab and will accept any kind of
punishment given by the instructor for violating the rules mentioned
above.
Date: Signature of the student

6
LIST OF EXPERIMENTS (AS PER BPUT SYLLABUS)
1. Familiarity with electronic components and devices (Testing of

semiconductor diode, Transistor, IC Pins connection) Digital
Multimeter should be used.
2. Study and use of CRO to view waveforms and measure its
Amplitude and Frequency.
3. V-I Characteristics of a Semiconductor Diode
4. V-I (Output) Characteristics of N-P-N/P-N-P Transistor in CE
Configuration
5. Measurement of pinch off voltage and plot transfer characteristics
and drain characteristics of JFET.
6. Transfer characteristics and drain characteristics of MOSFET.
7. OP-AMP: Inverting and Non-Inverting Configuration. Record of
Waveforms.
8. Verification of Truth table of Logic gates (AND, OR,NOT, NAND,
NOR, EX-OR)
9. Half Wave and Full Wave Rectifier without Capacitor filter. Record
of Waveforms, Measurement of Average and RMS value.
10. Implementation of digital circuit using Universal gates.
LIST OF EXPERIMENTS TO BE PERFORMED
1. Familiarity with electronic components and devices (Testing of

semiconductor diode, Transistor, IC Pins connection) Digital
Multimeter should be used.
2. Study and use of CRO to view waveforms and measure its
Amplitude and Frequency.
3. V-I Characteristics of a Semiconductor Diode
4. Half Wave and Full Wave Rectifier without Capacitor filter. Record
of Waveforms, Measurement of Average and RMS value.
5. V-I (Output) Characteristics of N-P-N/P-N-P Transistor in CE
Configuration
6. Verification of Truth table of Logic gates (AND, OR,NOT, NAND,
NOR, EX-OR)
7. OP-AMP: Inverting and Non-Inverting Configuration. Record of
Waveforms.
8. Measurement of pinch off voltage and plot transfer characteristics
and drain characteristics of JFET.
9. Transfer characteristics and drain characteristics of MOSFET.
10. Implementation of digital circuit using Universal gates.

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EXPERIMENT - 1
AIM OF THE EXPERIMENT:

Familiarization with electronic components and devices. i.e.
1. Testing of semiconductor diode.
2. Testing of semiconductor transistor.
3. Testing of potentiometer.
4. Pin identification of IC.
5. Charging and discharging of capacitor.
6. Colour code of fixed resistance resistor.
7. Testing of LED.
8. Multimeter for Testing of components.
APPARATUS REQUIRED:
Sl. No. NAME SPECIFICATION QUANTITY
1 Fixed Resistors - 5
2 Semiconductor Diode - 1
3 Bipolar Junction Transistor(BJT) - 1
4 Electrolyte Capacitor - 1
5 Potentiometer - 1
6 Integrated Circuit (IC) - 1
7 Light Emitting Diode (LED) - 1
8 Digital Multimeter - 1
9 Breadboard - 1
THEORY:
Experiment involves testing of various electronic components and devices and
knowing about their behavior. Electronic components involve semiconductor diode,
transistor, potentiometer, IC, capacitor, resistor, LED, breadboard and devices like
digital multimeter.
Digital Multimeter:
A multi meter is the most useful electronic instrument, which can measure three
Quantities, voltage (AC or DC), current (DC or AC) and resistance. It is used
because of the following reasons:
1. They eliminate interpretation errors.
2. Parallax errors are eliminated.
3. Power requirement is less.
4. They reduce human reading errors.
5. Cost is less.

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Resistors:
The components that are specifically designed to have a certain amount of
Resistances are called resistors. The principle applications of resistor are to limit
currents, divide voltage, and in certain cases generate heat.
Fixed Resistors:
The fixed resistors are available with a large selection of resistance values. One
common resistor is the carbon composition type, which is made with a mixture of
finely ground carbon, insulating filler and a resin binder. Other types include carbon
film, metal film and wire wound.
Resistor Colour Code:
Note 1: A 0Ω resistor, marked with a single black band.
Note 2: The physical size of a resistor is indicative of the power it can dissipate, not of its resistance.
Variable Resistors:
These are designed so that their resistance values can be changed easily. Two
basic uses of variable resistors are to divide voltage and to control current. The
variable resistor used to divide voltage is called potentiometer. The potentiometer is
a three terminal device-two fixed and one variable (middle one). Resistance is to be

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determined between one fixed terminal and other variable terminal. If the resistances
measured in each of the cases are same, then it is said to be working.
Capacitor:
A capacitor is a component that stores electric energy blocks the flow of Direct
current and permits the flow of alternating current to a degree, depends upon its
capacitance and the current frequency.
Semiconductor Diode:
A semiconductor diode is a two layer, one junction device which is formed by joining
one p-type and one n-type semiconductor material. When the positive terminal of the
supply is connected to p-side of the diode and negative terminal to that of n-side, the
diode is said to be forward biased. In this condition, the width of the depletion layer
of diode decreases which results decrease in resistance. So the forward resistance
is very low of the order of few ohms. Ideally it is zero. Similarly, when the negative
terminal of the supply is connected to the p-side and positive terminal to n-side the
diode is said to be reverse biased. In reverse biased condition, the width of the
depletion layer increases which results increase in resistance. Thus reverse
resistance of the diode very much high of the order of some mega ohms. Ideally, it is
infinite. The fig in side represents the symbol of the diode. The tip of the arrow is a
small vertical line which indicates n-side of the diode. And other side indicates p-side
of the diode.
There are so many diodes series are available in the market. Example of commonly
used diodes are 1N4001 to 1N4007, 1N4146, 1N4148, BY127, BA159. Depending
on the application and type of diodes include Zener diodes, Tunnel diodes, Pin
diodes, Varactor or varicap diodes, Schottky diodes, Backward diodes.
Transistor:
It is a three terminal semiconductor device consisting of two p-n junctions formed by
sandwiching a thin layer of n-type semiconductor between two layers of p-type
Semiconductor. This type is known as p-n-p transistor. When a layer of p-type
semiconductor between two layers of n-type semiconductor is called n-p-n transistor.

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Integrated Circuits:
An integrated circuit is one in which circuit components such as transistors, Diode,
resistors, capacitors etc. are automatically part of a small semiconductor chips.
Light Emitting Diode:

Like a common diode, the LED (Light Emitting Diode) consists of a P-N contact.
When a P-N junction is forward biased, current flows within it. This current flow will
cause electrons and holes to move is a manner that an electron will move to fill a
hole. When this happens, the electron will fall to a lower energy level and this will
release an amount of energy in the form of photons. In a larger scale, those photons
will produce light.
A LED will emit a colored light not because of it's package color as many people
used to believe, but because of the emitting wavelength. The wavelength that an
LED will produce depends on the material used to form the p-n junction
Breadboard:

16
PROCEDURES
1. Testing Of Fixed Resistor
The theoretical value of resistance and tolerance is found by proper numbering of
color bands present on them.
1. Beginning from color band which is nearer to the external lead and that color
must not be gold or silver.
2. The second band is the second digit.
3. The third band is the number of zeros following the second digit, or the
multiplier.
4. Fourth band indicates the tolerance and it is gold/silver.
5. For practical measurement of resistance value keep the multimeter knob at
the higher resistance position and if the display of the multimeter is showing
point values only then change the multimeter knob to its nearer low range
position until you are not getting a real value.
6. Percentage of error can be calculated using formula,
7. Percentage of error = | Theoretical value –Practical value | × 100
Theoretical value
2. Testing Of Potentiometer
1. The terminals of the potentiometer are marked 1, 2, and 3 as shown in fig.
terminal 1 and 3 are fixed whereas terminal 2 is variable.
2. Touch two probes of multimeter to terminals 1&2, 2&3 and 1&3 respectively
and note down the readings.
3. Vary the knob, take four to five readings.
4. If the resistance between fixed terminals i.e. 1 and 3 are same to that of sum
of resistances between 1 & 2 and 2 & 3. Then it is working, otherwise faulty.
3. Testing of Capacitor
You can use your multimeter as an ohmmeter to test the capacitor.
1. Discharge the capacitor by shortening its leads. That is-use a wire and
connect the leads of the capacitor together. This will discharge it.
2. Put your multimeter in the high ranges 10K-1M
3. Connect multimeter to capacitor leads (observe the polarity if electrolytic). As
soon as the leads make contact, the meter will swing near zero. It will then
move slowly toward infinity. Finally the meter would come to be infinite ohms
because the capacitor is being charged by the battery of the multimeter.
4. If the capacitor is bad, it will go to zero ohms and remain there. This is called
a shortened capacitor
5. In the case of an open capacitor there will be no ohmmeter indication.
6. Some capacitors have a low dielectric leakage. You will know this if the
ohmmeter comes to rest at a point lower than infinite. Test a known good
capacitor of the same type to be sure.
4. Testing of Semiconductor Diode

Using the multimeter, the Voltage across the diode is measured.
1. Keep multimeter in diode range (diode symbol is given).
2. Touch positive probe of multimeter to anode of diode and negative probe to
cathode. (Forward bias)
3. It will show some value between 0.5v to 0.7v (low Voltage).
4. By altering connection (Reverse bias) it will show infinite Voltage (1. On
multimeter display)
5. Then diode is ok, otherwise faulty.
5. Testing of Semiconductor Transistor

1. First identify the leads of the transistor i.e. emitter, base and collector.
2. Using the multimeter, Voltage across the transistor leads are measured i.e.
base-emitter and base-collector in both forward and reverse condition.
3. If in forward condition both the junction Voltage are low and in reverse
condition both the junction Voltage are high then the transistor is ok.
Otherwise it is faulty.
6. Testing of Integrated Circuit

Starting from the depression mark or notch, the pins are counted till the end
anticlockwise.
7. Testing of LED (Light Emitting Diode)

1. It has two leads. Small one is cathode & large one is anode.
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2. Keep multimeter knob on resistance range (near Diode symbol).

3. Forward bias the LED. It will glow.
4. In reverse bias it will not glow. Then it is ok
OBSERVATION AND CALCULATION:

1) Resistor
SL. COLOR BAND THEORITICAL PRACTICAL PERCENTAGE
NO. VALUE VALUE OF ERROR
2) Diode
SL. SPECIFICATION FORWARD BIAS REVERSE BIAS REMARK
NO. VOLTAGE VOLTAGE
3) Transistor
SL. SPECIFICATION FORWARD BIAS REVERSE BIAS REMARK
NO. VOLTAGE VOLTAGE
VBE VBC VBE VBC
4) Capacitor
SPECIFICATION CHARGING DISCHARGING REMARK
CONDITION CONDITION
5) Potentiometer
SL. NO. SPECIFICATION R12 R23 R12+R23 R13 REMARK
6) IC
SPECIFICATION TOTAL PIN NO.
7) LED
FORWARD BIAS REVERSE BIAS COLOR REMARK
CONCLUSION:
*****Write in your own language what you learn from this experiment. *****

EXPERIMENT - 2
Study and use of CRO to view waveforms and measure its Amplitude
and Frequency.
APPARATUS REQUIRED:
S.L. NO NAME OF THE SPECIFICATION QUANTITY
EQUIMENT
1 AS PER THE 01
CATHODE RAY ISSUED DEVICE
OSILOSCOPE (CRO)
2 AS PER THE 01
FUNCTION GENERATOR ISSUED DEVICE
3 BNC PROBE 01
THEORY:
The Cathode-Ray Oscilloscope (CRO) is a common laboratory instrument that
provides accurate time and amplitude measurements of voltage signals over a wide
range of frequencies. Its reliability, stability, and ease of operation make it suitable as
a general purpose laboratory instrument.
The cathode ray is a beam of electrons which are emitted by the heated cathode
(negative electrode) and accelerated toward the fluorescent screen. The assembly of
the cathode, intensity grid, focus grid, and accelerating anode (positive electrode) is
called an electron gun. Its purpose is to generate the electron beam and control its
intensity and focus. Between the electron gun and the fluorescent screen are two
pair of metal plates - one oriented to provide horizontal deflection of the beam and
one pair oriented ot give vertical deflection to the beam. These plates are thus
referred to as the horizontal and vertical deflection plates. The combination of these
two deflections allows the beam to reach any portion of the fluorescent screen.
Wherever the electron beam hits the screen, the phosphor is excited and light is
PARALA MAHARAJA ENGINEERING COLLEGE 1

23ES1201/23ES1202 BASIC ELECTRONICS LABORATORY MANUAL
emitted from that point. This conversion of electron energy into light allows us to
write with points or lines of light on an otherwise darkened screen.
In the most common use of the oscilloscope the signal to be studied is first amplified
and then applied to the vertical (deflection) plates to deflect the beam vertically and
at the same time a voltage that increases linearly with time is applied to the
horizontal (deflection) plates thus causing the beam to be deflected horizontally at a
uniform (constant> rate. The signal applied to the vertical plates is thus displayed on
the screen as a function of time. The horizontal axis serves as a uniform time scale.
CRO Operation:
A simplified block diagram of a typical oscilloscope is shown .In general, the
instrument is operated in the following manner. The signal to be displayed is
amplified by the vertical amplifier and applied to the verical deflection plates of the
CRT. A portion of the signal in the vertical amplifier is applied to the sweep trigger as
a triggering signal. The sweep trigger then generates a pulse coincident with a

selected point in the cycle of the triggering signal. This pulse turns on the sweep
generator, initiating the saw tooth wave form. The saw tooth wave is amplified by the
horizontal amplifier and applied to the horizontal deflection plates. Usually, additional
provisions signal are made for applying an external triggering signal or utilizing the
60 Hz line for triggering. Also the sweep generator may be bypassed and an external
signal applied directly to the horizontal amplifier.
CRO Controls:
The controls available on most oscilloscopes provide a wide range of operating
conditions and thus make the instrument especially versatile. Since many of these
controls are common to most oscilloscopes a brief description of them follows.
Cathode-Ray Tube:
1. Power and Scale Illumination: Turns instrument on and controls
illumination of the graticule.
2. Focus: Focus the spot or trace on the screen.
3. Intensity: Regulates the brightness of the spot or trace.

Internal Design of CRT

Vertical Amplifier Section:
1. Position: Controls vertical positioning of oscilloscope display.
2. Sensitivity: Selects the sensitivity of the vertical amplifier in calibrated steps.
3. Variable Sensitivity: Provides a continuous range of sensitivities between
the calibrated steps. Normally the sensitivity is calibrated only when the
variable knob is in the fully clockwise position.
4. AC-DC-GND: Selects desired coupling (ac or dc) for incoming signal applied
to vertical amplifier, or grounds the amplifier input. Selecting dc couples the
input directly to the amplifier; selecting ac send the signal through a capacitor
before going to the amplifier thus blocking any constant component.
Horizontal-Sweep Section:
1. Sweep time/cm: Selects desired sweep rate from calibrated steps or admits
external signal to horizontal amplifier.
2. Sweep time/cm Variable: Provides continuously variable sweep rates.
Calibrated position is fully clockwise.
3. Position: Controls horizontal position of trace on screen.
4. Horizontal Variable: Controls the attenuation (reduction) of signal applied to
horizontal amplifier through Ext. Horizontal connector.

Trigger:
The trigger selects the timing of the beginning of the horizontal sweep.
1. Slope: Selects whether triggering occurs on an increasing (+) or decreasing
(-) portion of trigger signal.
2. Coupling: Selects whether triggering occurs at a specific dc or ac level.
3. Source: Selects the source of the triggering signal.
INT - (internal) - from signal on vertical amplifier
EXT - (external) - from an external signal inserted at the EXT. TRIG. INPUT.
LINE - 60 cycle trigger
4. Level: Selects the voltage point on the triggering signal at which sweep is
triggered. It also allows automatic (auto) triggering of allows sweep to run free
(free run).
PROCEDURE:
1. First of all set all the Equipment according to the experiment.
2. Connect the CRO with Function generator through BNC cord(Black probe to
Black probe and red to red Probe)
3. For operating ch-1 choose the Channel-1 knob in the front panel of the CRO
for ch-2 choose the channel-2 knob
4. There are three types of waveform according to our need we set the
waveform
5. First adjust the function generator with a frequency as given with a type of
signal like square, triangular, Sinusoidal.
6. Trace the waveform by using tracing paper and observe the no of horizontal
division, no of vertical division, time/div, volts/div.
7. Take different frequency and observe.
8. Calculate the percentage of error of frequency by using the formula
Percentage of error = │theoretical frequency – practical frequency │ × 100

Theoretical frequency

TABULATION:
No. of No. of Practical
Sl. Waveform Theoretical Vertical Volt/Div Vpp Horizontal Time/Div Time Period (T) Frequency % of
No. Frequency Division Division (F) Error
1 Sine wave
2 Square wave
3 Triangular Wave
4 Sine wave
5 Square wave
6 Triangular Wave
7 Sine wave
8 Square wave
9 Triangular Wave
Time period (T) = no of Horizontal division * time / div

Voltage peak to peak (Vpp) = No. of vertical division * Volt/div
Frequency (F) =1/T
CONCLUSION:

EXPERIMENT - 3
V-I Characteristics of a Semiconductor Diode
APPARATUS REQUIRED:
Name of the
Sl. No. Specification Quantity
Apparatus
1 Diode IN4007 1
2 Potentiometer 1KΩ 1
3 Resistor 1KΩ 1
DC
4 Power supply 1
-12v to +12v
5 Multimeter Digital 1
6 Wire -- As per required
7 Breadboard - 1
THEORY:
Donor impurities (pentavalent) are introduced into one-side and acceptor impurities
into the other side of a single crystal of an intrinsic semiconductor to form a p-n diode
with a junction called depletion region (this region is depleted off the charge carriers).
This region gives rise to a potential barrier Vγ called Cut- in Voltage. This is the
voltage across the diode at which it starts conducting. The P-N junction can conduct
beyond this Potential.
The P-N junction supports unidirectional current flow. If +ve terminal of the input
supply is connected to anode (P-side) and –ve terminal of the input supply is
connected to cathode (N- side), then diode is said to be forward biased. In this
condition the height of the potential barrier at the junction is lowered by an amount
equal to given forward biasing voltage. Both the holes from p-side and electrons from
n-side cross the junction simultaneously and constitute a forward current ( injected
minority current – due to holes crossing the junction and entering N-side of the

diode, due to electrons crossing the junction and entering P-side of the diode).
Assuming current flowing through the diode to be very large, the diode can be
approximated as short-circuited switch. If –ve terminal of the input supply is
connected to anode (p-side) and +ve terminal of the input supply is connected to
cathode (n-side) then the diode is said to be reverse biased. In this condition an
amount equal to reverse biasing voltage increases the height of the potential barrier
at the junction. Both the holes on p-side and electrons on n-side tend to move away
from the junction thereby increasing the depleted region. However the process
cannot continue indefinitely, thus a small current called reverse saturation current
continues to flow in the diode. This small current is due to thermally generated
carriers. Assuming current flowing through the diode to be negligible, the diode can
be approximated as an open circuited switch.
The volt-ampere characteristics of a diode explained by following equation:

I = Io(Exp(Vd/ ηVi) - 1)
Where I = current flowing in the diode
Io=reverse saturation current
V=voltage applied to the diode
VT=volt-equivalent of temperature=KT/q=T/11,600=26mV(@ room temp).
η=1 (for Ge) and 2 (for Si)
It is observed that Ge diode has smaller cut-in-voltage when compared to Si diode.

The reverse saturation current in Ge diode is larger in magnitude when compared to
silicon diode.
Forward Resistance:
The resistance offered by the diode in the forward bias condition is known as forward
resistance. This resistance is of two types, they are,
1. D.C forward resistance
2. A.C forward resistance

1. D.C. Forward Resistance:

It is measured by the ratio of dc voltage across the diode to the resulting dc current
through it. Thus referring to the forward characteristics in fig.1. It is clear that when
forward voltage is OA, the forward current is OB.
So,
DC Forward Resistance, Rf = OA/OB.
2. A.C. Forward Resistance:

It is the opposition offered by the diode according to the change in forward current. It
is measured by the ratio of change in voltage across diode to the resulting change in
current through.
So,
Change in voltage across diode

AC Forward Resistance =
Corresponding change in current through diode
The ac forward resistance is more significant as the diodes are generally used with
ac supply. The ac forward resistance can be determined from the forward
characteristics as shown in fig.2. If P is the operating point at any instant, then
forward voltage is OB and forward current is OE. To find the ac forward resistance,
vary the forward voltage on both sides of the OP.
Change in forward voltage

Hence, AC forward resistance =
Change in forward current
OC-OA
=
OF-OD
AC

DF

Reverse Resistance:
The resistance offered by the diode in the reverse bias condition is known as reverse
resistance. It can be dc or ac reverse resistance depending upon whether the
reverse bias is direct or alternating voltage. Ideally, the reverse resistance of a diode
is infinite. However practically, the reverse resistance is not infinite, because for any
value of reverse bias, there exist a small leakage current. But reverse resistance is
very large than forward resistance.
Volt-Ampere Characteristics of P-N Junction:

V-I characteristics of p-n junction is the curve between voltage across the junction
and the circuit current. Voltage is taken along x-axis and current along y-axis.
1. Zero External Bias: When the external voltage is zero, i.e, circuit is open.
The potential barrier at the junction does not permit current flow. Therefore,
the circuit current is zero.
2. Forward Bias: With forward bias to the p-n junction, i.e, p-type
semiconductor is connected to the positive terminal and n-type semiconductor
is connected to the negative terminal of the supply, the potential barrier is
reduced. At certain forward voltage (0.7v for Si and 0.3v for Ge) the potential
barrier is altogether eliminated and current starts flowing in the circuit. From
now onwards the current increases with the increase in forward voltage. From
the forward characteristics it has been seen that the current increases very
slowly and the curve is non-linear. It is because; the external applied voltage
is used to overcome the potential barrier.

3. Reverse Bias: With reverse bias to the p-n junction,i.e, p-type semiconductor
is connected to the negative terminal and n-type semiconductor is connected
to the positive terminal of the supply voltage, the potential barrier at the
junction increases. Therefore, the junction resistance becomes very high and
practically the flow of current through the circuit is ceased.
If the reverse voltage is increased continuously, the kinetic energy of the electrons
may become high. At this stage breakdown of the junction occurs and can be
characterized by a sudden fall of resistance at the barrier region.
CIRCUIT DIAGRAM:
Forward Bias

Reverse Bias
PROCEDURE:
Forward Biased Condition:
1. Connect the PN Junction diode in forward bias i.e Anode is connected to
positive of the power supply and cathode is connected to negative of the
power supply.
2. Use a Regulated power supply of range (0-12)V through a potentiometer of
1KΩ and a series resistance of 1KΏ.
3. For various values of forward voltage (VD) note down the corresponding
values of forward current (ID).
Reverse Biased Condition:

1. Connect the PN Junction diode in Reverse bias i.e; anode is connected to
negative of the power supply and cathode is connected to positive of the
power supply.
2. For various values of reverse voltage (VD) note down the corresponding
values of reverse current (ID).
PRECAUTIONS:
1. While doing the experiment do not exceed the ratings of the diode. This
may lead to damage of the diode.
2. Connect multimeter in correct polarities as shown in the circuit diagram.

3. Do not switch ON the power supply unless you have checked the circuit
connections as per the circuit diagram.
OBSERVATION:
RL=?
Reading for Forward Bias Condition:

Sl. No. VD (V) VRL (V) VR L
ID = IR L = (mA)
RL
1
2
3
4
5
6
7
8
9
10
11
12
13
Reading for Reverse Bias Condition:

VR L
Sl. No. VD(V) VRL(V) ID = IR L = (mA)
RL
1
2
3
4
5
6
7
8
9
10

GRAPH (INSTRUCTIONS):
1. Take a graph sheet and divide it into 4 equal parts. Mark origin at the center
of the graph sheet.
2. Now mark +ve x-axis as Vd
+ve y-axis as Id
3. Mark the readings tabulated for diode forward biased condition in first
Quadrant and diode reverse biased condition in third Quadrant.
CALCULATIONS FROM GRAPH:

Static forward Resistance Rdc = Vd/Id Ω
Dynamic forward Resistance Rac = ΔVd/ΔIdΩ
RESULT:
Thus the VI characteristics of PN junction diode is verified
DC forward resistance = ………. Ω
AC forward resistance = ………. Ω
CONCLUSION:

EXPERIMENT - 4

Half wave and full wave rectifier without capacitor filter, record of waveforms,
measurement of average and rms values of the rectifier output.
APPARATUS REQUIRED:
SL. NO. NAME OF EQUIPMENT SPECIFICATION QUANTITY
1 Cathode Ray Oscilloscope (CRO) As per the given 01
device
2 Transformer (Centre tap) 6-0-6v 01
3 Semiconductor Diode 1N4007 04
4 Resistor 1KΩ 01
5 Breadboard - 01
6 Connecting wire - As per reqd.
THEORY:
For reason associated with economics of generation and transmission, the electric
power available is usually an ac supply. The supply voltage varies sinusoidally and
has a frequency of 50 Hz. It is used for lighting, heating and electric motors. But,
there are many applications where dc supply is needed. When such a dc supply is
required, the main ac supply is required or rectified by using the crystal diodes. The
following two rectifier circuits can be used.
1. Half wave rectifier
2. Full wave rectifier

1. Half Wave Rectifier:
(A) Without Capacitor:
Circuit diagram
Input Output
A half wave rectifier is one which converts ac voltage into a pulsating voltage using
only one half cycle of the applied ac voltage. The ac voltage to the rectifier is applied
to a single diode connected in series with a load resistor RL.
Working:
For the positive half cycle of input ac voltage, the diode is forward biased and hence
it conducts. Now a current flows in the circuit and there is a voltage drop across R L
for negative half cycle, the diode is reverse biased and hence, it does not conduct.
Now no current flows in the circuit i.e. iD=0 and vO=0.Thus for negative half cycle no
power is delivered to the load.

Analysis:
(i) DC Output Voltage:
Let a sinusoidal voltage Vi be applied to the input of the rectifier. Hence,
2
1
Vdc 
2  V d (t )
0
i
2
1

2 V
0
m sin td (t )

1
2 0
 [ Vm sin(t ) d (t )  0]
1
 Vm [  cos t ]0
2
V
Vdc  m

(ii) RMS Voltage:

2 1
1
[ V d (t )]
2 2
Vrms
2
i
0
 1
1
[  Vm sin td (t )] 2
2 2
2 0
Vm2 sin 2 t  12
[ [t  ]0 ]
2 2
V
Vrms  m
2
(iii) Ripple Factor:

It is defined as the ratio of the effective value of the ac component of voltage or
current to the direct or average value. Hence,
(Va ) rms
y
Vdc
1
Vrms
y [  1] 2
Vdc

2. Full Wave Rectifier:

In full wave rectification, current flows through the load in the same direction for both
half waves of ac input voltage. The following two circuits are commonly used for full
wave rectification.
(A) Center Tap Full-Wave Rectifier:
(i) Without Capacitor:
Circuit diagram
When input ac supply is switched on as shown in fig. the ends M and N of the
transformer secondary becomes positive and negative alternatively. During positive,
the diode D1, is forward biased, i.e. it conducts. But during (-ve) half cycle, diode D2
is conduct. Thus the current flows through RL in the same direction in both half
cycles of ac input.
Analysis:
Let the input voltage, Vi is given by,
Vi= Vm sin t

(a) DC Output Voltage:

2
1
Vdc 
2  V d (t )
0
i
2
1

2 V
0
m Sin(t )d (t )
 2
1  
   Vm Sin(t )d (t )   Vm Sin(t )d (t )
2  0  
2V
Vdc  m

(b) RMS Voltage:
Vm
Vrm s 
2
(c) Ripple Factor:
.
(B) Full-Wave Bridge Rectifier:
Circuit diagram

In full wave bridge rectifier four diodes are used. During positive half cycle, terminal
M of secondary of transformer is positive while the terminal N is negative. In this
case diodes D1 and D3 are forward biased i.e. they conducts whereas diodes D2
and D4 are reversed biased.
(i) Without Capacitor:
Circuit diagram
The analysis of full wave bridge rectifier is same as that of full wave rectifier. Hence,
1.
2.
3.
PROCEDURE:
(A) For half wave rectifier (with out capacitor):
1. Make the circuit diagram as shown.
2. By the help of CRO, measure maximum voltage and then dc voltage and
RMS voltage.

(B) For full wave rectifier (with out capacitor):

1. Make the circuit diagram as shown
2. By the help of CRO, measure maximum voltage and the vdc and vrms.
OBSERVATIONS:
1. Half wave rectifier without capacitor:
2. Full wave rectifier (center tapped) with out capacitor:

Vm  ?
2Vm
Vdc 

V
Vrms  m
2
Vac  (vrms ) 2  (vdc ) 2
Vac
rf 
Vdc
3. Full wave rectifier (bridge type) with out capacitor:

Vm  ?
2Vm
Vdc 

Vm
Vrms 
2
Vac  (vrms ) 2  (vdc ) 2
Vac
rf 
Vdc

PRECUATIONS:
1. The supply should be switched on after the circuit elements connected
properly.
2. Both the terminals of the oscilloscope should not be allowed to touch each-
other.
3. The dc supply should be properly given to the capacitor terminals; otherwise it
should start heating up.
CONCLUSION:

EXPERIMENT - 5
AIM OF THE EXEPERIMENT:
V-I (Output) Characteristics of N-P-N/P-N-P Transistor in CE

Configuration
APPARATUS REQUIRED:
Sl. No Name of the component Specification Quantity
1 Multimeter Digital 1
2 Transistor BC547 1
NPN
3 Potentiometer 4.7KΩ 2
4 Resistor 1KΩ,100KΩ 2
5 D.C. Power supply 6v and 12V --
6 Connecting wires -- As Per Required
7 Bread board -- 1
THEORY:-
The transistor is a solid state device and is an essential ingredient of every electronic
circuit. This is analogous to vacuum triode. The main difference is that transistor is a
current device while vacuum triode is a voltage device. The advantages of
transistors over a vacuum triode are long life, high efficiency, light weight, smaller in
size, smaller power consumption etc.

Bipolar junction transistor is a three terminal, two junction device. A junction

transistor is simply a sandwich of one type of semiconductor material between two
layers of the other type. Accordingly, there are two types of transistors: P-N
transistor and P-N-P transistor. When a layer of n-type material is sandwiched
between two layers of p-type material, the transistor is known as p-n-p transistor.
Characteristics of Common Emitter Connection:

In this configuration, the signal is applied between base and emitter and the output is
taken from collector and emitter. The important characteristics of this circuit
arrangement are the input characteristics and output characteristics.
(COMMON EMITTER CIRCUIT)

(CE CIRCUIT EXPERIMENTAL SETUP)
Input Characteristics:
It is the curve between base current IB and base emitter voltage V BE at constant
collector-emitter voltage VCE .the input chartestics of a CE configuration can be
determined by the circuit shown in fig. keeping V CE constant, the base current IB for
various values of VBE was noted. Then the reading obtained was plotted on the
graph, taking IB along y-axis and VBE x-axis. This gives the input characteristics at
VCE=3v as shown in the fig. following a similar procedure, a family of input
characteristics can be drawn. The following points may be noted form the
chartetstics:-
1. The characteristics resembles that of a forward biased diode curve. This is
expected since the base-emitter section of transistors is a diode and it is
forward biased.
2. As compared to CB arrangements, IB increases less rapidly with VBE.
Therefore, input resistance of CE circuit is higher than that of CB circuit.

Output Characteristics:
It is the curve between collector current IC and collector emitter voltage VCE at
constant base current, IB . The output characteristic of a CE circuit can be drawn with
the help of the circuit shown in the fig. keeping the base current I B fixed at some
value and collector current IC for various values of VCE was noted. Then the readings
were plotted on a graph, taking IC along y-axis and VCE along x-axis. This gives the
output characteristics at IB=5μA. The following points may be noted:-
1. The collector current, IC varies with VCE, for VCE between 0 and 1v only. After
this, collector current becomes almost constant and independent of VCE. This
values of VCE up to which IC changes with VCE is called knee voltage. The
transistors are always operated in the region above knee voltage.
2. Above knee voltage, IC is almost constant. However with small increases in IC
with increasing VCE is caused by the collector depletion layer getting wider
and capturing a few more majority carries before electron hole c combinations
occur in the base area.
3. For any value of VCE above knee voltage, the IC is approximately equal to βIB.

PROCEDURE:
1. Make the circuit diagram as shown in fig.
2. Set both the potentiometer at 0v.
3. Now, for input characteristics, set VCE=3v and fix it.
4. Vary VBE, slowly in the range of 0.1v to up to end position of the
potentiometer.
5. Measure the corresponding values of base-emitter voltage VBE, voltage drop
across base resistor and find base current.
6. Plot the graph between IB and VBE.
7. Repeat the above procedure for VCE=4v.
8. Now for output characteristics set IB=5μA i.e. fix VBE at 0.5v.
9. Vary VCE slowly 1 to 12v.
10. Measure the corresponding values of collector-emitter voltage VCE, voltage
drop across collector resistor VRC and collector current IC.
11. Plot the graph between IC and VCE, at constant IB.
12. Repeat the above experiment for base current, IB=10μA.

OBSERVATIONS:
Reading for input:
1. At VCE=0V and RB=?
SL.NO VBE (V) VRB (V) IB=VRB/RB (μA)

SL.NO VBE (V) VRB (V) IB=VRB/RB

SL.NO VBE (V) VRB (V) IB
Reading for output:

1. At IB=10μA and RC=?
SL.NO VCE (V) VRC (V) IC=VRC/RC (ma)

SL.NO VCE (V) VRC (V) IC=VRC/RC

SL.NO VCE VRC IC
CONCLUSION:

EXPERIMENT - 6
Verification of Truth table of Logic gates (AND, OR,NOT, NAND, NOR,

EX-OR)
APPARATUS REQUIRED:
Sl No Name of the Component Specification Quantity
1 L.E.D Green/Blue 1
2 Bread board -- 1
3 D.C.Power Supply box 0-5v 1
Quad 2 input AND gate 7408 1
Quad2inputNAND gate 7400 1
Quad 2 input OR gate 7432 1
4 Quad2 input NOR Gate 7402 1
Quad 2 input XOR Gate 7486 1
Hex inverter NOT Gate 7404 1
5 Connecting wires - As Per Requirement
THEORY:
Logic gate is a circuit that performs a logic function on a number of inputs as binary
digital signal. It processes digital signals which represents TRUE and FALSE.
AND Gate:
The AND gate is a logic gate that has two or more inputs but only one output. The
output Y of AND gate is HIGH (1) when all the inputs are HIGH (1). However, the
output Y of AND gate is LOW (0) if any or all inputs are LOW (0). The (.) sign
represents the AND operation.
The Boolean expression for AND gate is,

A.B=Y

OR Gate:
An OR gate is a logic gate that has two or inputs but only one output. The output Y of
an OR gate is low (0) when all inputs are low (0). The output Y of an OR gate is high
(1) if any or all the inputs are high (1).
The algebra used to symbolically describe logic functions is called Boolean algebra.
The (+) sign in Boolean algebra refers to the logical OR function. The Boolean
expression for OR function is
A+B=Y
NOT Gate:
The output signal is always the compliment or opposite of the input signal. If low
input (0) is given as input then the output is high (1) and if input is high (1), then the
output is low (0).
Note: NOT gate is also called as Inverter.

NAND Gate:
The NAND gate is a popular logic element because it can be used as universal gate,
that is the NAND gates can be used in combination to perform the AND, OR and
inverter operation. The term NAND is a contraction of NOT-AND and implies an AND
function with a complemented (inverted) output.
A NAND gate produces a LOW output only when all the inputs are HIGH. When any
of the input is LOW, the output will be HIGH.
Exclusive OR Gate (XOR Gate):

The name Exclusive OR gate is usually shortened to XOR gate. The XOR gate can
be represented as Y= A B to perform the Boolean algebra operation. The symbol
( ) represents Exclusive OR operation. The output is HIGH when input
combinations contain odd number of 1s.

NOR Gate:
Logically it is a combination of OR gate and NOT gate. In other words, output of OR
gate is connected to the input of a NOT gate. The output of an OR gate is inverted to
give NOR operation. This is illustrated in the truth table for NOR gate is developed
by inverting the outputs of OR gate.
The Boolean expression for NOR gate is,
The Boolean expression can be read as Y= NOT (A OR B). To perform the Boolean
algebra operation, first the inputs must be ORed and then the inversion is performed.
The output from a NOR gate is HIGH (1) only when all the inputs are LOW (0). If any
of the inputs is HIGH (1), the output is LOW (0).
Note: Quad means four, Hex means Six.

PROCEDURE:
The given breadboard with pre-embedded IC’s is taken.
1. Arbitrarily an IC is chosen according to its number.
2. In all the IC pin no 7 is connected to ground and pin no 14 is connected to Vcc
of the power supply.
3. Connect the LED‫׳‬s anode terminal to the output of the IC and cathode to the
ground. As per the PIN configuration of the IC, circuit is build.
4. The two inputs are then connected to the IC from power supply and the
output is seen on LED.
5. Verify the truth table for different conditions of a particular gate.
6. The same procedure is repeated for all the other IC’s given.
OBSERVATION:
1) NAND Gate (IC 7400):
INPUT OUTPUT REMARKS
A B
0 0
0 1
1 0
1 1
2) AND Gate (IC 7408):

A B
0 0
0 1
1 0
1 1
3) OR Gate (IC 7432):

A B
0 0
0 1
1 0
1 1

4) XOR Gate (IC 7486):

INPUT
A B OUTPUT REMARKS
0 0
0 1
1 0
1 1
5) NOR Gate (IC 7402):

A B
0 0
0 1
1 0
1 1
6) HEX Inverter (IC 7404):

A
0
1
CONCLUSION:

EXPERIMENT - 7

OP-AMP: Inverting and Non-Inverting Configuration. Record of
Waveforms.
.
APPARATUS REQUIRED:
Sl. No. Name of the Component Specification Quantity
1 Operational amplifier µA/LM 741 1
2 Bread board -- 1
3 D.C.Power Supply box Step down type (+12 ,-12 gnd) 1
4 CRO As per the device given 1

5 Function Generator As per the device given 1
6 Resistor 1kΩ ,100Ω,4.7kΩ 3
7 Capacitor (ceramic) 0.1µf 2
8 Connecting wire - As Per
Required
THEORY:
Operational Amplifier (Op-Amp):
An operational amplifier is a very high gain amplifier having very high input
impedance (typically a few mega ohms) and low output impedance(less than
100ohm). The fig(1) shows a basic op-amp unit. The positive input produces an
output that is in phase with the signal applied, whereas an input to the negative
results in an opposite polarity output. The ac equivalent circuit of the op-amp is
shown in fig(2). From the fig(2) the input signal applied between input terminals
having an input impedance of Ri that is typically very high. The output voltage is
shown to be the amplifier gain at the time the input signal taken through the output
impedance Ro, which is typically very low. An ideal op-amp circuit as shown in fig
would have infinite input impedance, zero output impedance and infinite voltage

gain. The input terminal marked with –ve sign is called as inverting input terminal.
The –ve sign indicates that a signal applied at the terminal A will appear amplified
but phase inverted (opposite polarity) at terminal C. Similarly the terminal B marked
with +ve sign is called as the non-inverting input terminal. Here, the +ve sign
indicates that the terminal B will appear amplified but in phase at the terminal C.
Then the –ve and +ve sign doesn’t mean that the voltages V1 and V2 are –ve and
+ve, respectively. When no resistor or capacitor is connected from the output to any
of the input terminals, the op-amp is said to be in open-loop condition. Here, the
word open signifies that feedback path or loop is open.
1. Inverting Op-Amp:
In this mode of operation, the positive input terminal of the amplifier is grounded and
input signal is applied to the negative input terminal. Feedback currents are
algebraically added at point G (fig3), so this point is called as summing point. The
point G attains some positive potential. Thus the point G although not connected to
the ground but is held virtually at the ground potential irrespective of the potential V1
and V0.
The current I1 flowing through the point G is,

V1  Vi
I1 
R1
Similarly,

Vi  Vo  Vo
I2  
Rf Rf
At point G,
V1 VO

R1 R f
The ratio of output voltage Vo and input voltage Vi is known as voltage gain of the
amplifier. Voltage gain,
VO  R f
AV  
VI R1
Rf
=> VO  Vi
R1
Input output
2. Non-Inverting Op-Amp:
Here, the input voltage V2 is applied to the non-inverting amplifier. The potential of
point G is alsoV2 since the gain of the op-amp is infinite. The polarity of Vo is the
same as that of V2. The voltage across R1 is V2 and across Rf is (Vo-V2).
The values of current I1 and I2 are given by,

V2 VO  V2
I1  and I 2 
R1 Rf
Applying Kirchhoff’s law at point G is,

( I1 )  I 2  0
V2 VO  V2
  0
R1 Rf
VO V V 1 1
 2  2  V2 (  )
Rf R1 R f R1 R f
VO R1  R f Rf
  (1  )
V2 R1 R1
Rf
AV  (1  )
R1
Rf
VO  (1  )Vi
R1

Input output
PROCEDURE:
1. Make the circuit as per the circuit diagram.
2. Set the input of the function generator with desired voltage , frequency &
waveform.
3. Connect the output of the circuit to the CRO.
4. Trace the output waveform along with the input waveform and calculate the
voltage and voltage gain.
5. Repeat the procedure for all configuration and trace the input and output
waveforms.
6. Compare the output waveform and voltage gain with the theoretical values.
OBSERVATION AND CALCULATION:
1) For Inverting:
AV (Theoretical) = -Rf/R1
AV (Practical) = VO/Vi
Percentage of Error = │Theoretical value – Practical value │ × 100
Theoretical value
2) For Non-Inverting:
AV (Theoretical) = 1+Rf/R1
AV (Practical) = VO/Vi
Percentage of Error = │Theoretical value – Practical value │ × 100
Theoretical value
CONCLUSION:

EXPERIMENT - 8
Measurement of pinch off voltage and plot transfer characteristics and

drain characteristics of JFET.
APPARATUS REQUIRED:
SL.NO. APPARATUS SPECIFICATION QUANTITY
1. JFET BF245 01-EACH
1KΩ,1MΩ,4.7KΩ,470Ω
2. RESISTORS 01-EACH
2.2MΩ,2.7KΩ,680KΩ
3. BREAD BOARD 01
4. DIGITAL MULTIMETER 01
5. POWER SUPPLY +12V 01

6. PATCHING WIRES AS REQUIRED
Theory:
The Field Effect Transistor is a three terminal uni-polar semiconductor device

that has very similar characteristics to those of their Bipolar Transistor counterparts
i.e., high efficiency, instant operation, robust and cheap and can be used in most
electronic circuit applications to replace their equivalent bipolar junction transistors
(BJT) cousins. Field effect transistors can be made much smaller than an equivalent
BJT transistor and along with their low power consumption and power dissipation
makes them ideal for use in integrated circuits such as the CMOS range of digital
logic chips. This is also true of FET's as there are also two basic classifications of
Field Effect Transistor, called the N-channel FET and the P-channel FET. The Field
Effect Transistor has one major advantage over its standard bipolar transistor
cousins, in that their input impedance, Rin is very high, (thousands of Ohms), while
the BJT is comparatively low. This very high input impedance makes them very
sensitive to input voltage signals.

Characteristic:-
1. VGS = 0V , VDS - Some +ve Value:
As shown in the figure the gate is directly connected to source to achieve VGS =
0V, this is similar to no bias condition. The instant the voltage VDD (=VDS) is
applied, the electrons will be drawn to the drain terminal, causing ID & IS to flow
(i.e. ID = IS). Under this condition the flow of charge is limited solely by
resistance of the n channel between drain & source. It is important to note that

the depletion region wider at the top of both p type of material. Since the upper
terminal is more R .B. than the lower terminal (source - S).
As voltage VDS is increased from 0 to few volts, the current will increase as
determined by ohm’s law. If still VDS is increased & approaches a level referred
as VP, the depletion region will widen, causing a noticeable reduction in channel
width. The reduced path of conduction causes the resistance to increase. The
more the horizontal curve, the higher resistance.
If VDS is increase to a level where it appears that the two depletion region would
touch each other, the condition referred as ‘pinch–off’ will result. The level of
VDS that establish this condition is called as ‘pinch off voltage’ (VP). At VP, ID
should be zero, but practically a small channel still exists & very high density
current still flows through the channel. As VDS is increased beyond VP, the
saturation current will flow through the channel (i.e IDSS). IDSS – Drain to
source current with short cut connection from source to Gate.
2. VGS < 0V:-
If a –ve bias is applied between gate and source, the effect of the applied –ve
bias VGS is to establish depletion region similar to those obtained with VGS = 0V
but at lower level of VDS. As VGS will become more & more –ve biased, the
depletion layer pinch off occur at the less & less value of VDS. Eventually, when
VGS = - VP, will be sufficiently –ve to establish a saturation level, i.e. essentially
0 mA & for all practical purpose the device has been ‘turned OFF’.
JFET Operating Characteristics:
JFET ID Equation:
2
 
ID  I  VGS 
DSS  1 V 
 P 

JFET Transfer Curve:
Plotting the JFET Transfer Curve

Using IDSS and VP (VGS (off)) values found in a specification sheet, the transfer curve
can be plotted according to these three steps:
Step 1
2
 V 
I D  I DSS 1  GS 
 VP 
Solving for VGS = 0V ID = IDSS
Step 2
2
 V 
I D  I DSS 1  GS 
 VP 
Solving for VGS = VP (VGS (off)) ID = 0A
Step 3
Solving for VGS = 0V to VP
2
 V 
I D  I DSS 1  GS 
 VP 

OUTPUT CHARACTERISTICS:
1. Connect the circuit as per given diagram properly.
2. Keep VGS = 0V by varying VGG
3. Vary VDS in step of 1V up to 10 volts and measure the drain current ID. Tabulate
all the readings.
4. Repeat the above procedure for VGS as -0.5, -1V, -1.5V, -2V, -2.5V, -3V, -3.5V
etc
OBSERVATION TABLE:
OUTPUT / DRAIN CHARACTERISTICS-
VGS = 0 V VGS = -0.5 V VGS = -1 V VGS = -1.5 V VGS = -2 V
….. upto -3.5 V
VDS (V) ID (mA) VDS (V) ID (mA) VDS (V) ID (mA) VDS (V) ID (mA) VDS (V) ID (mA)
0 0 0 0 0
1 1 1 1 1
2 2 2 2 2
. . . . .
. . . . .
. . . . .
Upto 10 Upto 10 Upto 10 Upto 10 Upto 10
TRANSFER CHARACTERISTICS
VDS = 10 V
VGS (V) ID (mA)
-0.5
-1
-1.5

-2
-2.5
-3
-3.5
CALCULATION:
1. Drain saturation current IDSS: Maximum current flowing

through JFET when gate to source voltage is zero.
2. Pinch-off voltage VP: Gate to source voltage at which, drain current

becomes zero.
3. Tran conductance gm : Ratio of small change in drain current (Δ

ID) to the corresponding change in gate to source voltage (ΔVGS)
for a constant VDS.
gm = Δ ID / ΔVGS at constant VDS
4. Output resistance: It is given by the relation of small change in

drain to source voltage (Δ VDS) to the corresponding change in
Drain Current (Δ ID) for a constant VGS, when the JFET is
operating in pinch-off region.
a) rd or ro = ΔVDS / Δ ID at a constant VGS
RESULTS:
1. IDSS :
2. VP :
3. gm :
4. ro :
CONCLUSION:

EXPERIMENT - 9
Transfer characteristics and drain characteristics of MOSFET.

APPARATUS REQUIRED:
Sl No Name of the Component Specification Quantity
1 MOSFET IRF 740 1 No
2 Resistor 560Ω 1 No
3 Ammeter (DC) 0-60mA 1 No
4 Voltmeter (DC) 0-60V 1 No
5 Voltmeter (DC) 0-30V 1 No
6 Multimeter - 1 No
7 VRPS 0-30V 3 Nos
8 Connecting wires - Few
THEORY:
A MOSFET (Metal oxide semiconductor field effect transistor) has three terminals
called Drain, Source and Gate. MOSFET is a voltage controlled device. It has very
high input impedance and works at high switching frequency.
MOSFET’s are of two types 1) Enhancement type 2) Depletion type.
TABULAR COLUMN:
(A)Transfer Characteristics:
VCE1= Volts VCE2= Volts

VGE (V) IC(mA) VGE (V) IC(mA)

(B) Output Characteristics:
VGS1= Volts VGS2= Volts

VDS (V) ID (mA) VDS (V) ID (mA)
CALCULATION:
Trans conductance:
Output Resistance:
PROCEDURE:
A) Transfer Characteristics:
1. Make the connections as per the circuit diagram.
2. Initially keep V1 and V2 at 0 V.
3. Switch ON the regulated power supplies. By varying
V1, set VDS to some constant voltage say 5V.
4. Vary V2 in steps of 0.5V, and at each step note down
the corresponding values of VGS and ID. (Note: note
down the value of VGS at which ID starts increasing as
the threshold voltage).
5. Reduce V1 and V2 to zero.

6. By varying V1, set VDS to some other value say 10V.

7. Repeat step 4.
8. Plot a graph of VGS versus ID for different values of VDS.
B) Drain or Output Characteristics:

1. Make the connections as per the circuit diagram.
2. Initially keep V1 and V2 at zero volts.

3. By varying V2, set VGS to some constant voltage (must
be more than Threshold voltage).
4. By gradually increasing V1, note down the
corresponding value of VDS and ID. (Note: Till the
MOSFET jumps to conducting state, the voltmeter
which is connected across device as VDS reads
approximately zero voltage. Further increase in voltage
by V1 source cannot be read by VDS, so connect
multimeter to measure the voltage and tabulate the
readings in the tabular column).
5. Set VGS to some other value (more than threshold voltage) and
repeat step 4.
6. Plot a graph of VDS versus ID for different values of VGS.
Note: If VDS is lower than VP (pinch-off voltage) the device works in the
constant resistance region that is linear region. If V DS is more than VP, a
constant ID flows from the device and this operating region is called constant
current region.
CONCLUSION:

EXPERIMENT - 10

Implementation of digital circuit using Universal gates
APPARATUS REQUIRED:
S. Name of the Quantity

No Component
1 IC 7400 01
.
2 IC 7402 01
.
3 Digital Trainer Kit 01
.
4 Bread Board 01
.
B. Circuit Diagram:
I. Implementation using NAND gate:
NOT gate: = '

A Y
0 1
1 0
AND gate: = ·
A B Y
0 0 0
0 1 0
1 0 0
1 1 1

OR gate: = +
A B Y
0 0 0
0 1 1
1 0 1
1 1 1
NOR gate: = ( + )′
A B Y
0 0 1
0 1 0
1 0 0
1 1 0
Ex-OR gate: = ’ +AB’
A B Y
0 0 0
0 1 1
1 0 1
1 1 0
Implementation using NOR gate:

NOT gate: = '
A Y
0 1
1 0
AND gate: = ·
A B Y
0 0 0
0 1 0
1 0 0
1 1 1

OR gate: = +
A B Y
0 0 0
0 1 1
1 0 1
1 1 1
NAND gate: =( )′
A B Y
0 0 1
0 1 1
1 0 1
1 1 0
Ex-NOR gate: = ( ’B+AB’)’

A B Y
0 0 1
0 1 0
1 0 0
1 1 1
Procedure:
a) Connections are made as per the circuit diagram I & II.
b) By applying the inputs, the outputs are observed and the operation is verified
with the help of truth table.
CONCLUSION:

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BASIC ELECTRONICS

For 1ST /2ND SEMESTER, B.Tech Students

Dept. of Electronics and Communication Engineering

RULES & REGULATIONS .......................................... Error! Bookmark not defined.

FORMAT FOR RECORD WRITING ......................... Error! Bookmark not defined.

MARK DISTRIBUTION ............................................... Error! Bookmark not defined.

LIST OF EXPERIMENTS ............................................ Error! Bookmark not defined.

LIST OF EXPERIMENTS TO BE PERFORMED .... Error! Bookmark not defined.

EXPERIMENT NO. - 01 .............................................................. Error! Bookmark not defined.

EXPERIMENT NO. -02 ............................................................... Error! Bookmark not defined.

EXPERIMENT No. - 03 .............................................................. Error! Bookmark not defined.

EXPERIMENT NO. - 04 .............................................................. Error! Bookmark not defined.

EXPERIMENT NO. -05 ............................................................... Error! Bookmark not defined.

EXPERIMENT NO. -06 ............................................................... Error! Bookmark not defined.

EXPERIMENT NO. -07 ............................................................... Error! Bookmark not defined.

EXPERIMENT NO. -08 ............................................................... Error! Bookmark not defined.

EXPERIMENT NO. -09 ............................................................... Error! Bookmark not defined.

EXPERIMENT NO. -10 ............................................................... Error! Bookmark not defined.

RULES & REGULATIONS

1. Don’t be late to the lab.

PARALA MAHARAJA ENGINEERING COLLEGE

FORMAT FOR RECORD WRITING

1. Maintain the CONTENT page with date of performing the experiment,

3. Theory (Theoretical Circuit diagram must be included)

Sl. No. Parts Marks

I hereby Mr./Ms………………………………………………..with roll

Date: Signature of the student

PARALA MAHARAJA ENGINEERING COLLEGE

LIST OF EXPERIMENTS (AS PER BPUT SYLLABUS)

1. Familiarity with electronic components and devices (Testing of

LIST OF EXPERIMENTS TO BE PERFORMED

1. Familiarity with electronic components and devices (Testing of

PARALA MAHARAJA ENGINEERING COLLEGE

AIM OF THE EXPERIMENT:

PARALA MAHARAJA ENGINEERING COLLEGE

Resistor Colour Code:

Note 1: A 0Ω resistor, marked with a single black band.

PARALA MAHARAJA ENGINEERING COLLEGE

PARALA MAHARAJA ENGINEERING COLLEGE

Light Emitting Diode:

PARALA MAHARAJA ENGINEERING COLLEGE

4. Testing of Semiconductor Diode

5. Testing of Semiconductor Transistor

6. Testing of Integrated Circuit

7. Testing of LED (Light Emitting Diode)

2. Keep multimeter knob on resistance range (near Diode symbol).

OBSERVATION AND CALCULATION:

SPECIFICATION TOTAL PIN NO.

PARALA MAHARAJA ENGINEERING COLLEGE

AIM OF THE EXPERIMENT:

PARALA MAHARAJA ENGINEERING COLLEGE 1

PARALA MAHARAJA ENGINEERING COLLEGE 2

PARALA MAHARAJA ENGINEERING COLLEGE 3

Internal Design of CRT

PARALA MAHARAJA ENGINEERING COLLEGE 4

Percentage of error = │theoretical frequency – practical frequency │ × 100

PARALA MAHARAJA ENGINEERING COLLEGE 5

Time period (T) = no of Horizontal division * time / div

PARALA MAHARAJA ENGINEERING COLLEGE 6