DLD Set 1

Implementation of half-adder
Objectives:
Designing a half adder involves creating a circuit that accurately adds two single-bit binary
numbers, producing the correct sum and carry outputs for all input combinations. Optimization
is essential, aiming for minimal gate usage and compatibility with other circuits. Attention to
logical correctness, low propagation delay, and thorough documentation ensures the half-adder
functions efficiently within broader digital systems.
Materials:
o Breadboard
o Logic gates (AND, XOR, OR)
o Connecting wires and jumper cables
o Power supply
o Switches
o LEDs
Procedure:
1. A half adder circuit consists of two input terminals namely A and B.
2. Both of these add two input digits (one-bit numbers) and generate the output in the
form of a carry and a sum.
3. Thus, there are two output terminals. The output that one obtains from the EX-OR gate
is the sum of both the one-bit numbers.
Figure 1: Half adder Block diagram.

Figure 2: Half adder Circuit diagram.
Truth table:
Snapshot of the circuit:
Figure 3: Connected with the circuit.
Conclusion:
In summary, test the half adder for input combinations, check outputs against the truth table,
and assess timing, robustness, and power supply variation using tools like logic probes.
Consistent results indicate a reliable half-adder for binary addition in digital systems.
Implementation of full-adder
Objectives:
Testing a full adder involves validating input combinations, verifying outputs against the truth
table (Sum and Carry), assessing timing, testing robustness to noise, evaluating performance
under various power supply conditions, and confirming proper response to simultaneous input
changes. Comprehensive documentation of results ensures effective analysis and reference for
future use.
Materials:
o Breadboard
o Logic gates (AND, XOR)
o Power supply
o Switches
o LEDs
Procedure:
1. Implement full adder using half adder. A full adder is an adder that adds three inputs
and produces two outputs.
2. The first two inputs are A and B and the third input is an input carry as C-IN.
3. The output carry is designated as C-OUT and the normal output is designated as S which
is SUM.
Figure 4: Full adder Block diagram.

Figure 5: Full adder Circuit diagram.
Truth table:
Conclusion:
A full adder is a combinational circuit that forms the arithmetic sum of input; it consists of three
inputs and two outputs. A full adder is useful to add three bits at a time but a half adder cannot
do so.
Implementation of Half Subtractor
Objectives:
A half subtractor is a fundamental binary arithmetic circuit with the primary objective of
computing the difference (D) and borrowing (B) between two binary digits, typically denoted as
A and B. The circuit outputs these results in two bits: the calculated difference (D) and the
borrow (B) bit. Its succinct functionality is captured by a truth table, detailing the output states
based on various combinations of input values.
Materials:
o Breadboard
o Logic gates (AND, XOR, NOT)
o Power supply
o Switches
o LEDs
Figure 7: Half subtractor Block diagram.
The SOP form of the Diff and Borrow is as follows:

Diff= A'B+AB'
Borrow = A'B
Figure 8: Half subtractor circuit diagram.
Truth table:
Procedure:
1. ‘A’ and ‘B’ are the input variables whose values are going to be subtracted.
2. The ‘Diff’ and ‘Borrow’ are the variables whose values define the subtraction result, i.e.,
difference and borrow.
3. The first two rows and the last row, the difference is 1, but the ‘Borrow’ variable is 0.
4. The third row is different from the remaining one. When we subtract the bit 1 from the
bit 0, the borrow bit is produced.

Conclusion:
The half subtractor circuit is a key component of digital circuits that illustrates bit manipulation
operations on binary numbers.
Implementation of Full Subtractor
Objectives:
The objectives of a full subtractor circuit include accurately performing binary subtraction,
generating a correct borrow output, ensuring efficiency in terms of speed and power
consumption, and maintaining reliability across various input conditions for seamless
integration into digital systems.
Materials:
o Breadboard
o Logic gates (AND, XOR, NOT, OR)
o Power supply
o Switches
o LEDs
Figure 10: Full subtractor Block diagram.

Figure 8: Half subtractor circuit diagram.
Truth table:
Procedure:
1. Receive three inputs - minuend (A), subtrahend (B), and borrow in (Bin).
2. Compute the difference (D) between A and B, considering the borrow input (Bin) from the
previous stage.
3. Determine the borrow output (Bout) based on the values of A, B, and Bin.
4. Output the computed difference (D) and the borrow output (Bout).

Conclusion:
a full-subtractor is a combinational logic circuit that can compute the difference of three binary
digits

DLD Set 1

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Implementation of half-adder

Figure 1: Half adder Block diagram.

Snapshot of the circuit:

Figure 3: Connected with the circuit.

Figure 4: Full adder Block diagram.

Figure 6: Connected with the circuit.

Figure 7: Half subtractor Block diagram.

The SOP form of the Diff and Borrow is as follows:

Snapshot of the circuit:

Figure 9: Connected with the circuit.

Figure 10: Full subtractor Block diagram.

Snapshot of the circuit:

Figure 9: Connected with the circuit.

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