DTE Final Report With Diary
DTE Final Report With Diary
1.0 Introduction:
In the realm of digital electronics, arithmetic operations form the backbone of
computational tasks, ranging from simple calculations to complex algorithms. One
fundamental building block in this domain is the Full Adder, a crucial component used
for binary addition. A Full Adder is an essential piece of the puzzle when it comes to
designing circuits that perform arithmetic operations on binary numbers.
We will embark on a journey to understand the fundamental concept of a Full Adder,
explore its basic building blocks, delve into its truth table, and discuss its
implementation using basic logic gates. This report aims to equip the reader with a
thorough understanding of Full Adders and their role in digital computation, enabling
them to appreciate the elegance of digital circuit design and its practical significance in
today's technology-driven world
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SHARAD INSTITUTE OF TECHNOLOGY, POLYTECHNIC YADRAV
FULL ADDER Using Gates
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SHARAD INSTITUTE OF TECHNOLOGY, POLYTECHNIC YADRAV
FULL ADDER Using Gates
3. IC 7486 1 Yes
4. IC 7408 1 Yes
5. IC 7432 1 Yes
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SHARAD INSTITUTE OF TECHNOLOGY, POLYTECHNIC YADRAV
FULL ADDER Using Gates
7.1 Working
Full Adder is the adder that adds three inputs and produces two outputs. The first two inputs are
A and B and the third input is an input carry as C-IN. The output carry is designated as C-OUT
and the normal output is designated as S which is SUM. The C-OUT is also known as the
majority 1’s detector, whose output goes high when more than one input is high.
A full adder logic is designed in such a manner that can take eight inputs together to create a
byte-wide adder and cascade the carry bit from one adder to another. we use a full adder
because when a carry-in bit is available, another 1-bit adder must be used since a 1-bit half-
adder does not take a carry-in bit. A 1-bit full adder adds three operands and generates 2-bit
results.
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SHARAD INSTITUTE OF TECHNOLOGY, POLYTECHNIC YADRAV
FULL ADDER Using Gates
7.3 K-map
CARRY = (A B) + (B C) + (A C)
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SHARAD INSTITUTE OF TECHNOLOGY, POLYTECHNIC YADRAV
FULL ADDER Using Gates
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SHARAD INSTITUTE OF TECHNOLOGY, POLYTECHNIC YADRAV
FULL ADDER Using Gates
Position the XOR gates, AND gates, and OR gate on the breadboard. Ensure they are
securely connected to the power supply (VCC) and ground (GND) pins.
Connect the VCC pin of the ICs to the positive rail of the breadboard and the GND pin to
the ground rail. Ensure proper power connections.
Connect the three input switches (for A, B, Cin) to the breadboard. Connect one terminal of
each switch to the power rail (VCC) and the other terminal to the input pins of the XOR
and AND gates.
Place the LED indicators for Sum and Cout on the breadboard. Connect one leg of each
LED to the output of the XOR and OR gates. Connect a current-limiting resistor in series
with the LEDs and then connect the other leg of the LEDs to the ground rail.
Connect the inputs and outputs of the XOR gates, AND gates, and OR gate according to the
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SHARAD INSTITUTE OF TECHNOLOGY, POLYTECHNIC YADRAV
FULL ADDER Using Gates
logic diagram of a full adder. Connect the output of the XOR gates to the Sum LED and the
output of the OR gate to the Cout LED.
Set the input switches to different combinations of 0 and 1 (for A, B, and Cin) and observe
the Sum and Cout LEDs. Verify that they respond correctly according to the full adder truth
table.
You can also test the full adder's functionality by connecting two full adders to perform
binary addition. This involves cascading the Cout of the first full adder to the Cin of the
second one.
Ensure all connections are secure, and wires are organized to minimize interference and
confusion.
Do not switch ON the power supply unless you have checked the circuit
connections as per the circuit diagram.
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SHARAD INSTITUTE OF TECHNOLOGY, POLYTECHNIC YADRAV
FULL ADDER Using Gates
11.0 Conclusion: -
The " FULL ADDER Using Gates " project successfully designed and implemented. The
implementation of a Full Adder using basic logic gates is an essential learning experience for
anyone interested in digital electronics. It exemplifies the beauty of digital logic, where
complex operations can be broken down into a sequence of simpler steps, and it showcases the
power of logic gates in creating functional and scalable digital systems.
12.0 Reference: -
1. https://chat.openai.com/
2. https://bard.google.com/?utm_source=sem&utm_medium=paid-
media&utm_campaign=q3enIN_sem6
3. Guided by Ms. S. S. Malame
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FULL ADDER Using Gates
Project Diary
BY
Students
Sr.no Date Work done Hours Guide sign
sign
1. 10-7-23 At first, we made the 15 min
group of 5 members.
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SHARAD INSTITUTE OF TECHNOLOGY, POLYTECHNIC YADRAV
FULL ADDER Using Gates
4. 15-8-23 After selection of 1 hour
project topic wise
searched the basic
information related to it
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SHARAD INSTITUTE OF TECHNOLOGY, POLYTECHNIC YADRAV
FULL ADDER Using Gates
11. 5-10-23 Some suggestions were 30 min
guided and we tried to
make it correct as per
the guide's requirement.
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