Location via proxy:   [ UP ]  
[Report a bug]   [Manage cookies]                
0% found this document useful (0 votes)
4 views10 pages

Integration: Fengjuan Wang, Ruinan Ren, Xiangkun Yin, Ningmei Yu, Yuan Yang

Download as pdf or txt
Download as pdf or txt
Download as pdf or txt
You are on page 1/ 10

INTEGRATION, the VLSI journal 81 (2021) 211–220

Contents lists available at ScienceDirect

Integration
journal homepage: www.elsevier.com/locate/vlsi

A transformer with high coupling coefficient and small area based on TSV
Fengjuan Wang a, *, Ruinan Ren a, Xiangkun Yin b, **, Ningmei Yu a, Yuan Yang a
a
School of Automation and Information Engineering, Xi’an University of Technology, Xi’an, 710048, China
b
School of Microelectronics, Xidian University, Xi’an, 710071, China

A R T I C L E I N F O A B S T R A C T

Keywords: Transformer is an important passive device, which is widely used in radio frequency (RF) Integrated circuit (IC).
Transformer In this paper, three-dimensional transformers with turn ratios of 1:1, 1:2, and 1:3 and with primary and sec­
Through-silicon via (TSV) ondary windings nested by TSV technology is proposed. To evaluate the characteristics, the proposed trans­
Three dimensional (3D) integration
formers are simulated by HFSS software. The simulation results show that their coupling coefficients are 0.966,
Integrated passive device (IPD)
0.966, 0.967, and their area are 3.6 × 10− 3, 6.0 × 10− 3, 9.6 × 10− 3mm2. Compared with the other literature, the
proposed transformers have good coupling and small area.

1. Introduction coupling coefficient less than 0.15, and the 1:1, 1:2 and 1:3 transformers
proposed in Ref. [25] have a coupling coefficient less than 0.71, which
With the continuous improvement of IC integration, the number of means large leakage. The coupling coefficients of transformers proposed
device units on the chip increases dramatically. The growth of inter unit in Refs. [21,22] are all higher than 0.8, but the size of transformers is
wiring not only affects the working speed of the circuit but also takes up still relatively large. Therefore, it is necessary to propose a TSV based 3D
a lot of area, which seriously affects the further improvement of IC transformer with high coupling coefficient and small area.
integration and working speed. So a new technology idea of 3D inte­ In this work, a 3D with nested structure based on TSV is proposed.
gration comes into being [1–4]. TSV is the core component of 3D inte­ This paper is organized as follows. In section II, taking a 1:1 transformer
grated circuit [5–8]. It can not only provide physical and electrical as an example, the structure of the proposed transformer is introduced.
connection between stacked chips, but also be used to make RF passive In section III, 1:1, 1:2, 1:3 transformers are simulated and analyzed. The
devices [9,10], such as inductors, capacitors, filters, transformers, etc transformer with the same turn ratio realized by different turns of pri­
[11–13]. The small chip area is a significant advantage of 3D passive mary and secondary windings is compared and discussed. Different
devices based on TSV, which also makes it have potential application in turns can have different coupling and different area consumption, so we
high integrated RF circuits [14–16]. should take both into consideration. And through the simulation results,
As an important passive device, transformer is widely used to realize the performance of the proposed transformers are analyzed. In section
impedance matching, low noise feedback, mixers, and voltage- IV, the manufacturing process and measuring method of transformer are
controlled oscillators. The traditional chip transformer is a planar or proposed. Finally, section V concludes this paper.
laminated structure, which is faced with the problem of large chip area
[17–20]. The existing research results show that the three-dimensional 2. 3D transformer based on TSV
transformer based on TSV can effectively reduce the large area of sili­
con consumption, and has better performance than the two-dimensional Fig. 1 shows the basic circuit symbols of a transformer with two
transformer, which is manifested in higher quality factor or better groups of windings. In the figure, M is the mutual inductance between
coupling [21–25]. Due to the limitation of silicon area and loss in cur­ the primary and secondary windings, LP, and LS are the self-inductance
rent and future RF IC design, it has become an important advantage of of the primary and secondary windings, respectively.
3D transformer. The main design of the transformer is to couple the AC current from
At present, there are some research results about the transformer one winding to another with the lowest possible leakage, which is re­
based on TSV. The 1:1 and 1:3 transformers proposed in Ref. [23] have a flected by the coupling coefficient k.

* Corresponding author.
** Corresponding author.
E-mail addresses: wfjxiao4@163.com (F. Wang), yinxkcn@163.com (X. Yin).

https://doi.org/10.1016/j.vlsi.2021.07.003
Received 26 June 2020; Received in revised form 19 March 2021; Accepted 17 July 2021
Available online 27 July 2021
0167-9260/© 2021 Elsevier B.V. All rights reserved.
F. Wang et al. Integration 81 (2021) 211–220

Fig. 1. Circuit symbols of a transformer with two groups of windings.

M
k = √̅̅̅̅̅̅̅̅̅̅ (1)
LP LS
If the coupling between the primary winding and the secondary
winding is complete, the coupling coefficient is 1, which also means that
there is no magnetic leakage between the windings. If there is no
coupling between the two windings, the coupling coefficient is 0. Also,
turn ratio n is another main parameter concerned by transformer de­
signers. The turn ratio reflects the variation of voltage, current and
impedance between windings. In addition, the area of on-chip trans­
former should also be concerned.
The mutual inductance of transformer is directly proportional to the
circumference between windings, so the maximum circumference be­
tween windings should be guaranteed in the design of transformer.
Moreover, in order to maximize the magnetic coupling between wind­
ings, adjacent conductors should belong to different windings. The
mutual inductance between adjacent conductors belonging to the same
winding has the function of self-inductance but not mutual inductance to
the transformer and lowers the coupling coefficient [17]. Finally, in
order to ensure the close magnetic coupling between the windings, the
designed transformer should have as little leakage as possible. Magnetic
flux leakage is the magnetic energy that the magnetic source leaks in
space through a specific magnetic circuit. Through the comprehensive
consideration of the above three aspects, this study proposes a kind of
transformer with nested structure.
Fig. 2(a) and (b) and 2(c) show the 3D view, main view, top view of
the structure of a one-turn 1:1 transformer and sectional view of TSV,
respectively. The common periphery between the two windings is the
length of the whole primary winding, realizing the first point. And the
layout of TSV and redistribution layer (RDL) which constitute the pri­
mary winding and secondary winding meets the second point. Finally,
the mutual encirclement between the coils can also ensure that the
magnetic field generated by one winding passes through the other
winding as much as possible. In this way, the coupling between primary
and secondary coils is enhanced and the magnetic flux leakage is
reduced. The area sharing of primary and secondary windings can also
be realized by using nested structure, which can avoid the doubling of
transformer area when the turns of primary and secondary windings
increase at the same time, because the two windings only need to occupy
one winding area in total. Therefore, the proposed transformer has two

Fig. 2. The structure of a one-turn 1:1 transformer. (a) 3D view, (b) main view,
(c) top view of one-turn 1:1 transformer, and (d) sectional view of TSV.

212
F. Wang et al. Integration 81 (2021) 211–220

Fig. 3. Working principle diagram of transformer.

characteristics of good coupling and miniaturization.


Next, take one-turn 1:1 transformer as an example to introduce the
structure of the proposed transformer in detail. One turn means that the
number of turns of primary and secondary windings are both one. The
proposed transformer includes top silicon dioxide layer, bottom silicon
dioxide layer and silicon substrate layer. The top silicon dioxide layer
comprises a top RDL1 and a top RDL2. The bottom RDL1 and the bottom
RDL2 are made in the bottom silicon dioxide layer. There are four rows
of TSV in the silicon substrate layer. Among them, the top RDL1 and the
bottom RDL1 connect the inner two rows of TSV one by one constitute
the primary winding of the transformer. The top RDL2 and the bottom
RDL2 connect the two rows of TSV on the outside one by on one
constitute the secondary winding of the transformer. It can be seen from
Fig. 2(a) that a nested structure is formed in which the primary winding
is surrounded by the secondary winding.
It can be seen from Fig. 3 that the primary winding and the secondary
winding have two terminals. When the transformer is working, the
primary winding and the secondary winding each need one terminal
(Gnd) for grounding, and the remaining two terminals (port 1 and port
2) are the input and output terminals of the transformer, as shown in
Fig. 2(a) We choose two opposite terminals for grounding, so as to
ensure that the input and output terminals (port 1 and port 2) of the
transformer are located on opposite sides, so as to facilitate the
connection of other circuits.
Based on the above transformer structure, a series of transformers
with turn ratio of 1:1, 1:2, and 1:3 are designed. One-turn, two-urns,
three-turns 1:1 transformer, two kind of 1:2 transformers with primary
winding of one turn, secondary winding of two turns (1:2 transformer
1) and primary winding of two turns, secondary winding of four turns
(1:2 transformer 2), as well as 1:3 transformers with primary winding of
one turn, secondary winding of three turns, are proposed. In Fig. 4, (a)
(b) and (c) are the structures of 1:2 transformer 1, 1:2 transformer 2 and
1:3 transformer. Their structure is similar to the one turn 1:1 trans­
former structure described above, and the only difference is the number
of turns of primary winding and secondary winding.

3. Simulation and analysis of transformers with different turn


ratios

In order to evaluate the performance of these transformers, the


electromagnetic simulator HFSS is used to model and simulate them.
The relevant parameters of the 3D transformer are shown in Table 1, and
Fig. 4. Structure of proposed (a) 1:2 transformer 1, (b) 1:2 transformer 2, and
(c) 1:3 transformer.

213
F. Wang et al. Integration 81 (2021) 211–220

Table 1 are extracted as


Values of geometric parameters.
im(Z22 )
Parameter Symbol Value LS = (5)
2π f
TSV height h 80 μm
TSV metal radius r 4.5 μm im(Z22 )
TSV liner thicknesses t1 0.5 μm QS = (6)
re(Z22 )
RDL thicknesses t2 3 μm
The angle of top RDL1 θ1 15◦
The angle of top RDL2 θ2 10◦ where Z22 is the input impedance of the output port when the input port
Length of inner contact via l1 3 μm is open.
Length of outer contact via l2 13 μm The mutual inductance and coupling coefficient between the primary
Pitch of adjacent TSVs d1 20 μm winding and the secondary winding of the transformer are calculated by
Pitch of opposite TSVs d2 70 μm
√̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅
im(Z12 )*im(Z21 )
M= (7)
2πf
these parameters have been marked in Fig. 2. Where h is the height of
TSV, r is the radius of TSV metal, t1 is the liner thicknesses of TSV, t2 is √̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅
the thickness of RDL, θ1 and θ2 are the angles of top RDL1 and top RDL2, k=
im(Z12 )*im(Z21 )
(8)
l1 and l2 are the lengths of the inner contact vias and the outer contact im(Z11 )*im(Z22 )
vias, and d1 and d1 are the distances between the adjacent TSVs and the
opposite TSVs. In addition, the materials used in each part of the device where Z21 is the transfer impedance between the output port and the
and the relevant electrical properties of the materials are given in input port when the output port is open. Z12 is the transfer impedance
Table 2. Each part of the device has been marked in Fig. 2. Both the between the input port and the output port when the input port is open.
material of RDL and the filler metal of TSV are copper. And the insu­
lating layer between TSV and silicon substrate is made of silicon dioxide.
3.1. 1:1 transformer simulation and analysis
And in the simulation, in order to determine the solution range, the
air box is set in the simulation, and the radiation boundary conditions
The simulation results of one-turn, two-turn and three-turn 1:1
are added to it. In addition, the lumped port excitation is selected, and
transformers are shown in Fig. 5. Where Fig. 5(a) and (b) are the
terminal driven solution type is adopted to obtain the S parameters of
inductance values of primary winding and secondary winding respec­
each port. The convergence error of adaptive mesh generation uses the
tively, Fig. 5(c) and (d) are the quality factors of primary winding and
default value of HFSS system and solves the S parameter of 0–50 GHz by
secondary winding respectively, Fig. 5(e) is the coupling coefficient
setting frequency sweep.
between two windings.
Through the matrix parameter transformation of the S-parameters,
It can be seen from Fig. 5 that the inductance value of the winding is
various electrical parameters of the transformer can be obtained. The
proportional to the number of coil turns, but with the increase of the
inductance and quality factor of the primary winding are extrs, as shown
number of turns, the self-resonant frequency decreases, which is caused
in Fig. 2 (c). acted as
by parasitic capacitance. From Fig. 5(e), we can see that good coupling
im(Z11 ) can be achieved when primary and secondary windings only use one
LP = (3)
2π f turn. This represents a small area. In the case of one turn, two turns and
three turns, transformers have a coupling factor of up to 1, which means
QP =
im(Z11 )
(4) lower leakage.
re(Z11 ) Table 3 compares the proposed one-turn 1:1 transformer with other
1:1 transformers based on 3D TSV technology. The area of 1:1 trans­
where the impedance parameter Z11 is the input impedance of the input former in Refs. [21–23] is 44.4 times, 277 times and 6.7 times of that in
port when the output port is open, and f is the work frequency. this work. And the coupling coefficient of the transformer proposed in
Similarly, the inductance and quality factor of the secondary winding this study is the largest. It can be concluded that the proposed 1:1

Table 2
Material and electrical parameters.
Part Material relative dielectric permittivity relative magnetic permeability bulk conductivity (s/m) loss tangent
7
RDL Cu 1 0.999991 5.8 × 10 0
TSV metal Cu 1 0.999991 5.8 × 107 0
Insulating layer SiO2 4 1 0 0.001
Substrate Si 11.9 1 0.1 0.005
Top dioxide SiO2 4 1 0 0.001
Bottom dioxide SiO2 4 1 0 0.001

214
F. Wang et al. Integration 81 (2021) 211–220

Fig. 5. Simulated results of proposed different 1:1 transformers. (a) Inductance of primary winding. (b) Inductance of secondary winding. (c) Q factor of primary
winding. (d) Q factor of secondary winding. (e) Coupling coefficient k.

215
F. Wang et al. Integration 81 (2021) 211–220

Table 3
Comparison of 1:1 3D TSV transformers.
a b
Reference Unit [21] [22] [23] c This worka

LP pH 551 177 439 360


QPmax N/A 18.79 7.99 4.59 23.16
SRFP GHZ 28.5 32.89 23.7 42
LS pH 456 177 482 530
QSmax N/A 21.50 7.99 5.11 19.78
SRFS GHz 35.0 32.89 24.0 35
k N/A 0.853 0.900 0.136 0.966
Core area mm2 0.16 1.0 0.024 3.6 × 10− 3

a
Simulated results.
b
Estimated from the provided model.
c
Measured results.

transformer has the advantages of small area and excellent coupling. necessary to consider the effect of the depletion layer capacitance in the
design of the transformer. The process of the transformer is shown in
3.2. 1:2 and 1:3 transformer simulation and analysis Fig. 7. First, TSV holes are etched on silicon substrate. Second, silicon
dioxide insulation layer was prepared on the inner surface of TSV by
Electromagnetic simulation is performed on two kinds of 1:2 trans­ chemical vapor deposition. Third, the TSV with isolation layer was filled
formers and 1:3 transformers. Fig. 6 shows the simulation results. In with copper by physical vapor deposition. Fourth, the first silicon di­
Fig. 6(a) and (b) are the inductance values of primary winding and oxide layer is deposited on the upper surface of the substrate and contact
secondary winding respectively, Fig. 6(c) and (d) are the quality factors vias are made. Fifth, a second silicon dioxide layer is deposited on the
of primary winding and secondary winding respectively, Fig. 6 (e) is the upper surface of the first oxide layer and RDL1 and contact vias are
coupling coefficient. fabricated. Sixth, the third silicon dioxide layer is deposited on the upper
It can be seen from Fig. 6 that both 1:2 transformers and 1:3 trans­ surface of the second silicon dioxide layer, and contact vias are made.
formers have superior coupling coefficients, which indicates that good Seventh, a silicon dioxide layer 4 is deposited on the upper surface of the
coupling can be achieved by using fewer turns in the transformer, which third silicon dioxide layer, and RDL2 is fabricated. Next, the RDL and the
is also beneficial for reducing the chip area of the transformer. It also contact vias at the bottom are prepared in the same way. Finally, the
indicates that the proposed nested transformer is expected to achieve a manufacture of transformer is finished.
1:N transformer with high coupling coefficient. The device can use Agilent vector network analyzer (VNA) to mea­
Table 4 compares the proposed 1:2 transformer 1 with the latest 1:2 sure, but due to the existence of the fixture, the results must have some
transformers based on TSV. The area of 1:2 transformer in Ref. [25] is errors. In order to get accurate parameters, it is necessary to carry out
13.3 times of that in this study, and the coupling coefficient is 0.258 de-embedding calculation to eliminate the parasitic parameters brought
smaller than that in this study. by the fixture. For example, the open-short de-embedding method can
Table 5 shows the comparison between the proposed 1:3 transformer be used for calibration.
and other different 1:3 transformers based on TSV. The 1:3 transformer The procedure of open short de-embedding method is as follows.
area in Refs. [21,23,25] is 50 times, 5.2 times and 10.4 times of that in First, we need to measure the S-parameter matrix of open, short and
this paper. And the coupling coefficient is 0.076, 0.817 and 0.301 device under test (DUT) structures. The Y-parameter matrix can also be
smaller than that in this paper. It can be concluded that the 1:2 and 1:3 obtained from S-parameter matrix by matrix transformation. Then the
transformers proposed in this study also have superior area and coupling actual y parameters of the transformer can be obtained by using the anti
coefficient. embedding formula (9) [26].

Ytransformer = ((YDUT − Yopen )− 1 − (Yshort − Yopen )− 1 )− 1


(9)
3.3. Discussion on manufacturing process and measurement method
where YDUT, Yopen and Yshort are Y-parameter matrices of DUT, open and
In this section, the manufacturing process and measuring methods of short structures, respectively. Stransformer can be obtained by matrix
the proposed transformers are given. transformation with Ytransformer., Stransformer and Ytransformer can be used to
The higher the substrate resistivity is, the smaller the current and loss calculate inductance L, Q factor, coupling coefficient k and other
are. Therefore, the proposed transformer is fabricated on high resistance parameters.
silicon substrate. The depletion layer has no effect on the performance of
the transformer when using high-density silicon substrate, so it is not

216
F. Wang et al. Integration 81 (2021) 211–220

Fig. 6. Simulated results of proposed 1:2 transformers and 1:3 transformer. (a) Inductance of primary winding. (b) Inductance of secondary winding. (c) Q factor of
primary winding. (d) Q factor of secondary winding. (e) Coupling coefficient k.

217
F. Wang et al. Integration 81 (2021) 211–220

Table 4
Comparison of 1:2 3D TSV transformers.
a
Reference Unit [25] This worka

LP pH 388
QPmax N/A 23.01
SRFP GHZ 39
LS pH 937
QSmax N/A 19.32
SRFS GHZ 27
k N/A 0.708 0.966
Core area mm2 0.08 6.0 × 10− 3

a
Simulated results.

Table 5
Comparison of 1:3 3D TSV transformers.
Reference [21] a [23] b
[25] a This worka

LP 562 398
QPmax 18.61 21.89
SRFP 23 32
LS 1220 1415
QSmax 12.3 17.64
SRF 16 19
k 0.891 0.15 0.666 0.967
3
Core area 0.48 0.05 0.1 9.6 × 10−
a
Simulated results.
b
Measured results.

4. Conclusion Credit author statement

In this paper, a three-dimensional transformer with nested structure Fengjuan Wang: Conceptualization, Methodology, Formal analysis,
is proposed. 1:1, 1:2, 1:3 transformers are designed. According to the Resources. Ruinan Ren:Validation, Writing - Original Draft. Xiangkun
above discussion, the proposed transformer has good self-inductance Yin: Revising and Reviewing. Ningmei Yu:Supervision, Reviewing.
coefficient, quality factor, resonance frequency, coupling coefficient Yuan Yang:Supervision, Reviewing.
close to 1, and smaller area consumption. It is expected to realize a 1:N
transformer with good coupling. And the proposed transformer is
compared with other research results. Declaration of competing interest

The authors declare that they have no known competing financial


interests or personal relationships that could have appeared to influence
the work reported in this paper.

218
F. Wang et al. Integration 81 (2021) 211–220

Fig. 7. The process of the transformer.

219
F. Wang et al. Integration 81 (2021) 211–220

Acknowledgments [12] A. Iqbal, J.J. Tiang, C.K. Lee, N.K. Mallat, S.W. Wong, Dual-band half mode
substrate integrated waveguide filter with independently tunable bands, IEEE
Trans. Circuits Syst., II, Exp. Briefs 67 (2) (2020) 285–289, https://doi.org/
This work was supported by the National Natural Science Foundation 10.1109/AEMC.2017.8325727.
of China, China, under Grant nos. 61774127, 61804112 and 61771388, [13] L. Qian, et al., Through-silicon via-based capacitor and its application in LDO
the Fok Ying Tung Education Foundation, China, under Grant no. regulator design, IEEE Trans. Very Large Scale Integr. Syst. 27 (8) (2019)
1947–1951, https://doi.org/10.1109/TVLSI.2019.2904200.
171112, and Shaanxi Innovation Capacity Support Project, China, under [14] X. Yin, Z. Zhu, Y. Liu, Q. Lu, X. Liu, Y. Yang, Ultra-compact TSV-based L-C low-pass
Grant nos. 2020KJXX-093 and 2021TD-25. filter with stopband up to 40 GHz for microwave application, IEEE Trans. Microw.
Theor. Tech. 67 (2) (2019) 738–745, https://doi.org/10.1109/
TMTT.2018.2882809.
References [15] U.R. Tida, C. Zhuo, L. Liu, Y. Shi, Dynamic frequency scaling aware opportunistic
through-silicon-via inductor utilization in resonant clocking, IEEE Trans. Comput.
[1] W.R. Davis, et al., Demystifying 3D ICs: the pros and cons of going vertical, IEEE Aided Des. Integrated Circ. Syst. 39 (2) (2020) 281–293, https://doi.org/10.1109/
Design & Test of Computers 22 (6) (2005) 498–510, 2005.10.1109/ TCAD.2018.2887053.
MDT.2005.136. [16] J. Li, et al., Design, fabrication and characterization of TSV interposer integrated
[2] I. Papistas, V.F. Pavlidis, Contactless heterogeneous 3-D ICs for smart sensing 3D capacitor for SIP applications, in: 2018 IEEE 68th Electronic Components and
systems, Integrat. VLSI J. 62 (8) (2018) 329–340, https://doi.org/10.1016/j. Technology Conference (ECTC), 2018, pp. 1974–1980, https://doi.org/10.1109/
vlsi.2018.04.001. ECTC.2018.00296. San Diego, CA.
[3] X.K. Salah, A TSV to TSV, A TSV to Metal interconnects, and A TSV to active device [17] J.R. Long, Monolithic transformers for silicon RF IC design, IEEE J. Solid State Circ.
coupling capacitance: analysis and recommendations, in: 2015 10th International 35 (9) (2020) 1368–1382, https://doi.org/10.1109/4.868049.
Conference on Design & Technology of Integrated Systems in Nanoscale Era [18] Chee Chong Lim, et al., An area efficient high turn ratio monolithic transformer for
(DTIS), 2015, pp. 1–2, https://doi.org/10.1109/DTIS.2015.7127343. Naples. silicon RFIC, in: 2008 IEEE Radio Frequency Integrated Circuits Symposium, 2008,
[4] V.F. Pavlidis, E.G. Friedman, Timing driven via placement heuristics in 3-D ICs, pp. 167–170, https://doi.org/10.1109/RFIC.2008.4561410. Atlanta, GA.
Integrat. VLSI J. 41 (4) (2008) 489–508, https://doi.org/10.1016/j. [19] C. Lim, et al., Fully symmetrical monolithic transformer (true 1:1) for silicon RFIC,
vlsi.2007.11.002. IEEE Trans. Microw. Theor. Tech. 56 (10) (2008) 2301–2311, https://doi.org/
[5] N.M. Hossain, R.K.R. Kuchukulla, M.H. Chowdhury, Failure analysis of the through 10.1109/RFIC.2008.4561410.
silicon via in three-dimensional integrated circuit (3D-IC), in: 2018 IEEE [20] V.N.R. Vanukuru, Highly efficient and symmetric stacked transformers for
International Symposium on Circuits and Systems (ISCAS), 2018, https://doi.org/ millimeter-wave ics, in: 2017 International Conference on Microelectronic Devices,
10.1109/ISCAS.2018.8351020. Florence. Circuits and Systems (ICMDCS), 2017, pp. 1–4, https://doi.org/10.1109/
[6] J. Song, S. Jeong, S. Park, J. Kim, S. Hong, J. Kim, Chip-level wireless power ICMDCS.2017.8211712. Vellore.
transfer scheme design for next generation wireless interconnected three- [21] B. Zhang, et al., 3D TSV transformer design for DC-DC/AC-DC converter, in: 2010
dimensional integrated circuits, 2017 IEEE Wireless Power Transfer Conference Proceedings 60th Electronic Components and Technology Conference (ECTC),
(WPTC) (2017) 1–4, https://doi.org/10.1109/WPT.2017.7953875. Taipei. 2010, pp. 1653–1656, https://doi.org/10.1109/ECTC.2010.5490761. Las Vegas,
[7] Y.X. Yin, Z. Zhu, Y. Yang, R. Ding, Metal proportion optimization of annular NV.
through-silicon via considering temperature and keep-out zone, IEEE Trans. [22] Z. Feng, M.R. Lueck, D.S. Temple, M.B. Steer, High-performance solenoidal RF
Compon. Packag. Manuf. Technol. 5 (8) (2015) 1093–1099, 1109/ transformers on high-resistivity silicon substrates for 3D integrated circuits, IEEE
TCPMT.2015.2446768. Trans. Microw. Theor. Tech. 60 (7) (2012) 2066–2072, https://doi.org/10.1109/
[8] V.F. Pavlidis, I. Savidis, E.G. Friedman, Three-Dimensional Inte-Grated Circuit TMTT.2012.2195026.
Design, second ed., Elsevier, Amsterdam, The Netherlands, 2017. [23] S. Li, et al., Fully symmetric 3-D transformers with through-silicon via IPD
[9] Z.J. Yan, et al., Fabrication and RF property evaluation of high-resistivity Si technology for RF applications, IEEE Trans. Compon. Packag. Manuf. Technol. 9
interposer for 2.5-D/3-D heterogeneous integration of RF devices, IEEE Trans. (11) (2019) 2143–2151, https://doi.org/10.1109/TCPMT.2019.2943404.
Compon. Packag. Manuf. Technol. 8 (11) (2018) 2012–2020, https://doi.org/ [24] K. Salah, A TSV-Based Architecture for AC-DC Converters, 2013 8th IEEE Design
10.1109/TCPMT.2018.2839762. and Test Symposium, 2013, pp. 1–4, https://doi.org/10.1109/IDT.2013.6727096.
[10] L. Qian, J. Sang, Y. Xia, J. Wang, P. Zhao, Investigating on through glass via based Marrakesh.
RF passives for 3-D integration, IEEE Journal of the Electron Devices Society 6 [25] S.H. Li, et al., Fully 3-D symmetrical TSV monolithic transformer for RFIC, in: IEEE
(2018) 755–759, https://doi.org/10.1109/JEDS.2018.2849393. 65th Electronic Components and Technology Conference (ECTC), 2015, p. 20,
[11] L. Hu, S. He, Y. Sun, S. Ma, Design and process technology for high Q integrated https://doi.org/10.1109/ECTC.2015.7159715. San Diego, CA.
inductor on interposer with TSV, in: 2018 International Conference on Microwave [26] L. Li, K. Ma, S. Mou, Modeling of new spiral inductor based on substrate integrated
and Millimeter Wave Technology (ICMMT), 2018, pp. 1–3, https://doi.org/ suspended line technology, IEEE Trans. Microw. Theor. Tech. 65 (8) (2017)
10.1109/ICMMT.2018. Chengdu. 2672–2680, https://doi.org/10.1109/TMTT.2017.2701374.

220

You might also like