Arm Research

Overview

Stuart Biles

© 2019 Arm Limited

 History of Arm
Joint venture between Designed into first mobile Now all electronic devices and systems can
Acorn Computers and Apple phones and then smartphones use smart Arm technology

1990 1993 onwards Today

Arm's current business
Arm primary business is the development of intellectual
property (IP) blocks which are used in silicon chips
Our partners combine Arm IP with their own IP to create
complete chip designs
We earn license fees when we deliver Arm IP to our
partners and royalties when our partners ship chips that
contain Arm IP
Accelerating investment Investing in new
to increase share gains processor technology

• Machine learning processors

• Computer vision
• Augmented reality
• Platform security

Generating
profits and cash
to be reinvested
Investing in new
IoT software and services

• Device Management
• Connectivity as a Service
• Data Management as a Service
• Pelion platform
Introducing Arm Research

Research Research
Collaboration Enablement

Research
Arm Education
Programs
 Education
Collaboration &
Enablement

© 2019 Arm Limited

Arm Education
Helping to close the education and skills gap in Computer Engineering and STEM

Arm University Program Arm Education Media Arm School/K-12 Program

• Free access to academically • Enabling learning through • Empowering learners and
rigorous education kits using rich multimedia online communities of practice with
state-of-the-art Arm ecosystem courses and digital-first evidence-based research and
technologies - support books allowing students, curriculum-linked educational
Electrical, Electronic and hobbyists, and engineers materials and platforms -
Computer Engineering, to learn, up-skill and Enable a lifetime positive
and Computer Science curricula become work ready engagement in STEM
• Email university@arm.com • Email edumedia@arm.com • Email school@arm.com
Arm Research Collaboration Team
Help connect people Lead outreach and
and ideas inbound activities

Director US/North America

Raffaella Montelli, PhD.

Facilitate execution
of agreements

Director UK/Europe
Andrea Kells, PhD.

Help identify funding

Manage collaborations
opportunities
and partnerships
Why work with Arm Research?
• Proven IP, tools, platforms and expertise to help strengthen
the impact of your research
• Vibrant partner ecosystem to help you successfully develop
and tape out your research products
• Talent development opportunities to help your students more
easily enter the semiconductor industry
• Credible industry support to improve the success of your
research proposals
• Dedicated team to provide you with what you need to meet
your research goals
The Arm Research Ecosystem
Ecosystem Success: Arm High Performance
Computing Mission
Enable the world’s first Arm supercomputer(s)

Strategy
Strategy:
Enablement
Enablement ++ Co-Design
Co-Design ++ Partnership
Partnership
Building Blocks
Enablement Co-Design Partnership
▪ Address gaps in computational ▪ Work with key end-customers in DoE, ▪ Work with Architecture partners to
capability and data movement within DoD, RIKEN, and EU to design balanced quickly bring optimized solutions to
Architecture architecture, uArchitecture and SoCs market.
▪ Seed the software ecosystem with based on real-world workloads, not ▪ Work with Architecture and
open source support for Armv8 and SVE benchmarks. uArchitecture design teams to steer
libraries, tools, and optimized ▪ Developsimulation and modeling tools future designs to be more relevant for
workloads to support co-design development with HPC, HPDA, and ML
▪ Provide world class toolsfor end-customers, partners, and ▪ Work with key ISVs to enable mid-
compilation, analysis, and debug at academia. market
large scale.
High Performance Computing Research
Dibona Astra (SANDIA) Fugaku (RIKEN CCS)
(MontBlanc)

Thunder (LANL) EPI GPP Isambard

(U. Bristol)
Arm Research Enablement Activities
• Arm has always provided our technology for research purposes
under various schemes

• Research Enablement team focus on

• Broadening the technology portfolio available to researchers
• Enhancing your experience working with Arm
• Building an academic, collaborative ecosystem focused on Arm SoCs

• Go to "Your Research Enabled by Arm" workshop to find out

details about our existing and new enablement initiatives
• Tuesday, 11:00- 17:30, Tannehill
Arm Flexible Access for Research

Wider range of IP Quicker and easier process Simplified legal framework

• Access to a wide range of • Sped-up approval process • Reduced friction with

Arm IP for research from several weeks or simple click-through End-
purposes months to two days User License Agreement
• Complete RTL for cores and (EULA)
subsystems

To be available to academic researchers in early 2020

 Research Programs

© 2019 Arm Limited

Ever-expanding roles of compute and data drive Arm’s opportunity

Arm everywhere Value from data

 Arm is uniquely positioned in “device-to-
cloud”
Edge computing – necessary to handle the massive upstream data

S
S S
S S
CC CC CC
A CC A
A A
IoT Device Local Services Infrastructure Edge cloud Public / Private
(Data Source) (Gateways) Services Cloud

18 Compute Acceleration Storage

M0N0 Full System Diagram
Evolved to Cortex-M33 with ROM, RAM, peripherals, power management and clocking
M0N0 is a World Leading Ultra Low Power MCU
system
• At least 6x lower shutdown power than 16/32b COTS MCUs
• At least 40% better active energy efficiency than COTS MCUs
• Great target for TinyML applications
• Cortex-M33 with 4x8b SIMD M0N0
• Always-on keyword spotting for 200 days on coincell (158mAh 1.5V)
• M0N0 chip only - excludes microphone/ADC
• Potential for reduced PCB footprint SW DevBoard
• 6mm2 chip plus only three passives
SSITH – Capabilities for Cortex-M
• Evaluating CHERI technology on Cortex-M
• Fine grained protection within compartments
• Pointers → Capabilities
• Permissions bits
• Data vs code pointer
• Read only vs. read/write pointer ~70%
• Base and bounds information Of security
vulnerabilities
• Hidden 1-bit tag makes Capabilities unforgeable due to memory
safety
• Protects against a wide range of vulnerabilities
• E.g. Buffer overflows, return orientated programming, and confused deputy attacks
• Addresses core memory safety issue, even on legacy languages (e.g. C/C++)
• Low software porting effort
• Especially for well written code (compiler does most/all of the work)
 BBC Micro:Bit (Arm Cortex M0, 16KB RAM)
TinyML
What is it?

• ”Swimming in sensors, drowning in data”

• Model design and optimization for highly constrained
hardware platforms LPCXpresso 1125 (Arm Cortex M0, 8KB SRAM)
• Can we get 10X+ reduction in ops or memory with
minimal accuracy loss?
Near term results

• Hybrid neural and non-neural techniques

• New training approaches for binary/ternary M0N0 (Arm Cortex M33, 16KB SRAM)
networks
• Compression techniques for recurrent neural
networks (RNNs) that operate on time-series data
 TinyML: HybridNet 95
94.5
Accuracy vs Overall Memory Footprint

94
DS-CNN

Accuracy (%)
93.5
• “DS-CNN” is a highly optimized network for the key word 93
92.5
spotting (KWS) task ST-HybridNet
92
91.5
91
• How do we optimize it further at iso-accuracy? 90.5
90
0 5 10 15 20 25 30 35 40

• Ternarize weight values using Strassen's algorithm Memory Footprint (KB)

Accuracy vs #Operations
• Overall memory footprint reduced by 30% 95
94.5
94
• Selectively use decision trees to reduce compute

Accuracy (%)
93.5
93
92.5 DS-CNN
• Total number of operations reduced by 12% 92
91.5 ST-HybridNet
91
• Less than 0.3% loss in accuracy for these savings 90.5
90
2 2.25 2.5 2.75 3
Operations (M)

Published in SysML’19 - https://arxiv.org/abs/1903.01531

 AutoBot Bottom-Up
(Global NAS)

Model QoR
MicroBrew
What is it? (Local-NAS)

• Automate Neural Architecture Search (NAS) on Arm

Top-Down
• Incorporate information about Arm hardware into the (Model Opt)
optimization flow
• Reduce search runtime
Optimization Runtime
Near term goal: Top-Down (Optimization)

1. Input a trained model

2. Optimize for Arm IP – reduce latency/energy at iso-
accuracy

Long term goal: Bottom-Up (Design)

1. Input a dataset
2. Create a from-scratch model optimized for Arm IP

Submitted to NeurIPS’19 - https://arxiv.org/abs/1905.12107

Edge Computing Cloud Service
Designed and optimized for IoT
and edge Containerization Microservices

Rolling Unreliable Scale

Updates Connectivity CI/CD
Brings server style modern
application management to edge Networking
Security Protocols
computing & Trust
Edge
Computing
Health
Remote
Rollbacks Checks
Resource monitoring
Constraints
Security Device
Based on Kubernetes and Policies Management
Service
compatible with open source Discovery
ecosystem, APIs, and tool chains Lifecycle
Management

© 2019 Arm Limited

 Research Focus Areas
Computer system architecture Emerging Post-Moore materials
Computer
Application and domain specialization Technologies & Novel memory technologies
Systems
System and circuit implementation Materials New frontiers of compute

Threat intelligence Best in class ML

Machine
Security Isolation and control mechanisms Big data analytics
Learning
Specification, testing and proof Applied ML

Distributed & Device commissioning and management Big paradigm shifts

Disruptive
Information Edge computing and services Fundamental enabling technologies
Technology
Systems Data services Tracking and analysing
Careers at Arm
Join the team!
Internships Cloud Services, Silicon Technology, Machine Learning, Processor and Memory
System Architecture, Security, IoT Services, Emerging Technologies, Large Scale
Systems, Digital Subsystems Design
Established Security
Principal Security Research Engineer, Staff Security Research Engineer,
Senior Security Research Engineer
Machine Learning
Senior Machine Learning Research Scientist, Machine Learning Researcher
Other
Data Systems Researcher, Senior Research Engineer,
Staff Research Engineer, Staff Research Tools Engineer
bit.ly/armrshcareers
More Arm Many more opportunities across Arm beyond Research
Careers arm.com/careers
Closing Remarks
 The Arm trademarks featured in this presentation are registered
trademarks or trademarks of Arm Limited (or its subsidiaries) in
the US and/or elsewhere. All rights reserved. All other marks
featured may be trademarks of their respective owners.

www.arm.com/company/policies/trademarks

© 2019 Arm Limited