Department of Electrical and Computer Engineering

ELECTRONIC CIRCUIT DESIGN(ECE-213)

Lab 04
SUBMITTED By:

MUHAMMAD USMAN JADOON (EE031)

SUBMITTED TO:

ENGR. KHURRAM KHAN

Date:27/02/2024
ELECTRONICS CIRCUIT DESIGN LAB 04

MOSFET PARAMETERS
OBJECTVE:
The objective of this lab is to bias the MOSFET through dc source and find its
characteristics such as VTN, K,VDS and VGS.
EQUIPMENT REQUIRED:
1. LTspice software
2. Hardware
INTROUCTION:
A spice model is generally a set of formulas with the characteristics of the
specific process set by parameters to the model.LT Spice modeling has become very
important aspect in terms of assigning parameters to the BJTS, MOSFETS and other
transition devices. These parameters can have external effects for example,
temperature, geometrical dependence as well as gate leakage. So, these devices can
be used under three level models.
Transistors are nonlinear devices, but they can be made linear by adding DC
level into input. These dc voltages and dc currents ensures the linearity of the MOSFET.
Due to this MOSFET behaves as saturation because MOSFET operates on DC point
to ensure linearity point is Q-point. In that region it works. T that point for NMOS base
to drain source become greater than over drive voltage minus threshold voltage.
Level 1:
The Shichman-Hodges model, which is based on the long channel expressions given
here.
Level 2:
It is a model is a semiconductor physics model which includes velocity saturation, drain
induced barrier lowering, etc.
Level 3:
It is a semi empirical model which uses measured device data, and works well down
to 1 micron channel lengths
PARMETERS:
• SPICE level 1 has many parameters, for example:
• TOX oxide thickness
• VT0 threshold voltage
• LAMBDA channel length modulation parameter
• GAMMA bulk threshold parameter
• CGSD gate source overlap capacitance
• KP transconductance parameter Etc.
Most parameters have reasonble defaults if values are not set explicitly.
BODY EFFECT:
Body effect refers to the change in the transistor threshold voltage (VT) resulting from
a voltage difference between the transistor source and body.
Because the voltage difference between the source and body affects the VT, the body
can be thought of as a second gate that helps determine how the transistor turns on
and off.
So, body effect is the increase in threshold voltage because of body bias.
MOBILITY DEGRADATION:
Radiation causes oxide charge buildup which can degrade carrier mobility in the
inversion layer of a metal‐oxide‐semiconductor field‐effect transistor (MOSFET). An
expression for the carrier mobility in MOSFETs due to oxide charge scattering has
been derived. The model predicts the mobility degradation given any specified charge
density profile in the oxide.
ELECTRONICS CIRCUIT DESIGN LAB 04

TASK 4.1:
Simulation of n-channel MOSFET characteristics to find Vt and K

Diode connected MOSFET For a given MOSFET (e.g. 2N7002), Vt and K can be
found using the following steps.

1. Connect the circuit as in Fig. 1. Note: Such a connection will maintain the
device in the SATURATION region, since in this case VDS is always equal to
VGS. Consequently, the saturation mode condition of VDS > (VGS - Vt) will
always be true. You just have to ensure that a channel is formed by adjusting
VDD such that (VGS - Vt) > 0. 2.

2. Adjust VDD so that its name is a variable you recognize e.g. VGS or VDS.

3. Run a DC sweep using this variable, sweep it from 2.1V to 3V in linear steps of
0.01V.

4. Plot Id as well as sqrt(Id) vs VGS/ VDS. Plot the required data in LTSpice (or
your preferred graphing software e.g. MATLAB after exporting waveform from
LTSpice).

5. From the graph of Id Vs VGS/ VDS, Identify Vt and verify your results match
with the datasheet. 6. Compute K, using K = 2(slope)2 for the saturation region
of VGS and root(Id) from 2.2-3 V.

6. Attach this marked up graph in your report.

Note: Since no drain current can flow until VGS reaches Vt , this tells us that Vt is
simply represented by the x-intercept as shown in Figure 2. Moreover, the equation
of square root of Id vs VGS is similar in the form as the equation of a line (y=mx+c);
and hence sqrt(K/2) represents the slope of the line.

7. If the MOSFET provided in lab is different, you may physically build the circuit
on a breadboard, manually perform sweep and fill out Table 2. The range of
VDD i.e. VGS/VDS.may be accordingly changed by looking up nominal value
of Vt from the datasheet.
ELECTRONICS CIRCUIT DESIGN LAB 04

LTSPICE CIRCUIT DIAGRAM:

Figure 4.1

RESULTS:

Figure a
ELECTRONICS CIRCUIT DESIGN LAB 04

Figure b
ANALYSIS:
Transistor will behave in saturation region. It ensures the linearity behavior
and q point of transistor is in the linear region. First by points that include y axis and x
axis we find the slope of the results obtained and then we line equation we obtained
constant and then we obtained VTN voltage and it has marked with figure a with
some difference might be obtained by calculation error.
VGS and VDS are equal because of the fact that gate has been connected to
the drain of the MOSFET. And VDS is greater than VGS-VTN tells the fact that the
MOSFET is in saturation region.

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Task 4.2
1. Design a circuit for biasing the enhancement n-channel MOSFET employing the voltage-
divider bias to meet the following specifications.
a) VDD = 16 V.
ELECTRONICS CIRCUIT DESIGN LAB 04

b) Set the operating Q-point at ID = 4 mA and VDS = 8 V.

LTSPICE CIRCUIT DIAGRAM:

RESULTS:

Figure c

Figure d
ANALYSIS:
The values of resistors are set to be 500 k ohm each because that enables VDS
measured to be 8V and current flow through them is 10uA. In our calculations we
fund resistors to be 800k and 800k ohms so that current through them found out to
be 10uA. And voltages are found. MOSFET is in saturation region.

CONCLUSION:
This lab concludes that at below threshold voltage no current flows because the
MOSFET is in cutoff region and certain increase will put the MOSFET into saturation
region. Linear regions and operating points of MOSET are known in this la and curves
between drain to source and drain currents are drawn in this lab.

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