IPC-4554

March 2005

Specification for
Immersion Tin Plating
for Printed Circuit Boards

5th DRAFT

Plating Subcommittee (4-14)

Proposed by IPC
2215 Sanders Road,
Northbrook, IL 60062
Phone : (847) 509-9700
Fax : (847) 509-9798
URL : www.ipc.org
1.1 Scope
This specification sets the requirements for the use of Immersion Tin (ISn) as a surface finish for
printed circuit boards. This specification is intended to set requirements for ISn deposit thickness
based on performance criteria. It is intended for use by supplier, manufacturer, contract
manufacturer (CM) and original equipment manufacturer (OEM).

1.2 Description
ISn is a chemically deposited metallic finish that is applied directly over the basis metal of the PWB,
i.e copper. It is a multifunctional surface finish, applicable to soldering, press fit connections and as
the interface for Zero Insertion Force (ZIF) edge connectors. The immersion Tin protects the
underlying copper from oxidation over its intended shelf life. Copper and Tin however have a very
strong affinity for one another. The diffusion of one species into the other will occur, forming Cu/Sn
intermetallic (IMC) compounds, thereby impacting to shelf life of the deposit and the performance of
the finish.

The latest generation of Immersion Tin deposits utilize various methods of retarding the diffusion
process, including the use of co-deposition of organics, the use of another metal as a diffusion
barrier or the use of grain structure refining. It is recommended that the user of the deposit clearly
understand the different methods of copper migration retardation and that the supplier know the
positive and negative impacts of the system chosen.

1.3 Objective
This specification sets the requirements specific to ISn as a surface finish. As other finishes require
specifications, they will be addressed by the IPC Plating Processes Subcommittee as part of the
IPC-4550 specification family. As this and other applicable specifications are under continuous
review, the subcommittee will add appropriate amendments and make necessary revisions to these
documents.

1.4 Performance Functions

1.4.1 Solderability

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This primary function of ISn is to provide a solderable surface finish, suitable for all surface mount
and through-hole assembly applications and with an appropriate shelf life. The deposit has
demonstrated the ability to meet a shelf life of 12 months per J-STD-003 and industry data, when
produced per this specification’s requirement.

Due to the diffusion of the copper through the Tin deposit and its impact on solderability, the ability to
meet the 12 months shelf life is DIRECTLY related to the deposit thickness. This diffusion also has a
negative impact on the correct thickness measurement of the deposit.

The ability to measure and differentiate the tin species in the deposit is imperative to ensure the
manufacture and receipt of parts with this useable shelf life. The use of correct XRF standards is
imperative. The use of foils over Mylar prevents the impact of basis metal diffusion and should be the
“standard of choice” – see Appendix 5 for detailed recommendations.

1.4.2 Contact Surface

Immersion Tin is not a suitable finish for this application.
1.4.3 EMI Shielding

A key characteristic for this application is a consistent metal interface between the PWB and the
shield material. Due to the dynamic nature of the ISn deposit and the basis metal (Cu) of the PWB,
the interface between the EMI shield and the deposit is NOT consistent. The growth of Inter metallic
compounds (IMC’s) will change the electrical characteristics of the interface between the EMI shield
and the deposit.

1.4.5 Connectors

1.4.5.1 Press Fit

The use of ISn as a deposit suitable for press fit requirements shall meet Telcordia GR-1217-CORE.
It should be noted that changing to a thin immersion deposit such as ISn from HASL may require a
re-evaluation of the pre fabrication hole sizes to ensure the correct interference fit required for Press
Fit applications.

The possibility of tin whisker formation as a direct consequence of stresses induced on the deposit
as a function of “press fit” insertion exists. The end user shall determine the impact of whisker
formation on the reliability of the module in its end use application.

1.4.5.2 Edge Tab

The use of ISn as a surface finish for edge connectors utilizing a zero insertion force (ZIF) connector,
i.e. for memory modules, has been successfully demonstrated and is an acceptable finish.

1.4.6 Wire Bonding

ISn is not suitable as a surface finish for either Aluminum or Gold wire bonding due to the instability
and metallurgical incompatibility of the deposit.

1.5 Definition of Terms

The definition of all terms used within this specification shall be as specified in IPC-T-50 and as
defined below:

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Solvent Extract Conductivity (SEC)
Surface ionic contaminants may be extracted/dissolved by solvents. The bulk ionic cleanliness of an
item is then quantified by measuring the solution of extracted contaminants with an ionograph
instrument and reported in units of micrograms of sodium chloride equivalent per unit surface area of
the tested item.

X-Ray Fluorescence (XRF) or Energy Dispersive X-Ray Fluorescence (EDS-XRF)

A nondestructive chemical analysis technique that uses an X-Ray beam aimed at an object’s
surface. The incident beam causes secondary (fluorescent) X-Rays to be generated. These
Fluorescent X-Rays are then measured to determine the identity of metal or other high density
elements and their quantity (thickness) present.
2 APPLICABLE DOCUMENTS

2.1 IPC

J-STD-003 Solderability Tests for Printed Boards

IPC-2221 Generic Standard on Printed Board Design

IPC-6012 Qualification and Performance Specification for Rigid Printed Boards

IPC-6013 Qualification and Performance Specification for Flexible Printed Boards

IPC-TM-650 Test Method Manual

2.3.25 Detection and Measurement of Ionizable Surface Contaminants by Resistivity of Solvent

Extract (ROSE)

2.4.1 Adhesion, Tape Testing

2.6.14.1 Electrochemical Migration Resistance Test

2.6.3.5 Bare Board Cleanliness by Surface Insulation Resistance.

2.2 Telcordia™

Telcordia GR-1217-CORE Generic Requirements for Separable Electrical Connectors Used In

Telecommunications Hardware

GR78-CORE Surface Insulation Resistance Test section 13.1.4

3 REQUIREMENTS

3.1 Visual
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ISn surfaces shall be inspected in accordance with the visual examination sections of the IPC-6011
series, and specifically IPC-6012 which specifies a nominal magnification of 1.75X (approximately 3
diopters). The coverage shall be complete and the finish shall be uniform on the surface to be plated
(see figures 3-1 through 3-? for properties visualIy identified with ISn plated surfaces).

ISn appearance, like all thin immersion deposits, is directly influenced by the surface preparation of
the underlying copper. Depending on the micro-etch chemistry used, the color of the deposit will vary
from a white matte appearance to a shiny silver appearance. All colors and luster within this range
are acceptable provided that the appearance is uniform through out the product supplied. The
coverage shall be complete and the finish shall be uniform on the surface to be plated. There shall
be no extraneous plating, skip plating, edge pull back, dark, discolored or black pads or mis-
registered solder mask on the basis metal for all classes of product.
Fig 3-1 Example of Uniform Plating

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3.2 Finish Thickness
Thickness of the ISn shall be measured and verified following the Tin plating step in the PWB
fabrication process. The use of X-ray fluorescence (XRF) methodology for thickness determination
shall be in accordance with APPENDIX 5 of this document and shall employ X-ray fluorescence
instrumentation equipped with software and hardware specific for ISn measurement. Due to the
dynamic nature of the deposit and its interaction with the basis metal, a clear distinction of “solerable
tin”(IMC free layer) compared to total deposit thickness needs to be identified. It is recommended
that the use of coulometric stripping or similar techniques eg Auger / XPS be employed at a
minimum during qualification and at a regular interval as a confirmation, as agreed upon between
user and supplier (AABUS). See APPENDIX 5 of this document regarding the use of coulometric
stripping and other accepted techniques.
Fig 3-2 Example of a bad I Sn deposit showing inconsistent plating

3.2.1 Immersion Tin Thickness

The minimum immersion tin thickness shall be 1 micron (40 micro inches) at -4 sigma from the
process mean when measured on a pad of 1.5 mm X 1.5 mm [60 mil X 60 mil] or equivalent area of
2.25 mm² [3600 mils²] and where the typical value ranges from 1.15 µm to. 1.3 µm. Excessive thick
deposits while not impacting solderability may impact other board fabrication process negatively, e.g.
solder mask and legend adhesion.

3.3 Porosity
Porosity testing of Immersion Tin is not applicable Comment [GO1]: Need to discuss this
one more time - Gerard

3.4 Adhesion

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The purpose of adhesion testing for ISn finished boards is two fold. The first is for testing the
adhesion of the ISn to the underlying copper. The second is for testing the adhesion of the
solder mask to both traces and laminate. In both cases testing should be conducted on
regions of high density on the board such as BGA sites, dams between fine pitch leaded
devices or over areas of high trace density. The tape testing will be in accordance with IPC-
TM-650, test method 2.4.1. using a strip of pressure sensitive tape. There shall be no
evidence of any portion of the surface finish or the soldermask being removed, as shown by
particles of plating/pattern or soldermask adhering to the tape.

If overhanging metal (slivers) or soldermask undercut breaks off and adheres to the tape, it is
evidence of overhang or slivers, but not of adhesion failures.

Because of the requirement to test in high density areas, the potential to leave tape residue that
could interfere with soldering exists, especially if the wrong type of tape is used. Verification of zero
impact to solderability must be demonstrated for the areas tested.
3.5 Solderability
This thickness specification contained herein shall meet the coating durability requirements of
Category 3 in J-STD-003, i.e. intended for boards likely to experience long storage (e.g. 12 months).
Caution needs to be exercised pertaining to the storage and packing of the I Sn boards to ensure
that the migration and growth of Cu/Sn IMC’s is minimized and will thus meet the category 3
requirements . Note: The use of steam conditioning is not an applicable accelerated stress method
for I Sn. The use of 72°C / 85% R.H. for 8 hours and 24 hours is the recommended stress condition
for this deposit. (See Fig 3-? For Surface mount Solderability test coupon.)

3.5.1 Solder Spread Test

The use of a spread test for verifying solderability of I Sn using a solder paste has been used since
the re-introduction of this deposit as a solderable surface. The committee has evaluated the use of
this test method in depth, and have deemed it to be an acceptable method for verifying the
solderability of the deposit as a function of contact angle achieved. The test protocol used by the
committee can be found in Appendix ? along with the coupon design. Results from a series of round
robin tests may be found in Appendix ? This data and the test protocol have been submitted to
ANSI-J-STD-005 for possible submission in the next release of that document.

3.6 Cleanliness
Due to the nature of the ISn chemical process, special post tin rinsing / cleaning may be necessary
in order for the deposit to meet current industry requirements for both SEC and SIR testing. The
process shall be installed and maintained using IPC-TM-650, Test Method 2.3.25 Detection and
Measurement of Ionizable Surface Contaminants by Resistivity of Solvent Extract and 2.6.3.5 Bare
Board Cleanliness by Surface Insulation Resistance. The use of the Telcordia™ GR78-Core SIR test
method may also be used. The SEC results shall meet the values given in IPC-6010 series of 1.56
µg/cm2 NaCl equivalent. The SIR results will be as specified in table 3-1. Failure to meet this
cleanliness specification should trigger immediate corrective action.
Note: Good SIR values do not necessarily equate to good SEC values due to the absorption of the
contaminants into the board materials. The use of both techniques is recommended until a
sufficiently large data base exists to demonstrate process control for cleanliness.

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3.6.1 Electrolytic Corrosion
The ISn process both contains and produces by-products from the reaction that may be detrimental
to long term module reliability manifested as dendritic growth between adjacent conductors or pads.
The use of IPC-TM-650 TM2.6.14.1 Electrochemical Migration Resistance Test, is recommended
for high reliability applications or designs of high density. The resistance values shall not drop more
than 1 decade after the test has been completed.

3.7 Chemical Resistance

Chemical resistance testing of the I Sn finish is not applicable.

3.8 High Frequency Signal Loss

Data exists to support the use of Immersion Tin an acceptable surface for up to 10 GHz (High
performance applications) – the committee seeks information of higher frequency use.
 Table 3-1 Requirements of Immersion Tin plating

Tests Test Requirement Class 1 Class 2 Class 3

Method Paragraph
General:
Visual Visual 3.1 Uniform plating and complete coverage of
surface to be plated
Immersion Tin APPENDIX 3.2.2 1 µm (40 µin) minimum at -4 sigma from
thickness 4 the process mean as measured on a pad
of 2.25 mm ² [3600 mils²]; typical values
of 1.15 mm to 1.3 mm
XRF standards Appendix 4 Aging of standards critical 1year max
Porosity N/A N/A

Physical:
Adhesion/Tape Test IPC-TM-650 3.4 No evidence of plating removed
TM 2.4.1 No evidience of mask removal (not all
masks will meet this requirement)
Solderability J-STD-003 3.5 Meets solderability requirements of
Category 3 durability – intended for
boards likely to experience long storage
(12 months minimum). The storage
conditions are critical if the deposit is to
meet this performance level
Chemical
Coulometric stripping Appendix 3.2 Qualification and AABUS frequency
Auger / XPS appendix 3.2 Qualification and AABUS frequency
Chemical Resistance N/A 3.7 N/A
Electrical
High Frequency N/A 3.8

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Signal Loss
Contact Resistance N/A 1.4.2
Environmental
whiskers N/A 3.9 I Sn may experience whisker growth
under certain use conditions. The end
user is responsible to determine likelihood
of whisker growth and their potential
impact on module long term reliability
Cleanliness IPC-TM-650 3.6 Max. 1.56 µg/cm2
TM 2.3.25
IPC-TM-650 3.6 1.0E+08 ohms
SIR TM 2.6.3.5

GR78-Core 3.6 1.0E+10 ohms

Electrolytic Corrosion IPC-TM-650
TM 2.6.14.1
3.9 WHISKER ISSUES:
Immersion Tin has been shown to be susceptible to whisker growth under certain conditions.
The classic acceleration methods to promote whisker formation used for electrolytic tin have
NOT shown the deposit to be susceptible to whisker growth. While the industry continues to
work on a test method designed to quickly indicate a deposits susceptibility to whisker
growth. The deposit will be used with the understanding that the responsibility to verify the
impact of potential whisker growth on a modules long term reliability is the end user’s.

4 QUALITY ASSURANCE PROVISIONS

General Quality Assurance Provisions are specified in IPC-6011 and each sectional specification.
Additional requirements for PWB with Immersion Tin (Isn) plating are specified herein for
qualification, acceptance and quality conformance.

4.1 Qualification
Qualification of a PWB product is agreed upon by the user and supplier (see IPC-6011). The process
capability of a supplier of PWB with I Sn finish shall be evaluated. APPENDIX 3 describes
recommended qualification aspects of the I Sn process by a PWB supplier.

4.1.1 Sample Test Coupons

Test specimens used for qualification of PWB with I sn finish shall be as specified in IPC-6011 and
each sectional specification. Specimen for additional testing requirements is listed in Table 4-1.

Table 4-1: Qualification Test Coupons

Test Type 1 Types 2,3,5 Types 4,6 Board
Physical Requirements M2, M5 M2, M5 M2, M5 X
Plating Thickness

Acceptance Tests
The sampling plan and frequency of acceptance testing except the solderability and plating thickness
inspections shall be in accordance with IPC-6011 and each sectional specification. The sampling
plan of the solderability and thickness of I Sn finish shall be as agreed upon by the user and the
supplier (AABUS).

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4.3 Quality Conformance Testing
Quality conformance testing shall consist of inspections as specified in IPC-6011 and each sectional
specification, with the addition of regular thickness inspections. The frequency of thickness
inspection shall be 1 inspection (5 XRF measurements) per lot for Class 1 and 2, and as agreed
upon by the user and the supplier (AABUS) for Class 3 products.
APPENDIX 1
CHEMICAL DEFINITIONS

Electroless Process
This chemical process promotes continuous deposition of a metal onto the PWB surface through an
oxidation-reduction chemical reaction, without the use of an external electrical potential. A reducing
agent, such as sodium hypophosphite, donates electrons to the positively charged metal ions in
solution, thereby reducing the metal and promoting its deposition onto the catalyzed metal surfaces
of the PWB. This reaction is considered auto-catalytic because it will continue to plate in the
presence of source metal ions and a reducing agent until the board is removed from the plating bath.
The thickness of plated deposits varies according to temperature, chemical parameters and the
amount of time spent in the plating bath.

Immersion Process
This chemical process uses a chemical displacement reaction to deposit a metal layer onto the
exposed metal surface of the PWB. In this reaction, the base metal donates the electrons that
reduce the positively charged metal ions in the solution. Driven by the electrochemical potential
difference, the metal ions in solution (e.g., gold ions in the ENIG process) are deposited onto the
surface of the board, simultaneously displacing ions of the surface metal (e.g., nickel ions in the
ENIG process) back into solution. This reaction is considered self-limiting, because once the surface
metal is plated, there is no longer a source of electrons and the reaction stops.

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APPENDIX 2
PROCESS SEQUENCE

1. Cleaner
The purpose of this step is to clean the copper surface in preparation for processing. The cleaner
removes oxides, and light surface contaminants and ensures that the copper surface will be in a
condition to be uniformly micro-etched. Vendor specifications of temperature, dwell time, agitation
and bath chemical control should be followed.

2. Microetch
The purpose of this step is to micro-etch the copper and to produce a surface that may be uniformly
catalyzed and plated with good deposit adhesion. A variety of different etchant types may be used
(for example: sodium persulfate, peroxide/sulfuric). Vendor specifications of temperature, dwell time,
agitation and bath chemical control should be followed.

3. Pre-dip – similar materials to tin bath, moderating initial deposition of the tin, providing
more controlled uniform deposit.

4. Immersion Tin

5. Post-dip / Cleaner- pH controlled rinse bath , saponifier / complexer to remove tin salts.

6. Rinsing
The purpose of this step is to remove residual process chemicals from the PWB surface after each
chemical processing step. This may be achieved in a single or multiple rinse steps. In some
instances pre-dip and/or post-dip process steps may also be required for optimum process
performance. Vendor specifications of temperature, dwell time, agitation and turn over rate should be
followed.

7. Drying
The purpose of this step is to ensure the boards are completely dry. This may be achieved by online

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vertical or off line horizontal drying. Offline horizontal drying should be preceded by a horizontal
rinsing step and should be dedicated to the I Sn process. The time and temperature have to be
optimized to suit the type of product.
APPENDIX 3
Qualification of I Sn Process by the Board Supplier

During process qualification, the following aspects shall be required:

Solderabilty
Solderability shall meet the requirements of J-STD-003 Category 3 throughout the life of the Tin
bath. Due to the affinity of Tin for Copper, special attention should be paid to copper loading and its
effect on the solderability performance

Thickness Distribution
Characterize thickness distribution from panel to panel and within the different features of the panel.
Establish acceptance criteria.

Compatibility
Due to the chemically aggressive nature of the I Sn process, verification of material compatibility is
very important. Verify that the process is compatible with pre and with post process steps and
material. Solder mask/legend ink are good example of process or material compatibility concerns.

Processability
Follow vendor instructions for process control to include; temperature/dwell time, frequency of
analysis, dump and remake schedules, controllers etc. The use of automatic dialyisis systems to
maintain a constant / maximum copper loading is a must for production facilities.?????????????

SEC / SIR / Electrolytic Corrosion Testing : I Sn is a dirty deposit that will produce corrosion
failures in very short use time periods unless great detail is paid to the cleanliness of the final
product. Multiple tests for SEC, SIR and Electrolytic corrosion are recommended over the useable
bath life of a particular chemistry being qualified. Periodic conformance testing should also be

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requested.

SERA / XPS Auger: Dave Hillman to provide info.

APPENDIX 4

XRF Measurement Techniques

Background and Measurement Considerations

Measurement of the thickness of immersion silver (IAg) or tin (ISn) plating on PCBs is an important
operation in the manufacture of printed circuit boards. The thickness of the finish has a direct impact
on the solderability and the shelf life of the product. Thickness measurements by X-Ray
Fluorescence (XRF) is a suitable choice, as it is non-destructive, relatively fast, and lends itself well
to production environments. However, measurement of thin ISn and IAg deposits present some
unique challenges to XRF instrumentation. If not properly configured and/or calibrated, XRF
measurements can be both inaccurate and imprecise.

XRF tools all provide a source of x-rays (beam generation column) and some method of x-ray
detection of the resultant fluorescence from the sample being measured. Measurement precision
depends largely on the intensity of the sample fluorescence (signal), the signal-to-background ratio
and the change in signal intensity with respect to change in thickness. Measurement accuracy
depends on the accuracy of the calibration standards, and the effectiveness of the calibration model
used, as well as any spectrum processing algorithms, which may be used to extract net intensity
data from the acquired sample spectrum.

In the case of typical, lower cost XRF tools used to measure plating thickness in production
environments, X-ray sources using tubes with W or Mo anodes are coupled with proportional counter
detectors. In most cases, this is a good solution for most plating thickness measurement.

However, with respect to measurement of ISn and IAg on PCB’s there are two primary issues, which
emerge when using this typical XRF configuration, namely signal level and background noise.

First, measurement precision is often poor because the signal levels (i.e., fluorescence intensities)
are low. In addition, because such instruments typically detect the Ag and Sn “K” series x-ray lines,
the change in signal per change in thickness is often small. The result is a thickness measurement

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which is not precise, and which is not sensitive to small changes in plating thickness. Gauge R&R
studies typically exceed 50% or more.

The second issue relates to the high energy x-ray scatter originating from the epoxy board material.
This scatter will provide excessive background noise in the IAg and ISn spectral regions, which
further degrades measurement precision. This background noise also varies with respect to the
laminate copper thickness. Since the plating fluorescence signal intensity from immersion IAg and
ISn is on the same order of magnitude as this background scatter, such variations in background
due to changes in Cu thickness can result in 10% to 50% error in thickness measurement.

Recommended XRF Configuration

By employing background compensation software which attempts to model the background noise on
a sample by sample basis, and by using extra long measuring times (example 120 – 180 seconds),
measurement of IAg and ISn is possible using the typical low cost XRF instrument configuration,

In addition, the use of a modified X-ray beam generation column, one can excite the more efficient L-
series x-ray lines for IAg and ISn. Such cost effective modifications are offered by some suppliers for
standard XRF tools used by the PCB industry to measure plating thickness.
The use of the L-series x-ray lines provides three benefits, which improve accuracy and
measurement precision:

1. The fluorescence intensities for the L series x-ray lines can be made to be higher than the
K lines for the thickness range under consideration. Higher intensity automatically provides
for better measurement precision.

2. Because the x-ray L line series are much lower in energy than corresponding K lines for IAg
and ISn, the maximum measurement range is drastically reduced (typically 60 microinches
for Ag and 100 microinches for Sn). By virtue of this reduced scale, the change in L line
fluorescence intensity with respect to change in plating thickness is significantly
increased relative to the K line series.

3. Since the L-series are in the low energy part of the x-ray spectrum, low energy scatter from
the epoxy board material cannot penetrate the Cu layer to affect the detector. Therefore,
background noise levels in this region of the spectrum are much lower than the higher energy
portion of the spectrum. The significantly improved signal-to-noise ratios result again in
better precision. Measurement accuracy is also improved, as there is no background noise
variation due to Cu thickness variation from sample to sample.

By making a simple configuration change, measurement accuracies can be improved to +/- 5% or

+/- 0.25 microinches, regardless of copper laminate thickness. Gauge R&R results are typically in
the range of 10 to 20%, depending on measurement time used and process tolerances. This
solution provides adequate measurement of ISn and IAg coatings on larger pad areas (15mil or
larger) and traces which are at least 6 mils wide.

Further improvements to measurement precision can be achieved by more costly hardware

modifications, namely solid-state detectors and optical focusing elements:

Solid-state detectors such as PIN diodes, Si (Li) or silicon drift, SDD detectors, can be used to
further improve signal-to-noise ratios and therefore measurement precision. Such detectors are

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often more sensitive than proportional counters to low energy radiation such as IAg and ISn L line
fluorescence by virtue of their superior energy resolution and typically closer proximity to the sample.
However, used alone with standard XRF systems, this solution is beneficial only for measurement of
relatively large sample areas (pads > 30 mils square or traces > 20 mils wide).

By coupling these detectors with x-ray optics known as focusing elements, very precise
measurement of immersion coatings can be made on areas as small as 4 mils square. X-ray optics
focus x-rays from the x-ray source, providing a high intensity beam to the sample. The result is high
intensity fluorescence. In addition, the optic will filter the x-ray spectrum from the source, favoring
the low energy portion of the spectrum, which favors further enhancement of L line fluorescence
from ISn and IAg. A minimum detection limit of 0.1 microinches is possible using such
configurations. Gauge R&R values of < 10% are possible even on areas as small as 4 mils square.

Instrumentation Configuration and Calibration

Calibration is achieved by using calibration standards in the range of 4 to 40 microinches. Calibration

does not require the use of background subtraction software (however, if available it does not detract
from the measurement to use such software). Calibration schemes can include simple non-linear
empirical curve fitting models or single layer fundamental parameters calibration models. The latter
is preferred if one is attempting to measure immersion plating thicknesses > 40 microinches.

In either case, intensity information should be collected from that part of the spectrum in which the L
line series of the plating element (Sn or Ag) appears. This configuration will provide adequate
precision and accuracy for immersion Ag and Sn when using measurement times on the order of 30
to 90 seconds when measuring sample pads >15 mils square or traces > 6 mils wide.

Measurement of smaller sample areas will either require longer measurement time or the use of
higher cost XRF products utilizing focusing elements and solid state detectors with significant
improvements in the form of better measurement precision, reduction in measurement time and
reduction in minimum detectable limits.

Thickness Standards

Certified thickness standards are needed, either to calibrate the XRF tool, or in the case of certain
fundamental parameters (“standard less”) calibrations, to verify that measurements are accurate.
Because of the thin nature of these layers, concerns about intermetallic formation and the stability
and life expectancy of the standard must be considered. An elegant solution to these concerns is
the use of thin foil standards. Such foils are made by vacuum deposition onto thin plastic carrier foils
(typically Mylar). The result is a stable film, which is isolated from any substrate and cannot form
intermetallic layers.

The thicknesses of such standards are typically calculated on the basis of weight per area (as
determined by a sensitive balance or other suitable analytical method) and then converted to
equivalent thickness by dividing by the handbook density for the layer

Measurement Interpretation

Density variability and intermetallic formation have a direct effect on measurement and must be
understood for proper interpretation of the results.

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Density of the deposit:

The XRF method does not measure film thickness directly. Instead, XRF intensity relates to the
mass per area of the film. Linear thickness is calculated by dividing mass per area units by film
density. All XRF instrument suppliers use the same convention in this case. That is, film density is
assumed to be that given in published element reference tables and used to display measurements
in common thickness units such as microinches, microns, nanometers and angstroms.

In cases where the plating density is known to differ from conventional handbook densities, most
XRF instruments provide density correction software. As described previously, calibration standards
for IAg and ISn, are generally produced by vacuum deposition rather than chemically deposition.
XRF responds to plating mass per area. As long as the immersion plating process deposits
essentially pure Sn or Ag layers, then XRF measurements will be accurate since the calibration
standards produced by vacuum deposition are also essentially pure.

Factors such as surface finish, surface oxidation, and crystal structure will not affect in any
appreciable way, XRF measurements of plating thickness. Only differences in density between the
certified standards (using assumed, handbook density values) and the density of immersion plating
will influence thickness measurement calculation. Such differences may be caused by deviations in
the crystal structure of the deposit or porosity variations. In such cases, unless compensated for
using a density correction, there will be systematic differences between XRF thickness
measurements and measurements using other techniques such as SEM micrographs, which
measure true linear film thickness.

Intermetallic Formation:

Especially in the case of ISn, it is well established that migration of Sn and Cu will form intermetallic
layers with various species of Sn-Cu combinations. This intermetallic growth can potentially produce
a significant effect on XRF measurements. Sn signal intensity will change as a result of intermetallic
formation. This is due to the absorption (i.e., shielding) influence of Cu atoms on Sn x-rays
fluoresced in the intermetallic zone. This effect reduces overall Sn signal when compared to the
equivalent number of Sn atoms if they were to all lie on top of the Cu substrate. This would translate
into an apparent reduction in Sn plating thickness measurement, even though no Sn atoms are lost
or removed from the sample.

Qualitatively speaking, this effect is to be expected; rendering measurements of immersion Sn plated

PCB’s biased on the low side. On the other hand, if one wanted to consider only the thickness of the
“free” Sn layer, the bias in XRF thickness measurement would be on the high side, since some Sn X-
rays from the intermetallic zone are counted and included in the thickness calculation. In either
case, the magnitude of the bias will be determined by the magnitude of the intermetallic formation.

While such measurements have limited merit in terms of absolute accuracy, they provide the user
with a relative measure for process control.

Other Applications

The same XRF configurations recommended above for IAg and ISn are also effective for immersion
Pd (IPd) measurements. However, measurement of other plating metal deposits such, as Au and
Sn-Pb are not as precise using these same configurations. As such, the user who needs to measure
ISn or IAg as well as immersion Au (IAu) and solder alloy deposits, must consider trade-offs in
precision and determine which applications are more critical to control.

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The above recommended XRF configurations provide a much greater improvement benefit for ISn,
IAg and IPd compared to the relatively smaller decline in measurement precision for IAu plating and
solder plating. The latter is only evident when smaller x-ray beams are used (< 12 mils or 0.3 mm)
and can be compensated for with longer measurement times. It should be noted that declines in
measurement performance for IAu and solder plating, using the above XRF are restricted to
measurement precision. Measurement accuracy in any case for these applications will not decline
using the above XRF configuration.

In any case, when considering the optimum XRF configuration for a given set of plating
measurement applications, one should consult with the XRF supplier for specific recommendations.

Frank Ferrandino
Technology Director
Matrix Metrologies Inc
APPENDIX 5
Auger/XPS and Coulometric Stripping Techniques.

Auger electron spectroscopy (AES) identifies elemental compositions of surfaces by measuring the
energies of Auger electrons. Auger electron emission is stimulated by bombarding the sample with
an electron beam. The Auger electron energies are characteristic of the elements from which the
electrons come. Auger electron spectroscopy is a widespread method for analysis of surfaces, thin
films, and interfaces.

The basic Auger process starts with removal of an inner shell atomic electron to form a vacancy.
Several processes are capable of producing the vacancy, but bombardment with an electron beam is
the most common. The inner shell vacancy is filled by a second atomic electron from a higher shell.
Energy must be simultaneously released. A third electron, the Auger electron, escapes carrying the
excess energy in a radiationless process. The process of an excited ion decaying into a doubly
charged ion by ejection of an electron is called the Auger process. Alternatively, an X-ray photon
removes the energy. For low atomic number elements, the most probable transitions occur when a
K-level electron is ejected by the primary beam, an L-level electron drops into the vacancy, and
another L-level electron is ejected. Higher atomic number elements have LMM and MNN transitions
that are more probable than KLL.

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The figure illustrates two competing paths for energy dissipation with titanium as an example. The
illustrated LMM Auger electron energy is ~423 eV (EAuger = EL2 - EM4 - EM3) and the X-ray photon
energy is ~457.8 eV (Ehv = EL2 - EM4).
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