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Direct Memory Access (DMA) : Memory Central Processing Unit Programmed Input/output

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Direct Memory Access(DMA)

● Direct memory access (DMA) is a feature of computer systems and allows


certain hardware subsystems to access main system memory
independently of the central processing unit (CPU).
● Without DMA, when the CPU is using programmed input/output, it is
typically fully occupied for the entire duration of the read or write operation,
and is thus unavailable to perform other work. With DMA, the CPU first
initiates the transfer, then it does other operations while the transfer is in
progress, and it finally receives an interrupt from the DMA controller
(DMAC) when the operation is done.
● This feature is useful at any time that the CPU cannot keep up with the rate
of data transfer, or when the CPU needs to perform work while waiting for
a relatively slow I/O data transfer.

Working steps
1. If the DMA controller is free, it requests the control of bus from the
processor by raising the bus request signal.
2. Processor grants the bus to the controller by raising the bus grant signal,
now DMA controller is the bus master.
3. The processor initiates the DMA controller by sending the memory
addresses, number of blocks of data to be transferred and direction of data
transfer.
4. After assigning the data transfer task to the DMA controller, instead of
waiting ideally till completion of data transfer, the processor resumes the
execution of the program after retrieving instructions from the stack.
5. It makes the data transfer according to the control instructions received by
the processor.
6. After completion of data transfer, it disables the bus request signal and
CPU disables the bus grant signal thereby moving control of buses to the
CPU.
Types of Data Transfer
a) Burst Mode: In this mode DMA handover the buses to CPU only after completion of

whole data transfer. Meanwhile, if the CPU requires the bus it has to stay ideal and wait

for data transfer.

b) Cycle Stealing Mode: In this mode, DMA gives control of buses to CPU after transfer

of every byte. It continuously issues a request for bus control, makes the transfer of one

byte and returns the bus. By this CPU doesn’t have to wait for a long time if it needs a

bus for higher priority task.

c) Transparent Mode: Here, DMA transfers data only when CPU is executing the

instruction which does not require the use of buses.

Key Points
➔ To speed up the transfer of data between I/O devices and memory,
DMA controller acts as station master.
➔ DMA controller is a control unit, part of I/O device’s interface circuit,
which can transfer blocks of data between I/O devices and main
memory with minimal intervention from the processor.
➔ It is controlled by the processor. The processor initiates the DMA
controller by sending the starting address, Number of words in the
data block and direction of transfer of data .i.e. from I/O devices to
the memory or from main memory to I/O devices.
➔ More than one external device can be connected to the DMA
controller.
➔ DMA controller contains an address unit, for generating addresses
and selecting I/O device for transfer.
➔ It also contains the control unit and data count for keeping counts of
the number of blocks transferred and indicating the direction of
transfer of data.
➔ When the transfer is completed, DMA informs the processor by
raising an interrupt.

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