A

MINI PROJECT REPORT

On

4 - Bit and 8 - Bit FFTs using Verilog

Submitted in partial fulfilment of the academic requirements

For the award of the degree of

BACHELOR OF TECHNOLOGY
In
ELECTRONICS AND COMMUNICATION ENGINEERING
By

M. Sai Sriram 19B61A0474

Under the Guidance of

Dr. M. Senthil Kumar (Associate Professor)

NALLA MALLA REDDY ENGINEERING COLLEGE

AUTONOMOUS INSTITUTION
Accredited by NAAC with „A‟ grade, NBA Accredited B.Tech. Programs
Divyanagar, Medchal – Malkajgiri (Dt), Ghatkesar(M), Narapally – 500088
2022 – 2023
 CERTIFICATE

This is to certify that the mini project entitled “4-Bit and 8-Bit FFTs using Verilog”
is being submitted by M. Sai Sriram (19B61A0474) in partial fulfilment of the academic
requirements for the award of degree of Bachelor of Technology in ELECTRONICS
AND COMMUNICATION ENGINEERING in NALLA MALLA REDDY
ENGINEERING COLLEGE, Autonomous Institution, JNTU - HYDERABAD during the
academic year 2022-2023.

Dr. M. SENTHIL KUMAR Mrs. T. RAJANI

(Internal Guide) (Head of the Department)

EXTERNAL EXAMINER
 CANDIDATE’S DECLARATION
I hereby declare that the project report entitled “4-Bit and 8-Bit FFTs using
Verilog” is the bona-fide work done and submitted by me under the guidance of
Dr. M. SENTHIL KUMAR, in partial fulfilment of the requirements for the degree of
Bachelor of Technology in Electronics and Communication Engineering to the
Department of Electronics & Communication Engineering, Nalla Malla Reddy Engineering
College, Divya Nagar, Medchal-Malkajgiri Dist.

Further I declare that the report has not been submitted by anyone to any other
institute or university for the award of any other degree.

PLACE: HYDERABAD M. SAI SRIRAM (19B61A0474)

DATE:
 ACKNOWLEDGEMENT

The completion of the project gives me an opportunity to convey my gratitude to all

those who helped me to reach a stage where I have the confidence to launch my career in the
competitive world.

I express my sincere thanks to Dr. M. N. V. Ramesh, Principal, Nalla Malla Reddy

Engineering College, Divya Nagar, for providing all necessary facilities to complete my
project.

I express my sincere gratitude to Mrs. T. Rajani, Head of the Department of

Electronics and Communication Engineering, Nalla Malla Reddy Engineering College, Divya
Nagar, for providing necessary facilities to complete my project successfully.

I express my sincere thanks to my project coordinator Dr. S. Kalyan Kasturi,

Associate Professor of Department of Electronics and Communication Engineering, Nalla
Malla Reddy Engineering College, Divya Nagar, for his valuable guidance, encouragement,
and co-operation throughout the project.

I express my sincere thanks to my project guide Dr. M. Senthil Kumar, Associate

Professor of Department of Electronics and Communication Engineering, Nalla Malla Reddy
Engineering College, Divya Nagar, for his valuable guidance, encouragement, and co-
operation throughout the project.

Finally, I would like to thank our parents and friends for their continuous
encouragement and valuable support to me.
 ABSTRACT

In the field of communication, signal transmission is mandatory. This signal

transmission is done by transforming its properties. These properties can be changed in many
ways. The common method is using transforming techniques, the signal will transform from
one form of level to the same (with changed properties) or other form of levels.This
transformation is commonly done using MATLAB simulations. In this a simple program will
write, execute and analyse it. But here, we use a Verilog code for the same outcomes. Here,
we will write 3 different levels of codes for the same program. In Xilinx, Verilog is used as
an HDL or famously known as VHDL, which stands for Verilog Hardware Description
Language. The HDL code is then dumped into an FPGA board for easy understanding and
observing the code implementation.
 CONTENTS

Chapter 1: Introduction
1.1 Introduction 01
1.2 Literature Survey 02

Chapter 2: Project Overview

2.1 Schematic Diagram and its Description 03
2.2 Operation of the Project 06
2.3 Images of 4 bit and 8 bit FFT 07

Chapter 3: Software Description

3.1 Xilinx ISE 08
3.2 4-bit FFT code 10
3.3 8-bit FFT code 12

Chapter 4: Results
4.1 Output image of 4-bit FFT 15
4.2 Output image of 8-bit FFT 16

Chapter 5: Applications 17

Chapter 6:
6.1 Advantages 18
6.2 Disadvantages 19

References 20
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CHAPTER 1
INTRODUCTION

1.1 Introduction
In a Bachelor's Degree, there are various departments, various courses, and for
different courses there are different methods to complete their bachelor‟s degree. In that way,
we have a great chance to learn and explore to obtain the same outputs by applying our
different levels of methodologies.

In that way, our ECE under Bachelor of Technology has an ample of opportunities in
both career wise and in exploring technologies like hardware related, software related,
business development related and not only these, it has more learning features to explore the
real world.

Also, in our graduation times, we apply different technologies to obtain the same
outputs, and it's also important to do so. In that manner of applying different techniques for
the same outcomes we get a lot of knowledge and we know the pros and cons of applying it.

This project replicates such technology for the same outcomes, and will get a better
understanding of what and which is better to opt for and go for it.

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1.2 Literature Survey:

A literature survey is a comprehensive summary of previous research on a particular
topic. The literature review surveys articles, books, and other sources relevant to a particular
area of research. The review should enumerate, describe, summarise, objectively evaluate and
clarify the previous research.

This particular project is used to find what and which is a better way to opt and how
to understand what are the applications behind applying two different techniques for the same
outcome.

For this, we have two techniques and we will compare the outcomes with each other
and will understand and decide which is easy for real time application purposes.

To implement this, we‟ll deal with two types of softwares namely, MATLAB and
XILINX which both are used for simulation purposes.

In MATLAB, code is written in a normal way, whereas in XILINX, code is written in

three types namely, Behavioural model, Synthesis model.

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CHAPTER 2
PROJECT OVERVIEW

2.1 SCHEMATIC DIAGRAM AND ITS DESCRIPTION

Block Diagram :

Fig: 4-bit FFT

In 4-bit FFT, we have 4 bit inputs namely, x(0), x(2), x(1), x(3). For these we apply fast
fourier transform technique which is one of methods in signal transformation from discrete
form. The fast fourier transform in short FFT is a transformation method used in signals and
system domain.
In this, first two inputs form a pair and are received at two respective following
junctions. After that, the remaining two follow the same step to obtain at their junctions. Then
after the alternative points will join to get the altered output. When inputs are as follows x(0),
x(2), x(1), x(3), the outputs will be as follows x(0), x(2), x(1), x(3).

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Block Diagram:

Fig: 8-bit FFT

In 8-bit FFT the inputs are as follows, x(0), x(4), x(2), x(6), x(1), x(5), x(3), x(7).For
these we apply fast fourier transform technique which is one of methods in signal
transformation from discrete form. The fast fourier transform in short FFT is a transformation
method used in signals and system domain.

In this, first two inputs form a pair and are received at two respective following
junctions. After that, the remaining two follow the same step to obtain at their junctions. Then
after the alternative points will join to get the altered output. Here the pairing of inputs will be
as follows, x(0), x(4), x(2), x(6) are first set of 4, which will be x(0), x(1), x(2), x(3) &
remaining inputs form second set of 4 which will be x(1), x(5), x(3), x(7). For this we will
obtain the output as x(4), x(5), x(6), x(7).

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The two sets of output will get at the same time which all 8 inputs will be given and
applied FFT, and get output as mentioned above.

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2.2 OPERATION OF PROJECT

Generally, we use MATLAB tools for implementing any signal transformation. In the
field of communication the signals and systems play vital roles. For this there are Basic
Simulation and Digital Signal Processing labs for simulating the signals.

In that we use MATLAB tools for this. MATLAB is commonly used for signal
simulations. This may be considered as a previous method of technology. Here Programming
is easy and implementation of code is quite simple.

But, we use Verilog in this project. From this, we have different uses, like writing code
in three different levels, and understanding each and every step in a simple manner.

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2.3 IMAGES OF 4 BIT AND 8 BIT FFT

Fig: 4 bit FFT

Fig: 8 bit FFT

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CHAPTER 3
SOFTWARE DESCRIPTION

3.1 Xilinx ISE

For any VLSI projects, the main and one and only source is to develop a project using
the Xilinx Software. Xilinx is a company where there are products of different versions of
ISE. ISE stands for Integrated Simulation Environment. Xilinx is not an IDE, which cannot
interface with hardware components.

Fig: Logo of Xilinx

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Xilinx, Inc. was an American technology and semiconductor company that primarily
supplied programmable logic devices. The company was known for inventing the first
commercially viable field programmable gate array (FPGA) and creating the first fabless
manufacturing model.

Xilinx was co-founded by Ross Freeman, Bernard Vonderschimit, and James in 1984
and the company went public on the NASDAQ in 1990. AMD announced its acquisition of
Xilinx in October 2020 and the deal was completed on February 14, 2022 through an all-
stock transaction worth an estimated $50 billion.

Xilinx was founded in Silicon Valley in 1984 and headquartered in San Jose, USA,
with additional offices in Longmont, USA; Dublin, Ireland; Singapore; Hyderabad, India;
Beijing , China; Shanghai, China; Brisbane, Australia and Tokyo, Japan.

According to Bill Carter, former CTO and current fellow at Xilinx, the choice of the
name Xilinx refers to the chemical symbol for silicon Si.The "linx" represents programmable
links that connect programmable logic blocks together. The 'X's at each end represent the
programmable logic blocks.

Xilinx sells a broad range of FPGAs, complex programmable logic devices (CPLDs),
design tools, intellectual property and reference designs.Xilinx customers represent just over
half of the entire programmable logic market, at 51%. Altera (now Intel) is Xilinx's strongest
competitor with 34% of the market. Other key players in this market are Actel (now
Microsemi), and Lattice Semiconductor.

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3.2 4-bit FFT code :

module four_fft( a,b,c,d,A,Ai,B,Bi,C,Ci,D,Di);

input [3:0] a;

input[3:0] b;

input[3:0] c;

input[3:0] d;

output [5:0] A;

output [5:0] Ai;

output[5:0] B;

output [5:0] Bi;

output[5:0] C;

output [5:0] Ci;

output[5:0] D;

output [5:0] Di;

assign A = a+b+c+d;

assign Ai=0;

assign B=a-c;

assign Bi=d-b;

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assign C= a+c-b-d;

assign Ci=0;

assign D=a-c;

assign Di= b-d;

endmodule

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3.3 8-bit FFT :

module eight_fft( a,b,c,d,e,f,g,h,A,B,C,D,E,F,G,H,Ai,Bi,Ci,Di,Ei,Fi,Gi,Hi);

input signed [31:0] a;

input signed [31:0] b;

input signed [31:0] c;

input signed [31:0] d;

input signed [31:0] e;

input signed [31:0] f;

input signed [31:0] g;

input signed [31:0] h;

output signed [31:0] A;

output signed [31:0] Ai;

output signed [31:0] B;

output signed [31:0] Bi;

output signed [31:0] C;

output signed [31:0] Ci;

output signed [31:0] D;

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output signed [31:0] Di;

output signed [31:0] E;

output signed [31:0] Ei;

output signed [31:0] F;

output signed [31:0] Fi;

output signed [31:0] G;

output signed [31:0] Gi;

output signed [31:0] H;

output signed [31:0] Hi;

real p= 0.707;

assign A=a+b+c+d+e+f+g+h;

assign Ai=0;

assign B=(a-e)+p*(b-f+h-d);

assign Bi=(g-c)+p*(h-d-b+f);

assign C= a+e-g-c;

assign Ci= d+h-b-f;

assign D=(a-e)+p*(f-b+d-h);

assign Di=(c-g)+p*(h+f-b-d);

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assign E=a+e+c+g-b-f-d-h;

assign Ei=0;

assign F=(a-e)+p*(f-b-h+d);

assign Fi=(g-c)+p*(b+d-h-f);

assign G=a+e-g-c;

assign Gi=b+f-d-h;

assign H= (a-e)+p*(b+h-f-d);

assign Hi=(c-g)+p*(b+d-h-f);

endmodule

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CHAPTER 4
OUTPUT IMAGES

OUTPUT image of 4-bit FFT :

Fig: Output Image of 4-bit FFT

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OUTPUT image of 8-bit FFT :

Fig: Output image of 8-bit FFT

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CHAPTER 5
APPLICATIONS

● The fast fourier transform is used to transform the discrete signal and
gives output as fast as possible.
● It is used in both time domain and frequency domain
● It is mainly used for reducing the number of steps involved in
transforming a signal.
● This is obtained by applying FFT for discrete signal in decimation in
time, well known by, DIT. So, the name is well known by DIT-FFT &
also DIF-FFT.
● This fast fourier transform is mainly focused on, reducing the number of
steps involved in transformation techniques.
● So, by process like 4-radix, 8-radix, this FFT is implemented and gives
output in complex conjugate format.

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CHAPTER 6
ADVANTAGES & DISADVANTAGES

6.1 ADVANTAGES :

● FFT is one of transformations techniques used in signals and systems and DSP subject
domains.
● It is a simple and basic transformation which is easy and simple to learn.
● Basically, we use this technique and analyse the signal transformation with the help of
MATLAB software tools.
● Here, we use a Verilog method, which is one of the simulation techniques in the VLSI
subject domain.
● By using the Verilog method, we will have a benefit of less no of lines in
programming.
● From this we will have a chance to learn new technologies.
● The analysis of the output waveform is pretty simple by applying the Verilog method.

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6.2 DISADVANTAGES :

● Behind every problem solving there are some drawbacks, which might lead to major
problems in future.
● Here also, there are some drawbacks, which may be considered as temporary issues
and can be resolved in future.
● The main drawback is we have a Verilog code in three different forms, i.e. in
Behavioural model, Synthesis model, Data Flow Model.
● Also, the main problem while executing in this format is the software issue.
● Here, we have to install separate software to execute code in Verilog called Xilinx
ISE.
● Also, the other problem is we have to write code in testbench waveform, for output
waveform.

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REFERENCES
● Code is from GITHUB
[https://github.com/akhilwadhwa22/4-and-8-Point-FFT-using-Verilog]
● Reference from IEEE journals.
● Guidance from College Faculty

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