Location via proxy:   [ UP ]  
[Report a bug]   [Manage cookies]                
0% found this document useful (0 votes)
13 views79 pages

Chap1 Data Representation MOOC

Download as pdf or txt
Download as pdf or txt
Download as pdf or txt
You are on page 1/ 79

CHAPTER

fit@hcmus
fit@hcmus

OUTLINE
• Common systems of number: • Dealing with overflow
convert from a system of • Character (ASCII, Unicode)
number to the other (2,10,16) • Data format in C program
• Integer representation & • Heterogeneous data
comparison structures
• Operation with integer • Data alignment

2
fit@hcmus

Number systems
£ An unsigned integer with n digits in q-base system is
represented in general formular:
n -1
xn -1... x1 x0 = xn -1.q + ... + x1.q + x0 .q
1 0

• The base system commonly represented in the computer is base 2

3
fit@hcmus
Watch these videos:
£ Introduction to number system and
Number systems library
£ Hexadecimal number system
£ Convert from decimal to binary
£ Converting larger number from
decimal to binary
£ Converting from decimal to
hexadecimal representation
£ Converting directly from binary to
hexadecimal
4
fit@hcmus
Unsigned Integers representation

£ Represent positive values such as length, weight, ASCII


code, color code, ...
£ The values of an unsigned integer is the magnitude of its
underlying binary pattern
Xn-1×2n-1 + … + X1×21 + X0×20
£ Ex: Suppose that n =8, the binary representation 10000001
Absolute value is 10000001-> 129 (decimal)
Hence, the integer is 129 (decimal)

5
fit@hcmus Unsigned Integers representation
£ The n-bits binary pattern can represent the values
from 0 to 2n -1
n Minimum value Maximum Value
8 0 28 -1 = 255
16 0 216 -1 = 65535
32 0 232-1 = 4294967295
64 0 264 -1 = 18446744073709551615

6
fit@hcmus Unsigned Integers representation
Read the explanation in this link and
watch these videos:
£ The binary number system
£ Converting the decimal numbers to
binary (remind)
£ Pattern in binary numbers
Take a practice

7
fit@hcmus
Signed Integers representation
Signed integers can represent zero, positive integers, as well as
negative integers
Four representation schemes are available for signed integers:
£ Sign-Magnitude representation
£ 1's Complement representation
£ 2's Complement representation
£ Bias (k-excess)
Signed numbers in the computer system are represented in the 2’s
Complement scheme

8
10000101

Signed Magnitude
9
fit@hcmus
Sign-Magnitude representation

£ The most-significant bit (MSB) is the sign bit:


0 -> positive integer
1 -> negative integer
£ The remaining n-1 bits represents the magnitude
(absolute value) of the integer (n is the length of bit
pattern)

10
fit@hcmus
Sign-Magnitude representation

£ Ex: Suppose that n =8, the binary representation


10000001
Sign bit is 1 -> negative number
Absolute value is 0000001-> 1 (decimal)
Hence, the integer is -1 (decimal)

11
00000000 ?
10000000 ?

2 representations of zero
12
fit@hcmus
Sign-Magnitude representation

£ The n-bits binary pattern can represent the values from


(-2n-1)+1 to 2n -1 - 1
Ex: Suppose that n = 8, the range of values is -127 to 127
£ Positive number and negative number differ MSB
value(sign bit), the absolute value are the same
£ There are two representations for the number zero, which
could lead to inefficiency and confusion.

13
11111010

One’s Complement
14
fit@hcmus
One’s Complement representation
£ The most-significant bit (MSB) is the sign bit:
0 -> positive integer
1 -> negative integer
£ The remaining n-1 bits represents the magnitude of the integer (n
is the length of bit pattern) as follow:
positive integers: the absolute value of the integer is equal to the
magnitude of the (n-1)-bit binary pattern
negative integers: the absolute value of the integer is equal to the
magnitude of the complement (inverse) of the (n-1)-bit binary pattern

15
fit@hcmus
One’s Complement representation

Ex: Suppose that n =8, the binary representation 10000001


Sign bit is 1 -> negative number
Absolute value is the complement of 0000001-> 1111110 ->
126 (decimal)
Hence, the integer is -126 (decimal)

16
00000000 ?
11111111 ?

2 representations of zero
17
fit@hcmus
One’s Complement representation

£ Values:
Xn-1×(-2n-1+1) + Xn-2×(2n-2) + … + X1×21 + X0×20
£ The n-bits binary pattern can represent the values from
- (2n-1-1) to 2n-1 -1
Ex: Suppose that n = 8, the range of values is -127 to 127
£ There are two representations for the number zero, which
could lead to inefficiency and confusion.
£ The positive integers and negative integers need to be
processed separately
18
11111011

Two’s Complement
19
fit@hcmus
Two’s Complement representation

£ The most-significant bit (MSB) is the sign bit:


0 -> positive integer
1 -> negative integer
£ The remaining n-1 bits represents the magnitude of the
integer (n is the length of bit pattern) as follow:
positive integers: the absolute value of the integer is equal to
the magnitude of the (n-1)-bit binary pattern
negative integers: the absolute value of the integer is equal to
the magnitude of the complement (inverse) of the (n-1)-bit binary
pattern plus one
20
fit@hcmus
Two’s Complement representation

Ex: Suppose that n =8, the binary representation 10000001


Sign bit is 1 -> negative number
Absolute value is the complement of 0000001 + 1
-> 1111110 + 1
-> 127 (decimal)
Hence, the integer is -127 (decimal)

21
00000000
Any question?

Only one representation of zero


22
fit@hcmus
Two’s Complement representation
£ Values:
Xn-1×(-2n-1) + Xn-2×(2n-2) + … + X1×21 + X0×20
£ The n-bits binary pattern can represent the values from -2n-1 to
(2n-1 )-1
Ex: Suppose that n = 8, the range of values is -128 to 127
£ There is one representations for the number zero
£ The two’s complement number of N is the negative form of N
Ex: How to represent the -5 (decimal) in binary:
The bit binary pattern of 5 is 00000101
The two’s complement number of 5 is 11111010 plus 1
-> 11111011 23
fit@hcmus
Two’s Complement representation

Ex: Suppose that n =8, the binary representation 10000001


Sign bit is 1 -> negative number
Absolute value is the complement of 0000001 + 1
-> 1111110 + 1
-> 1111111
-> 127 (decimal)
Hence, the integer is -127 (decimal)

24
Bia s ?
???
es s)
- exc
( k

Only one representation of zero


25
fit@hcmus
Biased (K-excess)
£ Choose K (a positive integer) to allows operations on the biased
numbers to be the same as for unsigned integers but represents
both positive and negative values. K is usually 2n-1-1 or 2n-1
£ The most-significant bit (MSB) is recognized as the sign bit:
1 -> positive integer
0 -> negative integer
£ All n bits represents the magnitude of the integer (n is the length
of bit pattern) by subtraction between the bias value K and
unsigned value N of that n-bits binary pattern
positive integers: N > K, the absolute value of the integer is equal to N - K
negative integers: N < K, the absolute value of the integer is equal to K - N
26
fit@hcmus
Biased (K-excess)
Ex: Suppose that n =8, K =127, the binary representation
of N is 10000001 with unsigned value is 129 decimal
(greater than K)
-> N is positive integer
-> Absolute value is N – K = 129 – 127 = 2 (decimal)
Hence, the integer is 2 (decimal)

27
fit@hcmus
Biased (K-excess)
£ The n-bits binary pattern can represent the values
-K à 2n-1 – K
-(2n-1 – 1) à 2n-1, with K = 2n-1 - 1
Ex: Suppose that n = 8, K = 127, the range of values is -127 to
128
£ There is one representations for the number zero:
01111111
£ Biased representations are now primarily used for the
exponent of floating-point numbers
28
fit@hcmus
Biased (K-excess)

Ex: Suppose that n =8, K=127, how to represent a number


in binary
Positive number: 25 (decimal)
N = 25 + K = 25 + 127 = 152
The bit binary pattern is -> 10011000
Negative number: -25 (decimal)
N = -25 + K = -25 + 127 = 102
The bit binary pattern is -> 01100110

29
fit@hcmus
Integer Operations

£ Logical operations
AND, OR, XOR, NOT
SHL, SHR, SAR
£ Arithmetic operation
Add/Subtract
Multiply
Division

30
fit@hcmus

Logical Operations
AND
AND 00 11 OR
OR 00 11 XOR
XOR 00 11 NOT
NOT 00 11

00 00 00 00 00 11 00 00 11 11 00

11 00 11 11 11 11 11 11 00

31
fit@hcmus

Shift Operations
A logical shift moves bits to the left/ right and places a 0’s form in

the vacated bit on either end. The bits “fall off” will be discarded.
1 1 0 0 1 0 1 0 1 1 0 0 1 0 1 0

0 1 1 0 0 1 0 1 1 1 1 0 0 1 0 0
Shift Right Logical Shift Left Logical (SHL)
(SHR)
32
fit@hcmus Shift Operations

An arithmetic shift right preserves the sign bit

1 1 0 0 1 0 1 0

1 1 1 0 0 1 0 1

Shift Right Arithmetic


(SAR)

33
fit@hcmus Shift Operations

A circular shift (rotate) places the bit shifted out of one end into

the vacated position on the other end.

1 1 0 0 1 0 1 0 1 1 0 0 1 0 1 0

0 1 1 0 0 1 0 1 1 1 1 0 0 1 0 1
Rotate Right (ROR) Rotate left (ROL)

34
fit@hcmus
Advanced
£ x SHL y = x . 2y
£ x SAR y = x / 2y
£ AND uses to switch off a bit (AND with 0 = 0)
Convert lower case to upper case

£ OR uses to switch on a bit (OR with 1 = 1)


Convert upper case to lower case

£ XOR, NOT uses to reverse a bit (bit i XOR with 1 = NOT(i))


£ x XOR x = 0
35
fit@hcmus
Advanced

Suppose that x is an integer:


• Get the value of bit i: (x SHR i) AND 1
• Set the value 1’s of bit i: (1 SHL i) OR x
• Set the value 0’s of bit i : NOT(1 SHL i) AND x
• Reverse bit i: (1 SHL i) XOR x

36
fit@hcmus
Integer Operations

£ Logical operations
AND, OR, XOR, NOT
SHL, SHR, SAR
£ Arithmetic operation
Add/Subtract
Multiply
Division

37
fit@hcmus

Add Operation

Rule: Ex:
1
0 1 1 1 1 0 1
0 0 1
1 0 0 0 1
1 1 10
1 0 1 1 1 0

38
fit@hcmus

39
fit@hcmus

Subtract Operation

Rule:
A – B = A + (-B) = A + (the 2’s complement of B)

Ex: 11101 – 10011 = 11101 + 01101


1
1 1 1 0 1
1
0 0
1 0
1 0 1

1 0 1 0 1 0
40
fit@hcmus

41
fit@hcmus

Relational of integer
and two’s
complement
addition.
When x + y < -2w-1,
there is a negative
overflow
When x + y > 2w-1 - 1,
there is a positive
overflow

Photo by Chap2, Prentice.Hall.Computer.Systems.A.Programmers.Perspective.2nd.2011

42
fit@hcmus

Multiply Operation

Rule: Ex: 1 0 0 0 1
1 1 0

0 1 0 0 0 0 0
0 0 0 1 0 0 0 1
1 0 1 1 0 0 0 1

1 1 0 0 1 1 0

43
fit@hcmus

Multiply Operation

44
fit@hcmus
Multiply Algorithm
• Suppose that Q’s binary pattern has n-bits length, M x Q = 1: adding M

• Variable definition :
C (1 bit): carry bit
A (n bit): a part of the result SHR
([C, A, Q]: product) =0: do nothing
[C, A] (n + 1 bit) ; [C, A, Q] SHR
= 1: adding M
(2n + 1 bit): considered as
compound registers

SHR
= 1: adding M

SHR

45
45
fit@hcmus
Multiply Operation – Two’s Complement Numbers

£ Why’s wrong ?
p Second factor: 1100 ¹ - (23 + 22) (1100 = -22)
£ Solution 1
p Convert 2 factors to positive
p Multiply as unsigned numbers previously
p Adjust sign of result
£ Solution 2
p Booth Algorithm
46
fit@hcmus
Booth Algorithm – Ideas

Positive
2n + 2n-1 + … + 2n-K = 2n+1 – 2n-K
M ´ (01111010) = M ´ (26 + 25 + 24 + 23 + 21)
= M ´ (27 - 23 + 22 - 21)
Negative
X = {111..10xk-1xk-2…x1x0}
-2n-1 + 2n-2 + … + 2k+1 + (xk-1 ´ 2k-1) + … + (x0 ´ 20)=
-2k+1 + (xk-1 ´ 2k-1) + … + (x0 ´ 20)
M ´ (11111010) = M ´ (-27 + 26 + 25 + 24 + 23 + 21)
= M ´ (-23 + 21)
= M ´ (-23 + 22 -21)

47
fit@hcmus

Booth’s Multiplication Algorithm


£ A multiplication algorithm that £ Variable definition :
multiplies two signed binary A (n bit): a part of the result
numbers in 2's complement ([A, Q]: product)
notation Q0 (1 bit): the LSB bit of Q
£ Suppose that Q’s binary pattern [Q,Q-1] (n + 1 bit)
has n-bits length, M x Q
M: multiplicand
Q: multiplier

48
fit@hcmus
Booth’s Multiplication Algorithm
Ex: Suppose that n = 4, M = 7, Q = -3
Initialize: A = 0; k = n; Q-1 = 0
#Add 1-bit Q-1 in the end of Q A Q Q-1 M
While (k > 0) Initialize 0000 1101 0 0111
{
If Q0Q-1 k = 4 A = A-M 1001 1101 0 0111
{
= 10 then A – M -> A SAR 1100 1110 1 0111
= 01 then A + M -> A
= 00, 11 then A -> A k = 3 A = A+M 0011 1110 1 0111
# Ignore any overflow
} SAR 0001 1111 0 0111
SAR[A, Q, Q-1] 1 bit k = 2 A = A-M 1010 1111 0 0111
k = k – 1
} SAR 1101 0111 1 0111
Return [A, Q]
k = 1 SAR 1110 1011 1 0111
49
fit@hcmus
Booth – Algorithmic Basis
£ Bước 0: A = (0 + (Q-1-Q0).M)
£ Bước 1: A = (0 + (Q-1-Q0).M + (Q0-Q1).M.21)
= M.(Q-1-Q0 + Q0.2-Q1.2)
£ Bước 2: A = (M.(Q-1-Q0 + Q0.2-Q1.2) + (Q1-Q2).M.22)
= M.(Q-1-Q0 + Q0.2-Q1.2 + Q1.22-Q2.22)
£ Bước 3:
A = M.(Q-1-Q0 + Q0.2-Q1.2 + Q1.22-Q2.22 + Q2.23-Q3.23)
= M.(Q-1+Q0+Q1.2 + Q2.22-Q3.23)
£ Bước n-1:
A = M.(Q-1+Q0+Q1.2 + Q2.22+Q3.23+…+Qn-2.2n-2-Qn-1.2n-1)
à A = M.Q

50
fit@hcmus
Divide Operation

(Divisor)

(Dividend)

Partial
Remainders (Quotient)

(Remainder)

51
fit@hcmus
Divide Algorithm

52
fit@hcmus
Divide Operation – Two’s Complement Numbers

53
tio n
en t a
re s ?
Rep 5. 5
of -

Only one representation of zero


54
i 2-i
fit@hcmus
Fixed point numbers 0 1.0 1
1 0.5 1/2
2 0.25 1/4
Represent 5.37510 in 2-base system ? 3 0.125 1/8
4 0.0625 1/16
Idea: Represent the integer part and fraction part 5 0.03125 1/32
separately 6 0.015625 ...
Integer part: use 8-bits for representation. Range of values is [0, 255] 7 0.0078125
(decimal) 8 0.00390625
510 = 4 + 1 = 0000 01012 9 0.001953125
Fraction part: use 8-bits for representation. 10 0.0009765625
0.375 = 0.25 + 0.125 = 2-2 + 2-3 = 0110 00002 11 0.00048828125
12 0.000244140625
Signed fixed point Signed bit Integer (8-bits) Fraction (8-bits) 13 0.0001220703125
0 0000 0101 0110 0000 14 0.00006103515625
15 0.000030517578125
Formular:
xn-1 xn-2 ...x0 .x-1 x-2 ...x-m = xn-1.2n-1 + xn-2 .2n-2... + x0 .20 + x-1.2-1 + x-2 .2-2 + ... + x-m 2- m

55
fit@hcmus
Fixed point numbers

£ Suppose that n =8-bits


Largest integer value can be represented: 255
Smallest fraction value can be represented: 2-8 ~ 10-3 = 0.001
£ Problem: limited range of values can be represented, it
does not allow enough numbers and accuracy
£ Solution: Floating point Number

56
fit@hcmus
Floating point number - Ideas
£ Normalized form:
123000000000 ~ 1.23×1011 and 0.0000000000123 ~ 1.23×10-11
£ So apply to the fixed point number:
x = 00000101.01100000 = 22 + 20 + 2-2 + 2-3
x = 1.01011 × 22
£ Then instead of storing 16 bit, it can only be stored by 7 bit (5 bit fraction + 2
bit exponent)
fraction: 01011
exponent: 10
£ It’s the idea basis of floating point number
Need to store: the fraction, the exponent and … the sign

57
fit@hcmus
Floating point number
£ Express in the follow notation: ± F x 2E (with: F: fraction, E: Exponent, radix of 2)
Sign Exponent (biased form) Significand
£ IEEE-754 standard: represent floating point number in form: V = (-1)S × 1.F × 2E
Single precision (32-bits) Sign Exponent (biased) Significand

1 bit 8 bits 23 bits

Double precision (64-bits) Sign Exponent (biased) Significand

1 bit 11 bits 52 bits


• Sign: 1: Negative, 0: Positive
• Exponent: saved in n-bits pattern. Represented in K-excess form with
Single precision: K = 127 (2n-1 - 1 = 28-1 - 1)
Double precision: K = 1023 (2n-1 - 1 = 211-1 - 1)
• Significand (Fraction): the remaining bits after dot sign

58
fit@hcmus
Single-precision Floating Point

Sign Exponent (biased) Significand

1 bit 8 bits 23 bits

£ Value: 5.375
Normalized form: 1.01011 × 22
0 1000 0001 0101 1000 0000 0000 0000 000

£ Vice versa, values:


V = (-1)S × 1.F × 2E

+1.0101100…00×210000001 ~ +(1+2-2 + 2-4 + 2-5) ×22 = 5.375


Ex: Represent X = -5.25 in single precision scheme
fit@hcmus

Step 1: Convert X to binary system


X = -5.2510 = -101.012
Step 2: Normalize X in this form ±1.F * 2E
X = -5.25 = -101.01 = -1.0101 * 22
Step 3: Represent X in floating point
Signed bit = 1 (Negative number)
Exponent= represent E in K-excess form (with K = 127)
->Exponent = E + 127 = 2 + 127 = 12910 = 1000 00012
Significant (Fraction)= 0101 0000 0000 0000 0000 000 (plus 19
times of 0’s)
-> Result: 1 1000 0001 0101 0000 0000 0000 0000 000

60
Ex: Represent -23.40625 in single precision scheme
fit@hcmus

1. Integer part:
23 = 16 + 4 + 2 + 1 = 10111
2. Fraction part:
.40625 = .25 + .125 + .03125 = .01101
3. Combine and normalize:
10111.01101 = 1.011101101 x 24
4. Exponent: 127 + 4 = 10000011
1 1000 0011 011 1011 0100 0000 0000 0000

61
Ex: Represent X = 0.1 in single precision scheme
fit@hcmus

£ 0.1
= 0.0625 + 0.03125 + 0.00390625 + 0.001953125 + …
= 1/16 + 1/32 + 1/256 + 1/512 + …
= 2-4 + 2-5 + 2-8 + 2-9 + …
= 0.0001100110… * 20
= 1.1001100110… * 2-4
p Sign: 0
p Exponent = -4 + 127 = 123 = 01111011
p Significand = 100110011001…
0 0111 1011 1001 1001 1001 1001 1001 100

62
Ex: Single Precision Floating Point to Decimal Value
fit@hcmus

0 0110 1000 101 0101 0100 0011 0100 0010

• Sign: 0 à Positive
• Exponent:
– 0110 1000 có giá trị (dạng biased) là
104 - 127 = -23
• Significand:
1 + 1x2-1+ 0x2-2 + 1x2-3 + 0x2-4 + 1x2-5 +...
=1+2-1+2-3 +2-5 +2-7 +2-9 +2-14 +2-15 +2-17 +2-22
= 1.0 + 0.666115
• Result: 1.666115×2-23 ~ 1.986×10-7
(~ 2/10,000,000) 63
fit@hcmus
Discussion

1. Why is the exponent stored in K-excess form?


2. Why do we choose K=127( in single precision scheme)
instead K=128 (original biased value in 8-bits pattern)
3. How can we represent the zero value in floating point
number?

64
Distribution of Single-precision floating-point numbers
fit@hcmus

Chap9, Computer Organization and Architecture: Design for performance, 8th edition Figure 9.19

65
fit@hcmus
Categories of floating-point values

£ Normalized number
Signed bit 1-255 (single precision) Significand
1-2046 (double precision)

£ Denormalized number
Signed bit all bits set as 0’s Significand

£ Infinity
Signed bit all bits set as 1’s all bits set as 0’s

£ Not a number (NaN)


Signed bit all bits set as 1’s Nonzero

66
fit@hcmus
Not a number (NaN)
1. XX – (+¥) 11.(+¥) + (–¥) 21.…………..
2. + (+¥) 12.(–¥) + (+¥)
3. X + (–¥) 13.(+¥) – (+¥)
4. X – (–¥) 14.(–¥) – (–¥)
5. X × (+¥) 15.¥ × 0
6. X / (–¥) 16.¥ / 0
7. (+¥) + (+¥) 17.X / 0
8. (–¥) + (–¥) 18.0 / 0
9. (–¥) – (+¥) 19.¥ / ¥
10.(+¥) – (–¥) 20.sqrt(X), X<0
67
fit@hcmus
Denormalized number
£ Positive Min of normalized number:
a = 1.0… 2 × 2-126 = 2-126
Gaps!
- +
0 a
Reason: implicitly 1 + fraction part
£ Solution:
p Consider all bits of exponent part are 0 (Significand ¹ 0) as denormalized
form. So the significand will not implicitly plus 1 anymore
p Positive Min of denormalized number:
¡ a = 0.00…12 × 2-126 = 2-23 × 2-126 = 2-149
- +
0 68
fit@hcmus
Nonnegative floating-point numbers

Chap2, Prentice.Hall.Computer.Systems.A.Programmers.Perspective.2nd.2011, Figure 2.35

69
fit@hcmus

Number limits, Overflow and Roundoff


Watch this video:
Number limits, Overflow and roundoff
Take a practice bellow the video

70
fit@hcmus

Store text in binary


Read this document and take a practice

71
fit@hcmus
ASCII representation of character

72
fit@hcmus
Unicode Standard
£ Unicode has 17 planes of 65,536 characters each
p BMP or Plane 0: ranging from U+0000 to U+FFFF
p SMP or Plane 1: from U+10000 to U+1FFFF
£ Planes are subdivided in many character blocks, usually
comprising a script
p Unicode version 14.0 has 320 “blocks”, which is their name for a collection of
symbols. Each block is a multiple of 16 code points (~ characters)
£ UTF (Unicode transformation formats)
p A 16-bit encoding, called UTF-16, is the default.
p A variable-length encoding, called UTF-8, keeps the ASCII subset as eight bits
and uses 16 or 32 bits for the other characters.
p UTF-32 uses 32 bits per character
£ The Vietnamese alphabets are listed in several noncontiguous
Unicode ranges:
p Block “Basic Latin” {U+0000..U+007F}
p Block “Latin-1 Supplement” {U+0080..U+00FF}
p Block “Extended-A”, “Extended-B” {U+0100..U+024F}
p Block “Extended Additional” {U+1E00..U+1EFF}
p Block “Combining Diacritical Marks” {U+0300..U+036F}
73
fit@hcmus
Unicode Standard
£ Glyphs is pictures representing characters
p Characters are what you type, glyphs are what you see
£ One glyph usually corresponds to one Unicode
character. A glyph can also represent more than
one character at once

74
Data Format in C Programs
fit@hcmus

Figure3.1 -
Prentice.Hall.Computer.Systems.A.Programmers.Perspective.2nd.2011

Size of C data type in IA32


75
fit@hcmus
Heterogeneous Data
£ C provides two mechanisms for creating data types by
Combining objects of different types: structures, declared using
the keyword struct
Aggregate multiple objects into a single unit: unions, declared
using the keyword union
£ Read more information in Prentice Hall, 2011, Computer
Systems A Programmers Perspective 2nd, Section 3.9,
page 241

76
fit@hcmus
Data Alignment
£ Alignment restrictions simplify the design of the hardware
forming the interface between the processor and the
memory system
£ The compiler may need to add padding to the end of the
structure so that each element in an array of structures
will satisfy its alignment requirement

77
fit@hcmus

Data Alignment
Ex: consider the following structure declaration
Size of struct S1 without alignment

Size of struct S1 with 4-bytes alignment

78
fit@hcmus

• 04_Floating-point.pdf
• Willian Stalling, Computer Organization and Architecture: Design for
performance, 8th edition, Chapter 9
• Patterson and Hennessy, Computer Organization and Design: The
Hardware / Software Interface, 5th edition, Chapter 3
• Prentice Hall, Computer Systems A Programmers Perspective 2nd,
2011, Chapter 2

79

You might also like