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    2018 April EE203-D - Ktu Qbank

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    Farooq Khanday

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    © All Rights Reserved
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    2018 April EE203-D - Ktu Qbank

    Uploaded by

    Farooq Khanday
    10 views2 pages

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    © © All Rights Reserved

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    Copyright:

    © All Rights Reserved
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    Download as pdf or txt
    10 views2 pages

    2018 April EE203-D - Ktu Qbank

    Uploaded by

    Farooq Khanday

    Copyright:

    © All Rights Reserved
    Download as PDF, TXT or read online from Scribd
    Download as pdf or txt
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    C C3807 Pages: 2

    Reg No.:_______________ Name:__________________________

    APJ ABDUL KALAM TECHNOLOGICAL UNIVERSITY


    THIRD SEMESTER B.TECH DEGREE EXAMINATION, APRIL 2018
    Course Code: EE203
    Course Name: ANALOG ELECTRONIC CIRCUITS (EE)
    Max. Marks: 100 Duration: 3 Hours

    PART A
    Answer all questions, each carries 5 marks Marks

    1 (a) Design a suitable circuit to obtain the output level clipped at +3V and -4V for a (3)
    10V peak to peak sinusoidal input voltage.
    (b) What are the factors affecting stability of operating point of a transistor? (2)
    2 Draw and explain high frequency hybrid pi model of common emitter transistor. (5)
    3 What are the different topologies of feedback amplifiers? (5)
    4 (a) What are the properties of an ideal opamp? (3)
    (b) State Barkhausen criteria for sinusoidal oscillators. (2)
    5 With the help of a circuit diagram show how an opamp is used to get an output (5)
    as Vo= V1+V2-V3-V4, Where V1, V2, V3 andV4 are inputs to opamp.
    6 Design anintegrator that can integrate a square wave of peak to peak voltage 10V (5)
    and frequency 1 kHz and draw the output waveform.
    7 Explain the operation of a square waveform generator using opamp. (5)
    8 Design a Wein bridge oscillator to generate a sinusoidal waveform of 1 kHz. (5)

    PART B
    Answer any two full questions, each carries 10 marks

    9 (a) Design a voltage divider bias circuit for a NPN transistor with hfe = 100 and VBE= (5)
    0.6 V,to operate from a 12 V dc supply. The bias conditions are VCE= 6V,
    VE=1.2V and IC =2 mA.
    (b) Explain any one compensation technique used for reducing the drift of operating (5)
    point.
    10 (a) Draw the h parameter model of a transistor in CE configuration. Also derive the (5)
    expression for input impedance, current gain and voltage gain.
    (b) h-parameters of a transistor connected in CE configuration is hie =1000 Ω,hre= 10 (5)
    ×10-4; hfe= 50; hoe= 100 × 10 – 6Ʊ. If the load resistance RLis 1 KΩ , find:
    i) The input impedance ii) Current gain iii) Voltage gain
    11 (a) Explain the working and characteristics of a N channel MOSFET. (6)
    (b) Draw the frequency response of an amplifier. What is the significance of gain (4)
    bandwidth product?
    PART C
    Answer any two full questions, each carries 10 marks
    12 (a) What is harmonics distortion in power amplifier? Discuss the operation of a class ( 6)

    Page 1 of 2

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    C C3807 Pages: 2

    B power amplifier and derive its maximum power conversion efficiency.


    (b) Explain the working of a two stage RC coupled amplifier with circuit diagram. (4)
    13 (a) Derive the expression for the voltage gain of an opamp based non-inverting (5)
    amplifier.
    (b) Derive the frequency of oscillation of a RC phase shift oscillator using transistor. (5)
    14 (a) Write short notes on the following: (4)
    i) CMRR ii) Slew rate
    (b) Explain the operation of Hartley oscillator with a circuit diagram. (6)

    PART D
    Answer any two full questions, each carries 10 marks

    15 (a) Draw and explain the operation of logarithmic amplifier. (5)


    (b) What is the significance of UTP and LTP in Schmitt trigger circuits? Why is it (5)
    called as regenerative comparator?
    16 (a) What are the features of instrumentation amplifier? Derive the expression for (5)
    output voltage of an instrumentation amplifier.
    (b) Draw and explain the operation of a Triangular waveform generator using (5)
    opamp
    17 (a) With the help of internal circuit diagram of IC555 explain the operation of a (5)
    monostable multivibator.
    (b) Design an astable multivibrator using 555 timer to generate an output signal with (5)
    frequency 5kHz and 50% duty cycle.
    ****

    Page 2 of 2

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