Important Questions Digital

Galgotias College of Engineering and Technology, Greater Noida
Important Questions
Digital Electronics
BEE401
Two marks
1. Differentiate between Synchronous and Asynchronous sequential circuits.
2. If in an edge triggered JK flip flop, J=1, K=1 and Q=1, when the clock pulse goes HIGH, what would
be the next state of Q.
3. Explain Duality Principle.
4. Prove that positive logic AND Gate is equivalent to negative logic OR Gate.
5. Explain 2-input EX-NOR Gate and implement it using minimum number of 2- input NOR Gates.
6. Explain Half adder circuit and implement it using 2-input NAND Gates.
7. Find the resolution of a 10-bit Analog to Digital converter for an input range of 10 V?
8. Define Accuracy of a Digital to Analog converter.
9. Differentiate between Synchronous and Asynchronous sequential circuits.
10. Explain the working of a PISO type shift register briefly.
11. What is Noise Margin?
12. What are the advantages of CMOS logic family?
13. Write down the differences between Combinational and Sequential digital circuits.
14. Write the advantages and disadvantages of TTL and CMOS logic families.
15. Explain fan-in and fan-out in logic families.
Long questions
1. What is Race-Around condition in J-K flip-flop? Explain Master- Slave J-K Flip-Flop.
2. Implement S-R, T, D flip-flops using J-K flip-flop. Also show the implementation with help of State Tables.
3. Explain Propagation delay in logic families. Also explain why TPLH >TPHL .
4. Explain the working of a Bidirectional shift register with the help of a neat and clean diagram.
5. Draw and explain the operation of a TTL NAND gate.
6. Differentiate between RAM and ROM. Explain various types of ROM.
7. Describe the working principle of an R-2R ladder DAC with the help of a neat and clean diagram.
8. Explain the operation of a dual slope ADC with the help of a neat and clean diagram.
9. Design a MOD-12 asynchronous down counter using T flip-flop.
10. Design a synchronous3-bitFSM (which can be used for counting) using D flip-flops with no external inputs
and count sequence as follows:- 0- 1-3-7-4-2-0.
11. Design a 2 bit synchronous UP/DOWN counter
12. Given a sequential logic circuit expression as 𝑋(𝑡 + 1) = 𝑝̅ 𝑋 + 𝑝𝑌 𝑎𝑛𝑑 𝑌(𝑡 + 1) = 𝑝𝑋̅ + 𝑝̅ 𝑌, where
X and Y are the two flip-flop outputs and p is the main external input. Draw the state transition table for the
above- given logic function. Also, draw the state transition diagram associated with it.
13. A sequential circuit has 3 flip-flops A, B and C; one input, x and one output, y. The state diagram is shown in
figure. The circuit is to be designed by treating the unused states as don’t-care conditions. Use D flip-flops in
the design.
14. Construct the following logic gates from NMOS and PMOS logic Families (i) NAND (ii) NOR.
15. Implement a 3-input NOR Gate using CMOS logic families. Also, Explain its working.
16. Implement the given Boolean function with a PLA and PAL.
𝑌1 (𝐴, 𝐵, 𝐶 ) = ∑ 𝑚 (4,5,7) 𝑌2 (𝐴, 𝐵, 𝐶 ) = ∑ 𝑚 (3,5,7)
17. Design a combinational circuit using ROM. The circuit accepts a three bit number equal to the square of the
input number.
18. Explain the working principle behind the weighted resistor DAC.
19. Describe the working principle of a successive approximation ADC.
20. Discuss the operation of a flash type ADC.
21. Consider a 10-bit D/A converter having a reference voltage of 10 V. What is the binary digital input needed
to get 4.5 V output? What outputs are obtained from the converter for the inputs of (i) binary 0010110111
and (ii) decimal 200.
22. Write the design procedure for clocked sequential circuits and implement the following state diagram.
23. Analyze RS flip –flop using NAND-NAND logic and obtain its characteristic equation and excitation table.
Explain how will you convert it in D Flip-flop.
24. Explain PLA and PAL. Implement the given Boolean function with a PLA.
25. How JK flip-flop can be used as T flip-flop, Explain the design procedure.
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Galgotias College of Engineering and Technology, Greater Noida

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