PLC Microcontroller
PLC Microcontroller
PLC Microcontroller
3
A PROGRAMMABLE LOGIC CONTROLLER (PLC)
is an industrial computer control system that
continuously monitors the state of input
devices and makes decisions based upon a
custom program to control the state of
output devices.
Their primary goal of PLC is
To eliminate the high costs associated with
inflexible, relay-controlled systems
4
5
The basic elements of a PLC include input
modules or points, a Central Processing Unit
(CPU), output modules or points, and
a programming device.
The type of input modules or points used by
a PLC depend upon the types of input devices
used. Some input modules or points respond
to digital inputs, also called discrete inputs,
which are either on or off. Other modules or
inputs respond to analog signals.
6
The primary function of a PLC’s input circuitry
is to convert the signals provided by these
various switches and sensors into logic
signals that can be used by the CPU.
The CPU evaluates the status of inputs,
outputs, and other variables as it executes a
stored program.
The CPU then sends signals to update the
status of outputs.
7
The programming device is used to enter or
change the PLC’s program or to monitor or
change stored values.
Once entered, the program and associated
variables are stored in the CPU.
In addition to these basic elements, a PLC
system may also incorporate an operator
interface device of some sort to simplify
monitoring of the machine or process.
8
The difference between a PLC and relay logic
is that a PLC is a programmable device where
as relay logic is a network of hardwired
electrical devices.
Both a PLC and relay logic can perform logical
computation, but a PLC does it using a
microprocessor and relay logic does it using
electric circuits
9
Prior to PLCs, many control tasks were performed by contactors,
control relays and other electromechanical devices. This is often
referred to as hard-wired control.
10
Smaller physical size than hard-wire
solutions.
Easier and faster to make changes.
PLCs have integrated diagnostics and override
functions.
Diagnostics are centrally available.
Applications can be immediately
documented.
Applications can be duplicated faster and less
expensively.
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1. SMALL
it covers units with up to 128 I/O’s and memories
up to 2 Kbytes.
2. MEDIUM
They have up to 2048 I/O’s and memories up to
32 Kbytes.
3. LARGE
They have up to 8192 I/O’s and memories up to
750 Kbytes.
12
There are only 5 languages that are considered to
be standard languages for use on PLCs,
according to IEC section 61131–3.
13
Ladder Diagram is the oldest PLC language.
This graphical programming language was
modeled from relay logic to allow engineers
and electricians to transition smoothly into
programming PLCs.
Within Ladder, rungs and rails represent the
real world electrical connections. Specifically,
the vertical “rails” represent the supply power
of the device while the rungs that are
connected to the rails are equal to the
amount of control circuits.
14
A sequential function chart is a graphical programming language
that mimics a flow chart. You use steps and transitions to get
output.
Steps are functions within the program and house events that are
activated based on state and other specified conditions.
Transitions are instructions based on true/false values that move
you from one step to another.
Branches are used to initiate multiple steps at a time. The
branches act like threads where functions can run concurrently.
All of these steps, transitions, and branches are housed in a
series of scripts that execute in a procedural manner. The visual
nature of the language allows users to monitor processes that
both heavily use conditional logic and run parallel instructions.
PLCs that are prone to suffering from bottlenecks can be more
intuitively maintained and troubleshooted using the chart to
follow the logic of the program.
15
Block based programming languages are a type of
graphical language that minimizes code into blocks,
which allows for a simple way to create executable
commands.
FBD in particular describes a function between inputs
and outputs that are connected by connection lines.
The logic of the inputs and outputs are stored in
blocks. The blocks are programmed onto sheets and
the PLC scans these sheets in order or by specified
connections between blocks, much like procedural
languages.
The I/O focus mirrors that of ladder logic. Yet, the
code that the blocks contain allow engineers to
develop more complex batch control tasks among
other repeatable tasks.
16
This is the PLC’s equivalent to assembly
language. This gives you immediate access to the
machine itself, which allows you to write code
that is compressed and fast. The code is
represented in the manner that the language’s
name suggests: in a list of commands.
Structured Text is a high level language designed
to program PLCs. This is essentially the C++ of
the PLC world. Any PLC that requires complex
data handling will most likely use ST.
17
Structured Text is a high level language
designed to program PLCs. This is essentially
the C++ of the PLC world. Any PLC that
requires complex data handling will most
likely use ST.
18
• Less wiring.
• Wiring between devices and relay contacts are done in
the PLC program.
• Easier and faster to make changes.
• Trouble shooting aids make programming easier and
reduce downtime.
• Reliable components make these likely to operate for
years before failure.
19
AMERICAN 1. Allen Bradley
2. Gould Modicon
3. Texas Instruments
4. General Electric
5. Westinghouse
6. Cutter Hammer
7. Square D
EUROPEAN 1. Siemens
2. Klockner & Mouller
3. Festo
4. Telemechanique
JAPANESE 1. Toshiba
2. Omron
3. Fanuc
4. Mitsubishi
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Manufacturing / Machining
Food / Beverage
Metals
Power
Mining
Petrochemical / Chemical
21
Working of PLC
I M O M
N O U O
P D T D
U U PROCESSOR P U
T L U L
From E T E To
SENSORS OUTPUT
Pushbuttons, Solenoids,
contacts, contactors,
limit switches, alarms
etc. etc.
PROGRAMMING
DEVICE
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Read all field input devices via the input
interfaces, execute the user program stored in
application memory, then, based on whatever
control scheme has been programmed by the
user, turn the field output devices on or off, or
perform whatever control is necessary for the
process application.
PHASE 1
Read Inputs
Scan
PHASE 2
Program
Execution
PHASE 3
Diagnostics/
Comm
PHASE 4
Output
Scan
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Prepared by Alka Kalra
The input sources convert the real-time
analog electric signals to suitable digital
electric signals and these signals are applied
to the PLC through the connector rails.
These input signals are stored in the PLC
external image memory in locations known as
bits. This is done by the CPU
The control logic or the program instructions
are written onto the programming device
through symbols or through mnemonics and
stored in the user memory.
The CPU also keeps a check on the output signals and keeps
updating the contents of the input image memory according to the
changes in the output memory.
APPLICATION
•The application memory is divided into the data table area and
•Data Table user program area.
•The data table stores any data associated with the user’s control
•User Program program, such as system input and output status data, and any
stored constants, variables, or preset values. The data table is
where data is monitored, manipulated, and changed for control
purposes.
•The user program area is where the programmed instructions
entered by the user are stored as an application control program.
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In some modular PLCs bus or rack is provided
in the backplane of the circuit into which all
the modules like CPU and other I/O modules
are plugged to the corresponding slots.
This bus enables the communication between
CPU and I/O modules to send or receive the
data.
This communication is established by
addressing the I/O modules according to the
location from CPU module along the bus.
INPUTS MOTOR
CONTACTOR
LAMP
PUSHBUTTONS
PLC
Manufacturer Network
Allen-Bradley Data Highway
Gould Modicon Modbus
General Electric GE Net Factory LAN
Mitsubishi Melsec-NET
Square D SY/NET
Texas Instruments TIWAY
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Communications Port
RS-232, RS 422 / RS 485,LAN
Software
1. Allen-Bradley – Rockwell Software RSLogix500
2. Modicon - Modsoft
3. Omron - Syswin
4. GE-Fanuc Series 6 – LogicMaster6
5. Square D- PowerLogic
6. Texas Instruments – Simatic
6. Telemecanique – Modicon TSX Micro
1. Power On
2. Run Mode
3. Programming Mode
4. Fault
If the bottle from the conveyor belt is down, only the input
signal from monitoring photocell at the bottle-bottom will be
detected. In this case, X0 = ON, X1 = OFF. The state of output
YO will be ON because the NO contact X0 activates and the NC
contact X1 remains OFF. The pneumatic pushing pole will push
the fallen bottle out of the conveyor belt.
PLC Ladder Practice Problem:
The production line may be powered off accidentally or
turned off for noon break. The program is to control the
counter to retain the counted number and resume counting
after the power is turned ON again. When the daily production
reaches 500, the target completed indicator will be ON to
remind the operator for keeping a record. Press the Clear
button to clear the history records. The counter will start
counting from 0 again.
Latched 16 bit UP counter
Number of PLC Inputs Required
X0 – Product Detecting Sensor. X1 – Production Counter RESET/Clear
Number of PLC Outputs Required
Y0 – Production Counter Target Completed.
Number of PLC Counter Required:
C120 – 16 Bit Latched Counter. (Max Count =32,768)
The latching counter is demanded for the
situation of retaining data when power-off.
When a product is completed, C120 will count
for one time. When the number reaches
500, target completed indicator Y0 will be
ON.
For different series of PLC, the setup range of
16-bit latching counter is different.
Enabling the indicator to be ON immediately
when switch pressed and OFF after a 5 sec
delay by the switch.
Number of PLC Inputs Required
X1 – Start Switch.
Number of PLC Outputs Required
Y1 – Output Indicator
Number of PLC Timer Required
T0 – 5 second Timer, 100 ms Time Base. (See K50 Preset Value for Timer)
CPU
OSC Bus
4 I/O Ports Serial
Control
P0 P2 P1 P3 TXD RXD
Addr/Data
only 1 On chip oscillator (external crystal)
6 interrupt sources (2 external , 3 internal, Reset)
64K external code (program) memory(only
read)PSEN
64K external data memory(can be read and write) by
RD,WR
Code memory is selectable by EA (internal or
external)
We may have External memory as data and code
89XX ROM RAM Timer Int IO pin Other
Source
8951 4k 128 2 6 32 -
8952 8k 256 3 8 32 -
891051 1k 64 1 3 16 AC
892051 2k 128 2 6 16 AC
Wednesday, November 1,
2023
1F
Bank 3
Four Register Banks
18
Each bank has R0-R7
17 Selectable by psw.2,3
Bank 2
10
0F
Bank 1
08
07 R7
06 R6
05 R5
04
03
R4
R3
Bank 0
02 R2
01 R1
00 R0
Four banks of 8 byte-sized registers, R0 to R7
Addresses are :
18 - 1F for bank 3
10 - 17 for bank 2
08 - 0F for bank 1
00 - 07 for bank 0 (default)
Active bank selected by bits [ RS1, RS0 ] in PSW.
Permits fast “context switching” in interrupt service
routines (ISR).
A
R0
DPTR DPH DPL
R1
R2 PC PC
R3
R6
R7
Some 8-bit
Registers of the
8051
It is used as a general register to accumulate the
results of a large number of instructions.
It can hold an 8-bit (1-byte) value and is the most
versatile register the 8051 has due to the shear
number of instructions that make use of the
accumulator.
More than half of the 8051’s 255 instructions
manipulate or use the accumulator in some way.
The "R" registers are a set of eight registers that are named
R0, R1, etc. up to and including R7.
These registers are used as auxiliary registers in many
operations
The "R" registers are also used to temporarily store values.
For example, let’s say you want to add the values in R1
and R2 together and then subtract the values of R3 and R4.
One way to do this would be:
MOV A,R3 ;Move the value of R3 into the accumulator
ADD A,R4 ;Add the value of R4
MOV R5,A ;Store the resulting value temporarily in R5
MOV A,R1 ;Move the value of R1 into the accumulator
ADD A,R2 ;Add the value of R2
SUBB A,R5 ;Subtract the value of R5 (which now contains R3 +
R4)
The "B" register is very similar to the Accumulator in
the sense that it may hold an 8-bit (1-byte) value.
The "B" register is only used by two 8051
instructions: MUL AB and DIV AB. Thus, if you
want to quickly and easily multiply or divide A by
another number, you may store the other number in
"B" and make use of these two instructions.
The Data Pointer (DPTR) is the 8051’s only user-
accessable 16-bit (2-byte) register. The
Accumulator, "R" registers, and "B" register are
all 1-byte values.
DPTR, as the name suggests, is used to point to
data. It is used by a number of commands which
allow the 8051 to access external memory.
DPTR is most often used to point to data in
external memory.
The Program Counter (PC) is a 2-byte
address which tells the 8051 where the
next instruction to execute is found in
memory.
When the 8051 is initialized PC always
starts at 0000h and is incremented each
time an instruction is executed.
It is important to note that PC isn’t always
incremented by one. Since some
instructions require 2 or 3 bytes the PC will
be incremented by 2 or 3 in these cases.
The Stack Pointer, like all registers except DPTR and
PC, may hold an 8-bit (1-byte) value. The Stack
Pointer is used to indicate where the next value to be
removed from the stack should be taken from.
When a value is push onto the stack, the 8051 first
increments the value of SP and then stores the value
at the resulting memory location.
Register Reset Value
PC 0000
ACC 0000
B 0000
PSW 0000
SP 0007
DPTR 0000
Wednesday, November 1,
2023
Although port 3 is configured as an output port upon reset,
this is not the way it is most commonly used.
Port 3 has the additional function of providing signals.
◦ Serial communications signal:RxD, TxD
◦ External interrupt:/INT0, /INT1
◦ Timer/counter:T0, T1
◦ External memory accesses :/WR, /RD
Wednesday, November 1,
2023
Vcc
10 K
P0.0
Port
DS5000 P0.1
P0.2
8751 P0.3
8951 P0.4 0
P0.5
P0.6
P0.7
Read latch Vcc
TB2
Load(L1) 2. output
1. write a 1 to the pin is Vcc
pin 1 P1.X
Internal D
CPU bus QP1.X pin
0 output 1
Write to M1
latch Clk
Q
TB1
Read pin
Read latch Vcc
TB2
Load(L1) 2. output
1. write a 0 to the pin is
pin 0 ground
P1.X
Internal D
CPU bus QP1.X pin
1 output 0
Write to M1
latch Clk
Q
TB1
Read pin
Read latch Vcc 2. MOV A,P1
TB2 external
1. write a 1 to the pin MOV Load(L1) pin=High
P1,#0FFH
1 1 P1.X pin
Internal CPU D
bus Q P1.X
0 M1
Write to latch
Clk
Q
TB1
Read pin
3. Read pin=1 Read
latch=0 Write to
latch=1
Read latch Vcc 2. MOV A,P1
TB2
1. write a 1 to the pin Load(L1) external pin=Low
MOV P1,#0FFH
1 0 P1.X pin
Internal CPU D
bus Q P1.X
0 M1
Write to latch
Clk
Q
TB1
Read pin
3. Read pin=1 Read
latch=0 Write to
latch=1 8051 IC
Vcc
10 K
P0.0
DS5000 P0.1
Port
8751 P0.2
8951 P0.3
P0.4 0
P0.5
P0.6
P0.7
The 8051 microcontroller's memory is
divided into Program Memory and Data
Memory.
Program Memory (ROM) is used for
permanent saving program being executed,
Data Memory (RAM) is used for temporarily
storing and keeping intermediate results and
variables.
Program Memory (ROM) is used for permanent
saving program (CODE) being executed. The
memory is read only.
Depending on the settings made in compiler,
program memory may also used to store
a constant variables. The 8051 executes
programs stored in program memory only.
Code memory type specifier is used to refer to
program memory.
8051 memory organization allows external
program memory to be added.
How does the microcontroller handle external
memory depends on the pin EA logical state.
Up to 256 bytes of internal data memory is
available
Locations available to the user occupy
addressing space from 0 to 7Fh, i.e. first 128
registers and this part of RAM is divided in
several blocks.
The first 128 bytes of internal data memory
are both directly and indirectly addressable.
The upper 128 bytes of data memory (from
0x80 to 0xFF) can be addressed only
indirectly.
Memory Organization
RAM memory space allocation in the 8051
7FH
30H
2FH
Bit-Addressable RAM
20H
1FH Register Bank 3
18H
17H
Register Bank 2
10H
0FH (Stack) Register Bank 1
08H
07H
Register Bank 0
00H
Wednesday, November 1,
2023
Memory block in the range of 20h to 2Fh is
bit-addressable, which means that each bit
being there has its own address from 0 to
7Fh.
Since there are 16 such registers, this block
contains in total of 128 bits with separate
addresses ( Bit 0 of byte 20h has the bit
address 0, and bit 7 of byte 2Fh has the bit
address 7Fh).
Access to external memory is slower than access
to internal data memory.
There may be up to 64K Bytes of external data
memory.
Several 8051 devices provide on-chip XRAM
space that is accessed with the same instructions
as the traditional external data space.
This XRAM space is typically enabled via proper
setting of SFR register and overlaps the external
memory space.
Setting of that register must be manually done in
code, before any access to external memory or
XRAM space is made.
Figure 2-8
Accessing
external
code
memory
Figure
2-11
Interface
to 1K
RAM
SFRs which are also bit addressable
A, B, IP, IE, TCON, SCON, PSW, P0, P1, P2,
P3
Other SFRs
TMOD, THO, TLO, TH1, TL1, SBUF, PCON,
SP, DPTR
DATA registers
CONTROL registers
Timers
Serial ports
Interrupt system
Analog to Digital converter
Digital to Analog converter Addresses 80h – FFh
Etc.
Direct Addressing used to
access SPRs
Name Function Name Function
Immediate
Register
Direct
Register Indirect
Indexed
MOV DPTR, A
MOV Rm, Rn
MOV A,@Ri
MOV @R1,B
MOVC A,@A+DPTR
A= content of address A +DPTR from ROM
Note:
Because the data elements are stored in the program
(code ) space ROM of the 8051, it uses the instruction
MOVC instead of MOV. The “C” means code.
COUNT EGU 30
~
~
mov R4, #COUNT
MOV DPTR,#MYDATA
~
~
0RG 200H
MYDATA:DB “IRAN”
Register Addressing – either source or
destination is one of CPU register
MOV R0,A
MOV A,R7
ADD A,R4
ADD A,R7
MOV DPTR,#25F5H
MOV R5,DPL
MOV R,DPH
Note that MOV R4,R7 is incorrect
Direct Mode – specify data by its 8-bit address
Usually for 30h-7Fh of RAM
Mov a, 70h ; copy contents of RAM at 70h to a
Mov R0,40h ; copy contents of RAM at 70h to a
Mov 56h,a ; put contents of a at 56h to a
Mov 0D0h,a ; put contents of a into PSW
Direct Mode – play with R0-R7 by direct address
MOV A,4 ≡ MOV A,R4
Direct addressing
mov Op code
r3,0E8h Direct
;machine address
code=ABE8
Stack-oriented data transfer
– Only one operand (direct addressing)
– SP is other operand – register indirect - implied
Direct addressing mode must be used in Push and
Pop
Note: can only specify RAM or SFRs (direct mode) to push or pop.
Therefore, to push/pop the accumulator, must use acc, not a
Therefore
Push a ;is invalid
Push r0 ;is invalid
Push r1 ;is invalid
push acc ;is correct
Push psw ;is correct
Push b ;is correct
Push 13h
Push 0
Push 1
Pop 7
Pop 8
Push 0e0h ;acc
Pop 0f0h ;b
Serial communication means transfer data bit by
bit serially at a time, where as in parallel
communication, the number of bits that can be
transferred at a time depends upon the number
of data lines available for communication.
Two methods of serial communication are
Synchronous Communication: Transfer of bulk
data in framed structure at a time
Asynchronous Communication: Transfer of a byte
data in framed structure at a time
8051 has built in UART with RXD (serial data
receive pin) and TXD (serial data transmit pin) on
PORT3.0 and PORT3.1 respectively.
Asynchronous serial communication is widely used for
byte oriented transmission.
Frame structure in Asynchronous communication:
START bit: It is a bit with which serial communication
start and it is always low.
Data bits packet: Data bits can be 5 to 9 bits packet.
Normally we use 8 data bit packet, which is always sent
after START bit.
STOP bit: This is one or two bits. It is sent after data
bits packet to indicate end of frame. Stop bit is always
logic high.
In asynchronous serial communication frame, first
START bit followed by data byte and at last STOP bit,
forms a 10-bit frame. Sometimes last bit is also used
as parity bit.
Data transmission rate is measured in bits per
second (bps). In binary system it is also called
as baud rate (number of signal changes per
second).
Standard baud rates supported are 1200,
2400, 4800, 19200, 38400, 57600, and
115200. Normally most of the time 9600 bps
is used when speed is not a big issue.
SBUF: Serial Buffer Register
This is the serial communication data register
used to transmit or receive data through it.
SCON: Serial Control Register
Serial control register SCON is used to set
serial communication operation modes. Also
it is used to control transmit and receive
operations.
Mode SM0 SM1 Mode
1/12 of Osc frequency shift register mode fixed
0 0 0
baud rate
1 0 1 8-bit UART with timer 1 determined baud rate
2 1 0 9-bit UART with 1/32 of Osc fixed baud rate
3 1 1 9-bit UART with timer 1 determined baud rate
1 = Timer0 start.
0 = Timer0 stop.
It is set and cleared by software.
Bit 3 - IE1: External Interrupt1 Edge Flag
1 = External interrupt1 occurred.
0 = External interrupt1 Processed.
It is set and cleared by hardware.
Bit 2 - IT1: External Interrupt1 Trigger Type Select Bit
1 = Interrupt occur on falling edge at INT1 pin.
0 = Interrupt occur on low level at INT1 pin.
Bit 1 – IE0: External Interrupt0 Edge Flag
1 = External interrupt0 occurred.
0 = External interrupt0 Processed.
It is set and cleared by hardware.
Bit 0 – IT0: External Interrupt0 Trigger Type Select Bit
1 = Interrupt occur on falling edge at INT0 pin.
0 = Interrupt occur on low level at INT0 pin.
Interrupts in 8051 microcontroller are more
desirable to reduce the regular status
checking of the interfaced devices or inbuilt
devices.
Interrupt is an event that temporarily
suspends the main program, passes the
control to a special code section, executes
the event-related function and resumes the
main program flow where it had left off.
Interrupts are of different types like software
and hardware, maskable and non-maskable,
fixed and vector interrupts, and so on.
Interrupt Service Routine (ISR) comes into the
picture when interrupt occurs, and then tells
the processor to take appropriate action for
the interrupt, and after ISR execution, the
controller jumps into the main program.
8051 has 5 sources of interrupts
– Timer 0 overflow(T0)
– Timer 1 overflow(T1)
– External Interrupt 0(INT0)
– External Interrupt 1(INT1)
– Serial Port events(TI/RI)
– The Timer and Serial interrupts are internally
generated by the microcontroller, whereas the external
interrupts are generated by additional interfacing
devices or switches that are externally connected to
the microcontroller. These external interrupts can be
edge triggered or level triggered. When an interrupt
occurs, the microcontroller executes the interrupt
service routine so that memory location corresponds to
the interrupt that enables it. The Interrupt
corresponding to the memory location is given in the
interrupt vector table below.
What if two interrupt sources interrupt at the same time?
The interrupt with the highest PRIORITY gets serviced first.
All interrupts have a default priority order.
Priority can also be set to “high” or “low”.
This register is responsible for enabling and
disabling the interrupt. It is a bit addressable
register in which EA must be set to one for
enabling interrupts. The corresponding bit in
this register enables particular interrupt like
timer, external and serial inputs. In the below
IE register, bit corresponding to 1 activates
the interrupt and 0 disables the interrupt.
This register is responsible for enabling and
disabling the interrupt. It is a bit addressable
register in which EA must be set to one for
enabling interrupts. The corresponding bit in
this register enables particular interrupt like
timer, external and serial inputs. In the below
IE register, bit corresponding to 1 activates
the interrupt and 0 disables the interrupt.
▪ EA : Global enable/disable.
▪ --- : Undefined.
▪ ET2 :Enable Timer 2 interrupt.
▪ ES :Enable Serial port interrupt.
▪ ET1 :Enable Timer 1 interrupt.
▪ EX1 :Enable External 1 interrupt.
▪ ET0 : Enable Timer 0 interrupt.
▪ EX0 : Enable External 0 interrupt.
It is also possible to change the priority levels of
the interrupts by setting or clearing the
corresponding bit in the Interrupt priority (IP)
register as shown in the figure.
This allows the low priority interrupt to interrupt
the high-priority interrupt, but prohibits the
interruption by another low-priority interrupt.
Similarly, the high-priority interrupt cannot be
interrupted.
If these interrupt priorities are not programmed,
the microcontroller executes in predefined
manner and its order is INT0, TF0, INT1, TF1, and
SI.
Operation:MOV
Function:Move memory
Syntax:MOV operand1,operand2
Description: MOV copies the value
of operand2 into operand1. The value
of operand2 is not affected.
Both operand1 and operand2 must be in Internal
RAM.
No flags are affected unless the instruction is
moving the value of a bit into the carry bit in
which case the carry bit is affected or unless the
instruction is moving a value into the PSW register
(which contains all the program flags).
No flags are affected unless the instruction is
moving the value of a bit into the carry bit in
which case the carry bit is affected or unless
the instruction is moving a value into the PSW
register (which contains all the program
flags).
MOV @R0,#data
MOV @R0,A
MOV A,#data
MOV A,@R1
MOV A,R0
two way data transfer
XCH a, 30h ; a 🡨 🡨 M[30]
XCH a, R0 ; a 🡨 🡨 R0
XCH a, @R0 ; a 🡨 🡨 M[R0]
XCHD a, R0 ; exchange “digit”
mov C, 67h
mov C, 2ch.7
SFRs with addresses
ending in 0 or 8
are bit-
addressable.
(80, 88, 90, 98, etc)
Main: ...
acall sublabel
...
...
sublabel: ... the subroutine
...
ret
square: push b
mov b,a
mul ab
pop b
ret
When using subroutines, the stack will be used to store the PC, so it is
very important to initialize the stack pointer. Location 2Fh is often
used.
C = 1
AC = 1
OV = 0
0111 1111 (positive 127)
2’s complement:
0111 0011 (positive 115)
0000 0000 00 0
1111 0010 (overflow
…
cannot represent 242 in 8
0111 1111 7F 127 bits 2’s complement)
1000 0000 80 -128
… 1000 1111 (negative 113)
1111 1111 FF -1 1101 0011 (negative 45)
0110 0010 (overflow)
Example:
SUBB A, #0x4F ;A 🡨 A – 4F – C
Notice that
There is no subtraction WITHOUT borrow.
Therefore, if a subtraction without borrow is desired,
it is necessary to clear the C flag.
Example:
Clr c
SUBB A, #0x4F ;A 🡨 A – 4F
INC A increment A
INC byte increment byte in memory
INC DPTR increment data pointer
DEC A decrement accumulator
DEC byte decrement byte
mov a, r2
add a, #1 ; use add rather than increment to affect C
mov r2, a
mov a, r3
addc a, #0 ; add C to most significant byte
mov r3, a
When multiplying two 8-bit numbers, the size of the
maximum product is 16-bits
FF x FF = FE01
(255 x 255 = 65025)
MUL AB ; BA 🡨 A *
B
Note : B gets the High byte
A gets the Low byte
Integer Division
DIV AB ; divide A by B
A 🡨 Quotient(A/B)
B 🡨 Remainder(A/B)
Example:
mov a, #23h
mov b, #29h
add a, b ; a 🡨 23h + 29h = 4Ch (wanted 52)
DA a ; a 🡨 a + 6 = 52
❑ Bitwise logic operations
❖ (AND, OR, XOR, NOT)
❑ Clear
❑ Rotate
❑ Swap
byte, a
direct
byte, #constant
CPL – Complement
a ex: cpl a
Force individual bits low, without affecting other
bits.
anl PSW, #0xE7 ;PSW AND 11100111
RR a
Mov a,#0xF0 ; a🡨 11110000
RR a ; a🡨 01111000
C
RRC a
mov a, #0A9h ; a 🡨 A9
add a, #14h ; a 🡨 BD (10111101), C🡨 0
rrc a ; a 🡨 01011110, C🡨 1
RLC a
C
ANL C, bit
ORL C, bit
CLR C
CLR bit
CPL C
CPL bit
SETB C
SETB bit
Conditional jumps
org 8000h
Start: mov C, p1.6
mov p3.7, C
ljmp Start
end
loop: mov a, P1
jz loop ; if a=0, goto loop,
; else goto next instruction
mov b, a
jz led_off
Setb P1.6
sjmp skipover
led_off: clr P1.6
mov A, P0
skipover:
Mnemonic Description
CJNE A, #data <rel addr> Compare A and data, jump
if not equal
CJNE Rn, #data <rel addr> Compare Rn and data,
jump if not equal
CJNE @Rn, #data <rel addr> Compare Rn and memory,
jump if not equal
DJNZ Rn, <rel addr> Decrement Rn and then
jump if not zero
ret ; PC 🡨 stack
Assembly language programming
Assembly language programming
Data Transfer operations
Input/Output operations
The assembly language is a fully hardware
related programming language.
The embedded designers must have
sufficient knowledge on hardware of
particular processor or controllers before
writing the program.
The assembly language is developed by
mnemonics; therefore, users cannot
understand it easily to modify the program.
The assembly code must be written in upper
case letters
The labels must be followed by a colon
(label:)
All symbols and labels must begin with a
letter
All comments are typed in lower case
The last line of the program must be the END
directive
The assembling directives give the directions
to the CPU. The
8051 microcontroller consists of various
kinds of assembly directives to give the
direction to the control unit. The most useful
directives are 8051 programming, such as:
ORG
DB
EQU
END
ORG(origin): This directive indicates the start of the
program. This is used to set the register address during
assembly. For example; ORG 0000h tells the compiler all
subsequent code starting at address 0000h.
Syntax: ORG 0000h
DB(define byte): The define byte is used to allow a string
of bytes. For example, print the “EDGEFX” wherein each
character is taken by the address and finally prints the
“string” by the DB directly with double quotes.
Syntax:
ORG 0000h
MOV a, #00h
————-
DB”EDGEFX”
EQU (equivalent): The equivalent directive is used to
equate address of the variable.
Syntax:
reg equ,09h
—————–
—————–
MOV reg,#2h
END:The END directive is used to indicate the end of the
program.
Syntax:
reg equ,09h
—————–
—————–
MOV reg,#2h
END
An Assembly language program consists of,
among other things, a series of lines of
Assembly language instructions.
An Assembly language instruction consists
of a mnemonic, optionally followed by one or
two operands.
The operands are the data items being
manipulated, and the mnemonics are the
commands to the CPU, telling it what to do
with those items.
MOV destination, source. Data movement in the internal RAM. This type of
instructions supported by virtually all addresses, direct, indirect, recording and
immediate.
MOV A,P0 ; Mueve el contenido del puerto 0 al acumulador
MOV R1,A ; Mueve el contenido del Acumulador al registro 1
MOVX. Data movement in the external RAM (XRAM). This type of motion only
supports indirect addressing, register 8bit by R0 or R1 and 16-bit register via the
DPTR.
MOV DPTR,#2000H ; Mover al registro apuntador DPTR el dato inmediato 2000H
(dirección)
MOVX A,@DPTR ; Mover el contenido de la memoria que apunta el DPTR (2000H)
al Acumulador
MOVC. Allows movement of the accumulator ROM. By this statement can make the
manipulation or movement of tables from the program memory.
XCH. Swaps the contents of the accumulator and the internal RAM.
XCHD. Swaps the contents of the first 4 bits of the Accumulator with internal RAM.
PUSH and POP. To transfer data to the stack.
Computers transfer data in two ways: parallel and serial.
In parallel data transfers, often 8 or more lines (wire conductors)
are used to transfer data to a device that is only a few feet away.
Examples of parallel transfers are printers and hard disks; each
uses cables with many wire strips. Although in such cases a lot
of data can be transferred in a short amount of time by using
many wires in parallel, the distance cannot be great.
To transfer to a device located many meters away, the serial
method is used. In serial communication, the data is sent one bit
at a time, in contrast to parallel communication, in which the
data is sent a byte or more at a time.
Serial communication of the 8051 is the topic of this chapter.
The 8051 has serial communication capability built into it,
thereby making possible fast data transfer using only a few
wires.
When a microprocessor communicates with the
outside world, it provides the data in byte-sized
chunks. In some cases, such as printers, the
information is simply grabbed from the 8-bit data
bus and presented to the 8-bit data bus of the
printer.
This can work only if the cable is not too long, since
long cables diminish and even distort signals.
Furthermore, an 8-bit data path is expensive.
For these reasons, serial communication is used for
transferring data between two systems located at
distances of hundreds of feet to millions of miles
apart. Figure 10-1 diagrams serial versus parallel
data transfers.
The fact that serial communication uses a single data line instead of
the 8-bit data line of parallel communication not only makes it much
cheaper but also enables two computers located in two different cities
to communicate over the telephone
.For serial data communication to work, the byte of data must be
converted to serial bits using a parallel-in-serial-out shift register;
then it can be transmitted over a single data line. This also means
that at the receiving end there must be a serial-in-parallel-out shift
register to receive the serial data and pack them into a byte.
Serial data communication uses two methods,
asynchronous and synchronous.
The synchronous method transfers a block of
data (characters) at a time, while
the asynchronous method transfers a single
byte at a time. It is possible to write software
to use either of these methods, but the
programs can be tedious and long. For this
reason, there are special 1C chips made by
many manufacturers for serial data
communications
. These chips are commonly referred to as UART (universal
asynchronous receiver-transmitter) and USART (universal
synchronous-asynchronous receiver-transmitter).
Data transfer instructions are responsible for
transferring data between various memory storing
elements like registers, RAM, and ROM. The
execution time of these instructions varies based on
how complex an operation they have to perform.
In the table given in next slides, we have listed all
the data transfer instruction. In the table [A]=
Accumulator; [Rn]=Register in RAM; DPTR=Data
Pointer; PC=Program Counter
Lets take all these Data Transfer instructions one by
one.
1) MOV Instruction-The MOV instruction has two
operands, the source, and the destination. The second
operand is the source, whereas the first one is the
destination. This instruction uses various addressing
modes to move data in the RAM space of the
microcontroller.
• Examples-MOV A, R0 //Moves data from the register
R0 to the accumulator
• MOV R0,50H //Moves data stored in memory location
50H to Ro
• MOV A,@R0 //Uses data stored in R0 register as an
address and moves the data at that location to the
accumulator
OPCODE OPERAND DESCRIPTION