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Design and implementation of general purpose opamp using multipath

frequency compensation

Article · June 2011

DOI: 10.1109/NEWCAS.2011.5981266

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 Design and implementation of general purpose
opamp using multipath frequency compensation
Pawel Fiedorow∗ , Philippe Maige∗ , Daniel Subiela∗ , Thierry Tixier† and Nacer Abouchi†
∗ STMicroelectronics- Grenoble, France
Email: pawel.fiedorow@cpe.fr, philippe.maige@st.com, daniel.subiela@st.com
† University of Lyon - Lyon Institute of Nanotechnology (INL) - CPE Lyon, France

Email: thierry.tixier@cpe.fr, nacer.abouchi@cpe.fr

Abstract—This paper shows the multipath frequency compen- of nowadays compensation structure and their limitations.
sation in a general purpose operational amplifier. Firstly, it deals The third part describes the characteristics of the different
with the requirements of a general purpose opamp and introduces multipath compensation and the aim of these compensations.
the need of the frequency compensation in the current circuits.
Then, the rules to integrate multipath in an opamp are developed In the fourth part, the design of a full general purpose
and the transfer function is presented and compared to the one opamp is proposed. The different blocks of the opamp are
of the nested miller compensation. Next, an implementation of analyzed. Finally, the same part illustrates the great effect of
the multipath nested miller compensation is described. Finally, the multipath add-on.
simulation result which proves the efficiency of this compensation
is given. The multipath compensation improves the classical II. D ESIGN OF THE GENERAL PURPOSE AMPLIFIER
compensation structure as it does not cutoff the initial unity
gain frequency by four but only by two. A. Requirements
I. I NTRODUCTION The main difficulty of the general purpose opamp design is
the incertitude of the environment in which the opamp will
The shrinking of the digital circuit to integrate more and
be used. The specification are as large as possible. However
more functions on a cell is also impacting the development
analog design is a trade-off history. Some common properties
of analog parts. In this way, the general purpose operational
are defining the general purpose area : rail to rail input and/or
amplifier (opamp) has to deal with the reduction of supply
output, high factor of merit, class AB output stage, unity gain
voltage and current consumption on one side and with the
stability. With this aim, the following part presents the main
increase of functionalities like class AB output stage on the
step of one circuit design. As the voltage supply are lowering,
other side. The general purpose opamp is characterized by
schematics have a trend to be more horizontal than vertical.
rail to rail input and output stages with a gain bandwidth
It means that transistors are no more stacked but they are
product of hundreds of kilohertz and supply voltages around
cascaded. Thus, for readability and understanding the circuit
several volts. The load capacitance and power consumption
is analyzed in three functional parts.
is the discriminant between the constructors. In this context,
the design of general purpose opamp is leaded by the power B. Block analysis
consumption and the obtainable gain bandwidth product for a
The first block illustrated on figure 1 represents the input
defined load capacitance.
stage. The transistors M3-M4 and M8-M9 are the PMOS and
The reduced supply voltage range has leaded to the multi-
plication of the gain stages [1]. Besides, each gain stage has
6/5 6/5
Vbiasdiff
an high output impedance node. Consequently, as each high M5
10/8
M10
Vbiascasc1
M11

impedance node produces a pole, the more gain stages are M0 M3 M4

needed to achieve high low-frequency gain the more poles 5/10 40/1

M12
50/1 50/1
M13
Vbiascasc2
are introduced. Beyond two poles, the phase rolls over one M2
10/1
X
IN+
hundred eighty degrees and the structure is stable if the poles
are separated and one of them is at a higher frequency than IN- M14
Vbiascasc3
M15
50/1 50/1
the unity gain frequency. This separation is done with the M8 M9
40/2
frequency compensation [1]. Numerous articles [2] deal with
Vbiasn
the studies of frequency compensation method in the field of M1
6/10
M6
1/10
M7
1/10
M16 3/5 3/5
M17

dedicated opamp. In [1], [3], [4] is presented the multipath

technique for opamp applications. However, none of these Fig. 1. MNMC - Block 1
articles describe the implementation of the multipath technique
into a general purpose opamp. NMOS input differential pairs respectively. They are biased
In the second part, this article tries to give an overview of with the PMOS M5 and the NMOS M7. While the common
the frequency compensation in opamp through the explanation mode voltage is increasing, the transition between the PMOS
pair and the NMOS pair is assured by the transistors M0-M1- around 1.4 V in a typical case. If we consider the process and
M2-M6. The threshold is fixed through M0 biased by M1. temperature variation from −40◦ to 125◦ , this value increases
In this way, all the common mode swings from the upper to to 2.2 V. Thus, this stage is quite often the one which limits
the lower rail. The folded-cascode current mirror M10-M17 the upper supply rail for low voltage application.
acts as a level shifter and allows the connection to the second The active devices of the frequency compensation have been
block. It subtracts the differential output currents of the input presented on figure 2. Figure 4 shows the capacitor network
stage and brings the result out at a single terminal. related to the NMC. The circuit needs five of them. As the
This last terminal is connected to the gate of the common
Y1 Yb1
source NMOS M28. With the modified folded-cascode M29-
Cc1p Cc1bp
M38, they form the second gain stage described on figure 2. X OUT
In fact, the multipath stage is also presented on figure 2. The Cc2 Cc1n Cc1bn

Y2 Yb2
25/1 25/1
Vbiasdiff M22 M29 M30
43/8

160/1 Yb1 Fig. 4. MNMC - Capacitors network

M18 M23 M24
5/10
Vpolcp
M31 M32
30/1 30/1
M20
10/1 Vdp
second gain stage is made of one common source transistor,
IN+ M33
X
M28
35/1
Y1
M39
Vbiasn the outer capacitor Cc2 is implemented in the same way on
Vdn 1.3/10
IN-
1/5
M34
35/1 Y2 the two figures. Moreover the capacitor Cc1 is split into two
M35 10/1
Vpolcn
10/1
M36 groups of two capacitors. The first division is used to satisfy
M25 M26
160/2 Yb2
the symmetry between the N side and the P side on the output
M19
Vbiasn
M21 M27 M37
8/1 8/1
M38
transistors. On each side, the capacitor is divided again in a
1/10

ratio (Cc1bx = {2/3}, Cc1x = {1/3}). A theoretical study

6/10 1.3/10

Fig. 2. MNMC - Block 2 not developed in this paper has led to these ratios. This type
of splitting allows the use of the buffer effect of the cascode
same input stage as in figure 1 is made with M18 - M27. transistor M32 and M36 on the P side and on the N side
Thus, the multipath block behaves like the input pair of the respectively. It enhances the phase margin in a range of 10◦
main chain. We call back that the gain-bandwidth product of and has no design coast.
the main chain and the one of the multipath have to be equal. C. Results
In the second block, the biasing of the folded-cascode current
The design of the opamp has been done with the constraint
mirror is made with a floating current source. It is linked to the
of using less than 40 µA while having a gain bandwidth
architecture of the class AB output stage. Consequently, Y1
product greater than 500 kHz for a load of 100 pF and 10 kΩ.
and Y2 are the driver of output PMOS and NMOS respectively.
Finally, the opamp uses 35 µA and has a gain bandwidth
The output stage [5] is a standard in the field of class
product of 708 kHz.
AB drivers. It uses the properties of MOS translinear loop.
The complementary output devices M48 - M49 change their III. C ONCLUSION
conduction in response to the complementary common-gate This article has developed the constraints of integrating
level shifters M44 - M43. In a standard process, the main a multipath frequency compensation network in a general
purpose opamp. Furthermore, the result proves the benefit and
M40 Vbiasp M46
the good performances in terms of gain bandwidth product
8/1 1.6/4
and current consumption.
Y1
M48
1000/2
R EFERENCES
Vdp 12/1 OUT
M42 M43 M44 M45
6/1 37/1 Vdn 3/1 [1] R. Eschauzier and J. Huijsing, Frequency Compensation Techniques for
Y2
Low-Power Operational Amplifiers, ser. The Springer International Series
M49
350/2
in Engineering and Computer Science. Springer, 1995.
[2] P. Fiedorow, D. Subiela, N. Abouchi, and T. Tixier, “Nmc vs. rnmc : An
M41 Vbiasn M47 experimental study of the two main compensation networks,” in NEWCAS
1.4/10 4/1
Conference, 2010 8th IEEE International, 2010, pp. 285 –288.
[3] A. D. Grasso, G. Palumbo, and S. Pennisi, “Analytical comparison of fre-
Fig. 3. MNMC - Block 3 quency compensation techniques in three-stage amplifiers,” International
Journal of circuit theory and applications, vol. 36, pp. 53 – 80, 2008.
[4] R. Eschauzier, L. Kerklaan, and J. Huijsing, “A 100MHz 100dB oper-
drawback of this structure is the minimum supply voltage. ational amplifier with multipath nested miller compensation structure,”
The circuit needs at least Vssmin = Vgs45 + Vgs47 + Vds46 Solid-State Circuits, IEEE Journal of, vol. 27, no. 12, pp. 1709–1717,
Dec 1992.
to be correctly biased. A standard value of the threshold [5] D. Monticelli, “A quad cmos single-supply op amp with rail-to-rail output
voltage in MOS transistor is around 0.7 V and the drain-source swing,” Solid-State Circuits, IEEE Journal of, vol. 21, no. 6, pp. 1026–
saturation voltage is approximatively 200 mV. Even if M47 1034, Dec 1986.
and M45 should be in weak inversion, it means that Vssmin is

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