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SUMMER – 2024 EXAMINATION
Model Answer – Only for the Use of RAC Assessors
4) It has multiplexed address and data bus AD0-AD15 and A16 –A19.
5) It can prefetches up to 6 instruction bytes from memory and queues them in order to
speed up instruction execution.
6) Interrupts:-8086 has 256 vectored interrupts.
7) Provides separate instructions for string manipulation.
8) Operating clock frequencies 5MHz, 8MHz, 10MHz.
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10) A 40 pin dual in line package.
b) List any two addressing modes of 8086 with example. 2M
Ans Assembler: The assembler is used to convert assembly language written by a user or a 2 M for
program into a machine recognizable format explanation
Ans Macro: A MACRO is group of small instructions that usually performs one task. It is a 1 M for
definition
Reusable section of a software program. A macro can be defined anywhere in a program
1 M for
Using directive MACRO &ENDM. Syntax
Syntax: MACRO-name
-----2
ENDM
Ans The Following Figure is a model for the 8086. In general, each register has a special 2 M for
function correct
explanation
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4 Segment registers
2 Pointer registers
2 Index registers
1 Flag register
Adjusted to be a legal BCD number. The result of the addition must be in AL for DAA to
work correctly. If the lower nibble in AL after an addition is greater than 9 or AF was set
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by the addition, then the DAA instruction will add 6 to the lower nibble in AL. If the
result in the upper nibble of AL in now greater than 9 or if the carry flag was set by the
addition or correction, then the DAA instruction will add 60H to AL.
DAA AL = 94 BCD, CF = 0
a) Differentiate between Near and FAR procedure call (any four points). 4M
Ans 01 M for
each point
b) Draw Flag register format of 8086 microprocessor and explain any two 4M
flags.
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Ans Diagram -
2 M,
Explanation-
2M
C-Carry Flag : It is set when carry/borrow is generated out of MSB of result. (i.e D7 bit
for 8- bit operation, D15 bit for a 16 bit operation).
P-Parity Flag This flag is set to 1 if the result contains even number of 1’s otherwise it is
reset.
AC-Auxiliary Carry Flag This is set if a carry is generated out of the lower nibble, (i.e.
From D3 to D4 bit)to the higher nibble
Z-Zero Flag This flag is set if the result is zero after performing ALU operations.
Otherwise it is reset.
S-Sign Flag This flag is set if the MSB of the result is equal to 1 after performing ALU
operation, otherwise it is reset.
O-Overflow Flag This flag is set if an overflow occurs, i.e. if the result of a signed
operation is large enough to be accommodated in destination register.
Control Flags T-Trap Flag If this flag is set, the processor enters the single step execution
mode
Ans DB (Defined Byte) – The DB directive is used to declare a BYTE -2-BYTE variable. A 2 M each
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BYTE is made up of 8 bits.
Declaration example:
Byte1 DB 10H
Byte2 DB FFH
SEGMENT - The SEGMENT directive is used to indicate the start of a logical segment.
Preceding the SEGMENT directive is the name you want to give the segment.
Declaration example: The statement CODE SEGMENT indicates to the assembler the
start of a logical segment called CODE. The SEGMENT and ENDS directive are used to
“bracket” a logical segment containing code or data
DUP (Duplicate) - This directive can be used to generate multiple bytes or words with
known as well as un-initialized values.
eg TABLE DW 100 DUP(0) ; Create array of 100 words all contains data 0
EQU (EQUATE) - EQU is used to give a name to some value or symbol. Each time the
assembler finds the given name in the program, it replaces the name with the value or
symbol you equated with that name.
Declaration example:
Data SEGMENT
Data ENDS
Numeric value 50H and 66H are assigned to Num1 and Num2
ASSUME: Assume directive is used to tell Assembler the name of the logical segment it
should use for the specified segment.
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Example:-Assume CS: CODE, DS: DATA
END (End of Program) - The END directive marks the end of an ALP. The statement
after the directive END will be ignored by the assembler.
Ans • In 8086, pipelining is the technique of overlapping instruction fetch and execution 02 M for
mechanism. diagram
• To speed up program execution, the BIU fetches as many as six instruction bytes
ahead of time from memory. The size of instruction prefetching queue in 8086 is 6 02 M for
bytes. explanation
• While executing one instruction other instruction can be fetched. Thus it avoids
the waiting time for execution unit to receive other instruction.
• BIU stores the fetched instructions in a 6 level deep FIFO . The BIU can be
fetching instructions bytes while the EU is decoding an instruction or executing an
instruction which does not require use of the buses.
• When the EU is ready for its next instruction, it simply reads the instruction from
the queue in the BIU.
• This is much faster than sending out an address to the system memory and waiting
for memory to send back the next instruction byte or bytes.
• This improves overall speed of the processor.
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c) Write an ALP for 8086 to find largest number from an array of 10 numbers. 4M
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Ans 04 M for
correct
diagram
Z =(A + B) * (C + D)
Ans 1)Recursive procedure: A recursive procedure is procedure which calls itself. This 02 M for
results in the procedure call to be generated from within the procedures again and again. each
The recursive procedures keep on executing until the termination condition is reached. procedure
The recursive procedures are very effective to use and to implement but they take a large
amount of stack space and the linking of the procedure within the procedure takes more
time as well as puts extra load on the processor.
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a) Write the physical address generation process in 8086. Calculate the physical 6M
address for given -
Ans Formation of a physical address: - Segment registers carry 16-bit data, which is also Physical
known as base address. BIU attaches 0 as LSB of the base address. So now this address address
becomes 20- bit address. Any base/pointer or index register carry 16 bits offset. Offset generation
address is added into 20-bit base address which finally forms 20-bit physical address of 04M
memory location.
Each
example 01
M
Given
4. Writing a program
Ans 1. MOV AX, 100H moves the value 100H into the AX register. Each Sub
question –
ADD AX, 100H adds the value 100H to the contents of the AX register. 2M
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After executing these instructions, the AX register will contain the result of the
addition.
2. MOV CL, 2 moves the value 2 into the CL register, specifying that we want to
rotate the contents of AX by 2 bits.
ROL AX, CL rotates the contents of the AX register leftwards by the number of
bits specified in CL.
After executing these instructions, the contents of the AX register will be rotated
leftwards by 2 bits.
3. MOV BL, divisor ; Load the divisor value into the BL register.
MOV CL, 05 Η
SHL BX, CL
Ans Let's break down the instructions and determine the content of register BX after executing Each Sub
them: question -
2M
1. `MOV BX, 2050H`: This instruction moves the value 2050H (which is 0000 0010 0000
0100 in binary) into the BX register.
2. `MOV CL, 05H`: This instruction moves the value 05H (which is 0000 0101 in binary)
into the CL register.
3. `SHL BX, CL`: This instruction shifts the contents of the BX register to the left by the
number of bits specified in the CL register. In this case, CL contains 5, so the contents of
BX will be shifted left by 5 bits.
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- The rightmost 16 - 5 = 11 bits will be filled with zeros.
So, after executing these instructions, the content of register BX will be: 0000 0000 0000
0000, which is equivalent to 0H in hexadecimal.
Ans Three branching instructions commonly used in assembly language programming for the Each
8086 microprocessors, along with their purposes and examples: instruction-
2M
1. **JMP (Jump)**:
- Purpose: JMP allows unconditional branching to a specified memory address.
- Example:
JMP target_label
...
target_label:
; Instructions to execute after the jump.
- Explanation: This instruction unconditionally transfers control to the memory
location specified by the target label. It's commonly used for implementing loops,
switching between different sections of code, or implementing unconditional jumps in the
program flow.
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3. **JG (Jump if Greater)**:
- Purpose: JG jumps to a specified memory address if the Sign Flag (SF) is equal to the
Overflow Flag (OF) and the Zero Flag (ZF) is not set.
- Example:
CMP AX, BX ; Compare AX and BX
JG greater_label ; Jump if AX > BX
- Explanation: If AX is greater than BX, the Jump if Greater (JG) instruction will jump
to the specified label. This instruction is typically used in conditional statements to
implement branching based on comparison results.
These instructions are fundamental for controlling program flow in assembly language
programming on the 8086 microprocessors, allowing for conditional and unconditional
branching based on specific conditions or requirements.
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