NA556, NE556, SA556, SE556

DUAL PRECISION TIMERS

www.ti.com SLFS023G – APRIL 1978 – REVISED JUNE 2006

FEATURES NA556...D OR N PACKAGE

• Two Precision Timing Circuits Per Package NE556...D, N, OR NS PACKAGE
SA556...D OR N PACKAGE
• Astable or Monostable Operation SE556...J PACKAGE
• TTL-Compatible Output Can Sink or Source (TOP VIEW)
up to 150 mA
• Active Pullup or Pulldown 1DISCH 1 14 VCC
• Designed to Be Interchangeable With 1THRES 2 13 2DISCH
Signetics NE556, SA556, and SE556 1CONT 3 12 2THRES
1RESET 4 11 2CONT
APPLICATIONS 1OUT 5 10 2RESET
1TRIG 2OUT
• Precision Timers From Microseconds to 6 9
Hours GND 7 8 2TRIG
• Pulse-Shaping Circuits
• Missing-Pulse Detectors
• Tone-Burst Generators
• Pulse-Width Modulators
• Pulse-Position Modulators
• Sequential Timers
• Pulse Generators
• Frequency Dividers
• Application Timers
• Industrial Controls
• Touch-Tone Encoders

DESCRIPTION/ORDERING INFORMATION
These devices provide two independent timing circuits of the NA555, NE555, SA555, or SE555 type in each
package. These circuits can be operated in the astable or the monostable mode with external resistor-capacitor
(RC) timing control. The basic timing provided by the RC time constant can be controlled actively by modulating
the bias of the control-voltage input.
The threshold (THRES) and trigger (TRIG) levels normally are two-thirds and one-third, respectively, of VCC.
These levels can be altered by using the control voltage (CONT) terminal. When the trigger input falls below
trigger level, the flip-flop is set and the output goes high. If the trigger input is above the trigger level and the
threshold input is above the threshold level, the flip-flop is reset, and the output is low. The reset (RESET) input
can override all other inputs and can be used to initiate a new timing cycle. When RESET goes low, the flip-flop
is reset and the output goes low. When the output is low, a low-impedance path is provided between the
discharge (DISCH) terminal and ground (GND).

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

PRODUCTION DATA information is current as of publication date. Copyright © 1978–2006, Texas Instruments Incorporated
Products conform to specifications per the terms of the Texas On products compliant to MIL-PRF-38535, all parameters are
Instruments standard warranty. Production processing does not tested unless otherwise noted. On all other products, production
necessarily include testing of all parameters. processing does not necessarily include testing of all parameters.
NA556, NE556, SA556, SE556
DUAL PRECISION TIMERS www.ti.com
SLFS023G – APRIL 1978 – REVISED JUNE 2006

ORDERING INFORMATION
VT (MAX)
TA PACKAGE (1) ORDERABLE PART NUMBER TOP-SIDE MARKING
VCC = 15 V
PDIP – N Tube of 25 NE556N NE556N
Tube of 50 NE556D
0°C to 70°C 11.2 V SOIC – D NE556
Reel of 2500 NE556DR
SOP – NS Reel of 2000 NE556NSR NE556
–40°C to 85°C 11.2 V PDIP – N Tube of 25 SA556N SA556N
PDIP – N Tube of 25 NA556N NA556N
–40°C to 105°C 11.2 V Tube of 50 NA556D
SOIC – D NA556
Reel of 2500 NA556DR
SE556J SE556J
–55°C to 125°C 10.6 V CDIP – J Tube of 25
SE556JB SE556JB

(1) Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at
www.ti.com/sc/package.

FUNCTION TABLE
(each timer)
TRIGGER THRESHOLD DISCHARGE
RESET OUTPUT
VOLTAGE (1) VOLTAGE (1) SWITCH
Low Irrelevant Irrelevant Low On
High <1/3 VDD Irrelevant High Off
High >1/3 VDD >2/3 VDD Low On
High >1/3 VDD <2/3 VDD As previously established

(1) Voltage levels shown are nominal.

FUNCTIONAL BLOCK DIAGRAM, EACH TIMER

VCC RESET

THRES
OUT
CONT

TRIG

DISCH

GND
RESET can override TRIG, which can override THRES.

2 Submit Documentation Feedback

 NA556, NE556, SA556, SE556
www.ti.com
DUAL PRECISION TIMERS
SLFS023G – APRIL 1978 – REVISED JUNE 2006
(1)
Absolute Maximum Ratings
over operating free-air temperature range (unless otherwise noted)
MIN MAX UNIT
VCC Supply voltage (2) 18 V
VI Input voltage CONT, RESET, THRES, and TRIG VCC V
IO Output current ±225 mA
D package 86
θJA Package thermal impedance (3) (4) N package 80 °C/W
NS package 76
θJC Package thermal impedance (5) (6) J package 15.05 °C/W
TJ Operating virtual junction temperature 150 °C
Lead temperature 1,6 mm (1/16 in) from case for 60 s J package 300 °C
Lead temperature 1,6 mm (1/16 in) from case for 10 s D, N, or NS package 260 °C
Tstg Storage temperature range –65 150 °C

(1) Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating
conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2) All voltage values are with respect to network ground terminal.
(3) Maximum power dissipation is a function of TJ(max), θJA, and TA. The maximum allowable power dissipation at any allowable ambient
temperature is PD = (TJ(max) – TA)/θJA. Operating at the absolute maximum TJ of 150°C can affect reliability.
(4) The package thermal impedance is calculated in accordance with JESD 51-7.
(5) Maximum power dissipation is a function of TJ(max), θJC, and TC. The maximum allowable power dissipation at any allowable case
temperature is PD = (TJ(max) – TC)/θJC. Operating at the absolute maximum TJ of 150°C can affect reliability.
(6) The package thermal impedance is calculated in accordance with MIL-STD-883.

Recommended Operating Conditions

MIN MAX UNIT
NA556, NE556, SA556 4.5 16
VCC Supply voltage V
SE556 4.5 18
VI Input voltage CONT, RESET, THRES, and TRIG VCC V
IO Output current ±200 mA
NA556 –40 105
NE556 0 70
TA Operating free-air temperature °C
SA556 –40 85
SE556 –55 125

Submit Documentation Feedback 3

NA556, NE556, SA556, SE556
DUAL PRECISION TIMERS www.ti.com
SLFS023G – APRIL 1978 – REVISED JUNE 2006

Electrical Characteristics
VCC = 5 V to 15 V, TA = 25°C (unless otherwise noted)
NA556
NE556 SE556
PARAMETER TEST CONDITIONS SA556 UNIT
MIN TYP MAX MIN TYP MAX
Threshold voltage VCC = 15 V 8.8 10 11.2 9.4 10 10.6
VT V
level VCC = 5 V 2.4 3.3 4.2 2.7 3.3 4
IT Threshold current (1) 30 250 30 250 nA
4.5 5 5.6 4.8 5 5.2
VCC = 15 V
TA = –55°C to 125°C 3 6
VTRIG Trigger voltage level V
1.1 1.67 2.2 1.45 1.67 1.9
VCC = 5 V
TA = –55°C to 125°C 1.9
ITRIG Trigger current TRIG at 0 V 0.5 2 0.5 0.9 µA
0.3 0.7 1 0.3 0.7 1
VRESET Reset voltage level V
TA = –55°C to 125°C 1.1
RESET at VCC 0.1 0.4 0.1 0.4
IRESET Reset current mA
RESET at 0 V –0.4 1.5 –0.4 –1
Discharge switch
IDISCH 20 100 20 100 nA
off-state current
9 10 11 9.6 10 10.4
VCC = 15 V
Control voltage TA = –55°C to 125°C 9.6 10.4
VCONT V
(open circuit) 2.6 3.3 4 2.9 3.3 3.8
VCC = 5 V
TA = –55°C to 125°C 2.9 3.8
VCC = 15 V, 0.1 0.25 0.1 0.15
IOL = 10 mA TA = –55°C to 125°C 0.2
VCC = 15 V, 0.4 0.75 0.4 0.5
IOL = 50 mA TA = –55°C to 125°C 1
VCC = 15 V, 2 2.5 2 2.2
Low-level IOL = 100 mA TA = –55°C to 125°C 2.7
VOL V
output voltage
VCC = 15 V, IOL = 200 mA 2.5 2.5
VCC = 5 V,
TA = –55°C to 125°C 0.35
IOL = 3.5 mA
VCC = 5 V, 0.1 0.25 0.1 0.15
IOL = 5 mA TA = –55°C to 125°C 0.8
VCC = 5 V, IOL = 8 mA 0.15 0.3 0.15 0.25
VCC = 15 V, 12.75 13.3 13 13.3
IOH = –100 mA TA = –55°C to 125°C 12
High-level
VOH VCC = 15 V, IOH = –200 mA 12.5 12.5 V
output voltage
VCC = 5 V, 2.75 3.3 3 3.3
IOH = –100 mA TA = –55°C to 125°C 2
Output low, VCC = 15 V 20 30 20 24
No load VCC = 5 V 6 12 6 10
ICC Supply current mA
Output high, VCC = 15 V 18 26 18 20
No load VCC = 5 V 4 10 4 8

(1) This parameter influences the maximum value of the timing resistors R and RB in the circuit of Figure 1. For example, when VCC = 5 V,
the maximum value is R = RA + RB ≈ 3.4 MΩ, and for VCC = 15 V, the maximum value is ≈ 10 MΩ.

4 Submit Documentation Feedback

 NA556, NE556, SA556, SE556
www.ti.com
DUAL PRECISION TIMERS
SLFS023G – APRIL 1978 – REVISED JUNE 2006

Operating Characteristics
VCC = 5 V and 15 V
NA556
TEST NE556 SE556
PARAMETER SA556 UNIT
CONDITIONS (1)
MIN TYP MAX MIN TYP MAX
Each timer,
1 3 0.5 1.5 (4)
monostable (3)
Initial error of timing
TA = 25°C
interval (2) Each timer, astable (5) 2.25% 1.5%
Timer 1 – Timer 2 ±1 ±0.5
Each timer,
50 30 100 (4)
Temperature monostable (3)
coefficient of timing TA = MIN to MAX ppm/°C
Each timer, astable (5) 150 90
interval
Timer 1 – Timer 2 ±10 ±10
Each timer,
0.1 0.5 0.05 0.2 (4)
Supply voltage monostable (3)
sensitivity of timing TA = 25°C %/V
Each timer, astable (5) 0.3 0.15
interval
Timer 1 – Timer 2 ±0.2 ±0.1
CL = 15 pF,
Output-pulse rise time 100 300 100 200 (4) ns
TA = 25°C
CL = 15 pF,
Output-pulse fall time 100 300 100 200 (4) ns
TA = 25°C

(1) For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions.
(2) Timing-interval error is defined as the difference between the measured value and the average value of a random sample from each
process run.
(3) Values specified are for a device in a monostable circuit similar to Figure 2, with the following component values: RA = 2 kΩ to 100 kΩ,
C = 0.1 µF.
(4) On products compliant to MIL-PRF-38535, this parameter is not production tested.
(5) Values specified are for a device in an astable circuit similar to Figure 1, with the following component values: RA = 1 kΩ to 100 kΩ,
C = 0.1 µF.

Submit Documentation Feedback 5

NA556, NE556, SA556, SE556
DUAL PRECISION TIMERS www.ti.com
SLFS023G – APRIL 1978 – REVISED JUNE 2006

APPLICATION INFORMATION

VCC VCC
(5 V to 15 V) (5 V to 15 V)

Open
(see Note A) 0.01 µF

RA CONT VCC RA
CONT VCC
RESET RL
RESET RL
DISCH
OUT DISCH
OUT
RB OUT OUT
THRES
TRIG THRES
GND
Input TRIG GND
C
C

NOTE A: Bypassing the control-voltage input to ground with a

capacitor might improve operation. This should be evaluated
for individual applications.
Figure 1. Circuit for Astable Operation Figure 2. Circuit for Monostable Operation

6 Submit Documentation Feedback

 PACKAGE OPTION ADDENDUM

www.ti.com 27-Jun-2024

PACKAGING INFORMATION

Orderable Device Status Package Type Package Pins Package Eco Plan Lead finish/ MSL Peak Temp Op Temp (°C) Device Marking Samples
(1) Drawing Qty (2) Ball material (3) (4/5)
(6)

JM38510/10902BCA ACTIVE CDIP J 14 25 Non-RoHS SNPB N / A for Pkg Type -55 to 125 JM38510 Samples
& Green /10902BCA
NA556DR ACTIVE SOIC D 14 2500 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 105 NA556 Samples

NA556N ACTIVE PDIP N 14 25 RoHS & Green NIPDAU N / A for Pkg Type -40 to 105 NA556N Samples

NE556D LIFEBUY SOIC D 14 50 RoHS & Green NIPDAU Level-1-260C-UNLIM 0 to 70 NE556

NE556DBR ACTIVE SSOP DB 14 2000 RoHS & Green NIPDAU Level-1-260C-UNLIM 0 to 70 N556 Samples

NE556DR ACTIVE SOIC D 14 2500 RoHS & Green NIPDAU Level-1-260C-UNLIM 0 to 70 NE556 Samples

NE556N ACTIVE PDIP N 14 25 RoHS & Green NIPDAU N / A for Pkg Type 0 to 70 NE556N Samples

NE556NSR ACTIVE SO NS 14 2000 RoHS & Green NIPDAU Level-1-260C-UNLIM 0 to 70 NE556 Samples

SA556N ACTIVE PDIP N 14 25 RoHS & Green NIPDAU N / A for Pkg Type -40 to 85 SA556N Samples

SE556J ACTIVE CDIP J 14 25 Non-RoHS SNPB N / A for Pkg Type -55 to 125 SE556J Samples
& Green
SE556JB ACTIVE CDIP J 14 25 Non-RoHS SNPB N / A for Pkg Type -55 to 125 SE556JB Samples
& Green

(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.

(2)
RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may
reference these types of products as "Pb-Free".
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based
flame retardants must also meet the <=1000ppm threshold requirement.

(3)
MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.

Addendum-Page 1
 PACKAGE OPTION ADDENDUM

www.ti.com 27-Jun-2024

(4)
There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.

(5)
Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.

(6)
Lead finish/Ball material - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead finish/Ball material values may wrap to two
lines if the finish value exceeds the maximum column width.

Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.

In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.

Addendum-Page 2
 PACKAGE MATERIALS INFORMATION

www.ti.com 17-Apr-2024

TAPE AND REEL INFORMATION

REEL DIMENSIONS TAPE DIMENSIONS

K0 P1

B0 W
Reel
Diameter
Cavity A0
A0 Dimension designed to accommodate the component width
B0 Dimension designed to accommodate the component length
K0 Dimension designed to accommodate the component thickness
W Overall width of the carrier tape
P1 Pitch between successive cavity centers

Reel Width (W1)

QUADRANT ASSIGNMENTS FOR PIN 1 ORIENTATION IN TAPE

Sprocket Holes

Q1 Q2 Q1 Q2

Q3 Q4 Q3 Q4 User Direction of Feed

Pocket Quadrants

*All dimensions are nominal

Device Package Package Pins SPQ Reel Reel A0 B0 K0 P1 W Pin1
Type Drawing Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant
(mm) W1 (mm)
NA556DR SOIC D 14 2500 330.0 16.4 6.5 9.0 2.1 8.0 16.0 Q1
NE556DBR SSOP DB 14 2000 330.0 16.4 8.35 6.6 2.4 12.0 16.0 Q1
NE556DR SOIC D 14 2500 330.0 16.4 6.5 9.0 2.1 8.0 16.0 Q1
NE556NSR SO NS 14 2000 330.0 16.4 8.2 10.5 2.5 12.0 16.0 Q1

Pack Materials-Page 1
 PACKAGE MATERIALS INFORMATION

www.ti.com 17-Apr-2024

TAPE AND REEL BOX DIMENSIONS

Width (mm)
H
W

*All dimensions are nominal

Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm)
NA556DR SOIC D 14 2500 356.0 356.0 35.0
NE556DBR SSOP DB 14 2000 356.0 356.0 35.0
NE556DR SOIC D 14 2500 356.0 356.0 35.0
NE556NSR SO NS 14 2000 356.0 356.0 35.0

Pack Materials-Page 2
 PACKAGE MATERIALS INFORMATION

www.ti.com 17-Apr-2024

TUBE

T - Tube
height L - Tube length

W - Tube
width

B - Alignment groove width

*All dimensions are nominal

Device Package Name Package Type Pins SPQ L (mm) W (mm) T (µm) B (mm)
NA556N N PDIP 14 25 506 13.97 11230 4.32
NA556N N PDIP 14 25 506 13.97 11230 4.32
NE556D D SOIC 14 50 506.6 8 3940 4.32
NE556N N PDIP 14 25 506 13.97 11230 4.32
NE556N N PDIP 14 25 506 13.97 11230 4.32
NE556NE4 N PDIP 14 25 506 13.97 11230 4.32
NE556NE4 N PDIP 14 25 506 13.97 11230 4.32
SA556N N PDIP 14 25 506 13.97 11230 4.32
SA556NE4 N PDIP 14 25 506 13.97 11230 4.32

Pack Materials-Page 3
 PACKAGE OUTLINE
DB0014A SCALE 2.000
SSOP - 2 mm max height
SMALL OUTLINE PACKAGE

C
8.2
TYP
A 7.4
0.1 C
PIN 1 INDEX AREA SEATING
PLANE
12X 0.65
14
1

2X
6.5
3.9
5.9
NOTE 3

7
8 0.38
14X
0.22
0.15 C A B
5.6
B
5.0
NOTE 4

0.25
0.09

SEE DETAIL A
2 MAX
0.25
GAGE PLANE

0.95 0.05 MIN

0 -8 0.55

DETAIL A
A 15

TYPICAL

4220762/A 05/2024

NOTES:

1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing
per ASME Y14.5M.
2. This drawing is subject to change without notice.
3. This dimension does not include mold flash, protrusions, or gate burrs. Mold flash, protrusions, or gate burrs shall not
exceed 0.15 mm per side.
4. Reference JEDEC registration MO-150.

www.ti.com
 EXAMPLE BOARD LAYOUT
DB0014A SSOP - 2 mm max height
SMALL OUTLINE PACKAGE

14X (1.85) SYMM

1 (R0.05) TYP

14X (0.45) 14

SYMM

12X (0.65)

7 8

(7)

LAND PATTERN EXAMPLE

EXPOSED METAL SHOWN
SCALE: 10X

SOLDER MASK METAL UNDER SOLDER MASK

METAL
OPENING SOLDER MASK OPENING

EXPOSED METAL EXPOSED METAL

0.05 MAX 0.05 MIN

ALL AROUND ALL AROUND

NON-SOLDER MASK SOLDER MASK

DEFINED DEFINED
(PREFERRED)
SOLDER MASK DETAILS
15.000

4220762/A 05/2024
NOTES: (continued)

5. Publication IPC-7351 may have alternate designs.

6. Solder mask tolerances between and around signal pads can vary based on board fabrication site.

www.ti.com
 EXAMPLE STENCIL DESIGN
DB0014A SSOP - 2 mm max height
SMALL OUTLINE PACKAGE

14X (1.85) SYMM

(R0.05) TYP
1
14X (0.45) 14

SYMM

12X (0.65)

7 8

(7)

SOLDER PASTE EXAMPLE

BASED ON 0.125 mm THICK STENCIL
SCALE: 10X

4220762/A 05/2024
NOTES: (continued)

7. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate
design recommendations.
8. Board assembly site may have different recommendations for stencil design.

www.ti.com
 PACKAGE OUTLINE
J0014A SCALE 0.900
CDIP - 5.08 mm max height
CERAMIC DUAL IN LINE PACKAGE

PIN 1 ID A 4X .005 MIN

(OPTIONAL) [0.13] .015-.060 TYP
[0.38-1.52]

1
14
12X .100
[2.54] 14X .014-.026
14X .045-.065 [0.36-0.66]
[1.15-1.65]
.010 [0.25] C A B

.754-.785
[19.15-19.94]

7 8

B .245-.283 .2 MAX TYP .13 MIN TYP

[6.22-7.19] [5.08] [3.3]

C SEATING PLANE

.308-.314
[7.83-7.97]
AT GAGE PLANE

.015 GAGE PLANE

[0.38]

0 -15 14X .008-.014

TYP [0.2-0.36]

4214771/A 05/2017

NOTES:

1. All controlling linear dimensions are in inches. Dimensions in brackets are in millimeters. Any dimension in brackets or parenthesis are for
reference only. Dimensioning and tolerancing per ASME Y14.5M.
2. This drawing is subject to change without notice.
3. This package is hermitically sealed with a ceramic lid using glass frit.
4. Index point is provided on cap for terminal identification only and on press ceramic glass frit seal only.
5. Falls within MIL-STD-1835 and GDIP1-T14.

www.ti.com
 EXAMPLE BOARD LAYOUT
J0014A CDIP - 5.08 mm max height
CERAMIC DUAL IN LINE PACKAGE

(.300 ) TYP
[7.62] SEE DETAIL B
SEE DETAIL A

1 14

12X (.100 )
[2.54]

SYMM

14X ( .039)
[1]

7 8

SYMM

LAND PATTERN EXAMPLE

NON-SOLDER MASK DEFINED
SCALE: 5X

.002 MAX (.063)

[0.05] [1.6]
ALL AROUND METAL
( .063)
SOLDER MASK [1.6]
OPENING

METAL

SOLDER MASK .002 MAX

(R.002 ) TYP [0.05]
OPENING
[0.05] ALL AROUND
DETAIL A DETAIL B
SCALE: 15X 13X, SCALE: 15X

4214771/A 05/2017

www.ti.com
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