CMP Redefined

Jim Mello - VP Sales/Marketing Semicon Taiwan (Taipei) September 9, 2011

Outline

Industry Trends Traditional CMP CMP Adapt? Segments New Applications Value Proposition
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Industry Trend

Moores Law has dominated the CMOS industry for >40 years
Not affected by cycles, markets, analysts, or the economy

Photolithography and CMP are two critical process technologies that enabled Moores Law to continue its trend
Photolithography enables shrinks CMP enables Photolithography

Trend still holds for certain industry segments, but many companies are choosing to pursue other paths to meet their device objectives

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Industry Segments

Segment I The most advanced, leading edge devices

Wafer sizes: 300mm & possibly 450mm (future) Technology nodes: 65nm, 45nm, 32nm and below Materials: high k, metal gates, ULK, Cu, TSV, etc.

Segment II Improvements to mainstream ICs

Wafer sizes: 200mm & 150mm Technology nodes: 90nm to 350nm and above Materials: oxides, tungsten, STI, etc.
Photo displayed with permission of Freescale Semiconductor, Inc.

Segment III Emerging technologies & new applications

Wafer sizes: 200mm, 150mm, 100mm and smaller Technology nodes: various Materials: wide range of metals, oxides, polymers, and more MEMS, nanotechnology, SiC, GaN, AlN, SiGe, poly, optics, etc.

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Factors and Trends

Financial Factors and Trends Across Industry Segments

Financial Factor Average Annual Capital Technology R&D Manufacturing Cost/chip Volume Average Selling Price (ASP) "More Moore" Level High High High High High Trend "More Than Moore" Level Moderate Moderate Moderate High Low Trend Emerging Level Low High High Low High Trend -

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Traditional CMP
The original technology drivers for CMP were (and often continue to be) related to topography issues in other process modules or with the overall process integration.
Oxide CMP
Depth of focus at photolithography
Worse as linewidths shrank below 0.35 um Worse with additive topography of MLM

Shallow Trench Isolation CMP

LOCOS isolation hit physical limits Shrinks below 0.35 um required new isolation Original integration used reverse mask etch
Very sensitive alignment Very expensive due to number of process steps

Metal step coverage

Metal thinning on steep sidewalls Topography induced etch effects Inconsistent line resistance

Direct STI CMP required years of slurry innovation and process development

Tungsten CMP
Replaces plasma etchback Solves severe plug recess from overetch Lowers defectivity Improves yield Enables stacked vias

Copper CMP
Driven by lack of acceptable Cu metal etch Early difficulties with electroplating profiles Cu/barrier metal forms electrochemical cell Introduction of low-k dielectric complicates an already difficult materials system

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CMP Jigsaw Puzzle

Each new material or new integration usually requires a new CMP process . or at least a puzzle to be put together.

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CMP Complexity
Wafer / Materials Parameters
Size / Shape / Flatness Film Stack Composition Metals (Al, Cu, W, Pt, etc.) Oxide (TEOS, PSG, BPSG, etc.) Other (polysilicon, low-k polymers, etc.) Film Quality Issues Stress (compressive or tensile) Inclusions and other defects Doping or contaminant levels Final Surface Requirements Ultralow surface roughness Extreme planarization, esp. Copper Low defectivity at <0.12 um defect size

Process Issues
Long list of significant input variables
Downforce Platen speed Carrier speed Slurry flow Conditioning method Disk used (material, diamond size, spacing, etc) Force Speed Sweep profile

Highly sensitive to local pattern variation Must maintain consistency at high throughput Must optimize for variation of incoming films

Pad Issues
Materials (polyurethane, felt, foam, etc.) Properties must be chosen for the job Conditioning method often not optimized Lot-to-lot consistency

Integration Issues
Materials Compatibility
Electrochemical interactions with two or more metals Film integrity and delamination, esp. low-k Film stack compressibility

Interactions with adjacent process modules

Photolithography Metal deposition and metal etch Dielectric deposition and etch

Slurry Issues
Chemistry optimization often required Mixing and associated inconsistency Shelf life and pot life sometimes very short Slurry distribution system (design, cost, upkeep)
Agglomeration and gel formation Filtration is often required

Electrical design interactions

Feature size constraints Interactions with local pattern density Line resistance variation, esp. damascene copper Dielectric thickness variation Contact resistance variation

Cleaning method specific to slurry and film Waste disposal and local regulations

Process development teams must balance complexity, cost, risk, and timelines.
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How Must CMP Adapt?

A few common themes run across all segments:

Device reliability can not be compromised. Quality and consistency are very important. Cost is almost always a factor, though sometimes not the most important factor.

The rest of the answers depend on which industry segment you are focused on at the time.

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Decision Drivers
Segment I
EQUIPMENT CONSUMABLES MATERIALS

Speedsters

More Moore

Willing to buy for new fabs or to retool existing fabs Drive improvements in both capability and productivity Push performance in nearly every aspect of CMP Defectivity is becoming an increasing focus Adapt existing materials whenever feasible, but Will not hesitate to integrate new materials when necessary

Summary
Typical companies: microprocessor and memory makers, large-scale foundries Willing to spend on new fab construction (mostly 300 mm and possibly 450mm) Willing to adapt new materials or processes as needed to achieve performance Designs AND process technology both change at a rapid pace Design focus = performance Process focus = speed and acceptable yield

Outlook
Extremely low defect levels at insanely small sizes. Topography control to better than 3nm for some levels. Reduce wafer-to-wafer variation. CMP and cleans for new materials to solve tough physics challenges at sub-32nm design rules. Tunable consumables that allow integration teams flexibility to alter rates and selectivities. Only a small number of companies are still in this game, but wafer volumes are high at each one.

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Decision Drivers
Segment II
EQUIPMENT CONSUMABLES MATERIALS

New Mainstream

Moore than Moore

Preserve capital and extend depreciated tools whenever possible Buy tools only for "must have" capacity expansions Generally staying focused on 200mm and below Extreme focus on reducing cost per wafer Defectivity and other factors to improve yield are also key Adapt proven materials and process methods ? period. Optimize process flows for simplicity and yield

Summary
Wide range of products including digital, analog, mixed signal, power, etc. Adapting to a world of flat or falling ASPs Cost factors and yield are generally MUCH more important than technology factors Some devices enjoy long lifecycles Designs may change rapidly, but process technology intentionally being held much more stable Design focus = features and simplicity Process focus = cost and maximizing yield
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Outlook
Reduce cost per wafer polished. Lower defects (but only when it improves yield). Stable or incremental improvements in performance. New product families are generally based on same or similar process flow in existing fabs. Adapt existing equipment first, whenever possible, to avoid buying new tools. Large broad base of users, but conversion to a new consumable requires justification (ROI).

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Decision Drivers
Segment III
EQUIPMENT CONSUMABLES MATERIALS

Emerging Technology

Emerging

Preserve capital and minimize overhead Outsourcing is a strong trend (fabless) Generally start at small wafer sizes and work up to 200mm Not locked in to "traditional" CMP pad/slurry offerings Lots of small-volume niche opportunities Willing to explore a wide range of materials for unique properties Process requirements vary by several orders of magnitude

Summary
Many products not even based on traditional CMOS Startup or new entry mentality Frequently start on smaller wafer sizes and transition up as production volume increases Integration and/or process technology are generally not mature due to some fraction of creative steps Design focus = new devices Process focus = acceptable yields
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Outlook
Materials and process challenges can be very unique. Volumes tend to start low, but some devices ramp fast. Not as cost sensitive during development (later) Defect levels vary wildly depending on the product. Generally more willing to try new consumables. Companies include a wide range from new startups to other industries to specialized development teams within major semiconductor manufacturers.

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New Applications
CMP is continues to evolve for CMOS... But new applications are also being developed well beyond traditional CMP.
MEMS
Oxides (doped or undoped) Polysilicon (often structural) Nitrides and oxynitrides Separation layer (MEMS-first or MEMS-last) Metals (Au, Pt, Al)

Integrated Optics
Grating structures Embedded waveguides Integrated optical elements

Other
Phase change memory materials Photoresist and other polymers Refractory metals Magnetic materials (active or shielding) Advanced packaging (TSV) 3D ICs and similar device technologies

Advanced Substrates
Strained layer epi substrates Custom III-IV and II-IV epi layers SOI AlN, diamond, GaN, InGaP, SiC, GaAs, etc. Various surfaces for direct wafer bonding

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CMP Applications
1995 - Qty 2 CMOS Oxide Tungsten 2001 - Qty 5 CMOS Oxide Tungsten Cu (Ta barrier) Shallow Trench Polysilicon CMOS Oxide Tungsten Cu (Ta barrier) Shallow Trench Polysilicon Low k Capped Ultra Low k Metal Gates Gate Insulators High k Dielectrics Ir & Pt Electrodes Novel barrier metals 2011 - Qty 40 New Apps MEMS Nanodevices Direct Wafer Bond Noble Metals Through Si Vias 3D Packaging Ultra Thin Wafers NiFe & NiFeCo Al & Stainless Detector Arrays Polymers Magnetics Integrated Optics Substrate/Epi GaAs & AlGaAs poly-AlN & GaN InP & InGaP CdTe & HgCdTe Ge & SiGe SiC Diamond & DLC Si and SOI Lithium Niobate Quartz & Glass Titanium Sapphire

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Comprehensive CMP Solution

#1 Accelerate Time to Revenue #2 Reduce Cost and Risk

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Value Proposition
CMP Foundry
Rapid Technology Advancement Integration of New Materials Process Development Cost Reduction Consumable Screening Yield Enhancement

Remanufactured Polishers IPEC

(Novellus)

372M; 472; 676; 776 CMP-V; Auriga; Auriga-C; Auriga-EC EPO-220; EPO-222; F-REX 200; F-REX 300 Mirra 3400, Mirra Trak, Desica ,Mirra Mesa, Reflexion 6DS-SP(nTegrity); 6EG(nHance); 6EC(nSpire)

SpeedFam
(Novellus)

Ebara AMAT Strasbaugh

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Thank you

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