Digital Communication Lab Manual - Updated

DIGITAL COMMUNICATION LAB
DIGITALCOMMUNICATION
LAB
GPTC MATTANNUR 1 DEPARTMENT OF ELECTRONICS ENGIEERING

GENERAL INSTRUCTIONS
Rough record and Fair record are needed to record the experiments conducted in the
laboratory. Rough records are needed to be certified immediately on completion of the
experiment. Fair records are due at the beginning of the next lab period. Fair records must be
submitted as neat, legible, and complete.
INSTRUCTIONS TO STUDENTS FOR WRITING THE FAIR RECORD
In the fair record, the index page should be filled properly by writing the
corresponding experiment number, experiment name , date on which it was done and the page
number.
On the right side page of the record following has to be written:
1. Title: The title of the experiment should be written in the page in capital letters.
2. In the left top margin, experiment number and date should be written.
3. Aim: The purpose of the experiment should be written clearly.
4. Apparatus/Tools/Equipments/Components used: A list of the Apparatus/Tools/
Equipments/Components used for doing the experiment should be entered.
5. Principle: Simple working of the circuit/experimental set up/algorithm should be
6. Procedure: steps for doing the experiment and recording the readings should be
briefly described(flow chart/programs in the case of computer/processor related
experiments)
7. Results: The results of the experiment must be summarized in writing and should be
fulfilling the aim.
8. Inference: Inference from the results is to be mentioned.
On the Left side page of the record following has to be recorded:
1. Circuit/Program: Neatly drawn circuit diagrams/experimental set up.

2. Design: The design of the circuit/experimental set up for selecting the components
should be clearly shown if necessary.
3. Observations:
i) Data should be clearly recorded using Tabular Columns.
ii) Unit of the observed data should be clearly mentioned
iii) Relevant calculations should be shown. If repetitive calculations are
needed, only show a sample calculation and summarize the others in a table.
4. Graphs: Graphs can used to present data in a form that show the results obtained, as
one or more of the parameters are varied. A graph has the advantage of presenting
large amounts of data in a concise visual form. Graph should be in a square format.

GENERAL RULES FOR PERSONAL SAFETY
1. Always wear tight shirt/lab coat, pants and shoes inside workshops.
2. REMOVE ALL METAL JEWELLERY since rings, wrist watches or bands,
necklaces, etc. make excellent electrodes in the event of accidental contact with
electric power sources.
3. DO NOT MAKE CIRCUIT CHANGES without turning off the power.
4. Make sure that equipment working on electrical power are grounded properly.
5. Avoid standing on metal surfaces or wet concrete. Keep your shoes dry.
6. Never handle electrical equipment with wet skin.
7. Hot soldering irons should be rested in its holder. Never leave a hot iron unattended.
8. Avoid use of loose clothing and hair near machines and avoid running around inside
lab.
TO PROTECT EQUIPMENT AND MINIMIZE MAINTENANCE
DO:
1. SET MULTIRANGE METERS to highest range before connecting to an unknown source.
2. INFORM YOUR INSTRUCTOR about faulty equipment so that it can be sent for repair.
DO NOT:
1. Do not MOVE EQUIPMENT around the room except under the supervision of an
instructor.

Experiment No.1
SAMPLING AND RECONSTRUCTION OF SINE WAVE
AIM:
To set up sampling and reconstruction circuits to study the sampling theorem and to
plot waveforms for different sampling rates.
OBJECTIVES:
After the completion of this experiment, students will have good knowledge about
sampling, effect of sampling rate, method of sampling and reconstruction of signals.
COMPONENTS AND EQUIPMENTS REQUIRED:
Sl.No. Item&Specification Quantity

1 FETBFW10 1No.
2 Resistor-1K,56 1No.
3 Capacitor-1F 1No.
4 SignalGenerator 2Nos.
5 CRO 1No.
6 BreadBoard 1No.
7 Wiresandprobes
THEORY:
As a first step to convert analog signals into digital form, the samples of the analog signals
are at regular intervals. The levels of these samples are then encoded and send to the receiver. At the
receiver these samples are recovered and from that the original signal is reconstructed. Sampling
theorem states that the original signal can be faithfully reconstructed only if the sampling frequency
is at least double that of the highest frequency component in the sampled signal.
A sampling and reconstruction circuit is shown in figure. An FET is used as a switch to take
samples of the sine wave input. Sampling pulses are applied to the gate of the FET that switches it
ON and OFF. The input signal is sent to the output only when the transistor is ON. Thus the output
of the FET is a sampled form of the input signal.
The reconstruction circuit is a low pass filter having a cut off frequency equal to the
frequency of the analog input signal.
PROCEDURE:
1. Test all the components and probes.

2. Set up the circuit as shown in figure on the bread board.
3. Feed 5Vpp, 100Hz sine wave as input.

4. Apply 5 Vpp square wave signal as sampling pulse.

5. Observe sampled output and reconstructed signals for the following sampling
frequencies; a) 100Hz b) 200Hz c) 500Hz d) 1 KHz and e) 2KHz. Vary the amplitude of
the sampling pulses to obtain the optimum output.
6. Plot the above waveforms.
CIRCUIT DIAGRAM:
WAVEFORMS:

RESULT:
Analog Input is sampled at different sampling rates and then reconstructed. Observed the
waveforms and plotted.
INFERENCE:
1) To reconstruct the original signal, the sampling frequency should at least be double that
of the input frequency.
2) Reconstructed signal quality improves with increase in sampling frequency.

Experiment No.2
PULSE AMPLITUDE MODULATOR AND DEMODULATOR
AIM:
To set up pulse amplitude modulator and demodulator circuits and to observe the
waveforms.
OBJECTIVES:
After completing this experiment, students will be able to set up PAM modulator and
demodulator circuits and identify the waveforms.

1 AnalogSwitch CD4016 1No.
2 Resistor-1.5K 1No.
5 CRO 1No.
6 BreadBoard 1No.
7 Powersupply+/-10V 1No.
THEORY:
Pulse Amplitude Modulation (PAM) is the simplest pulse modulation scheme. In pulse
amplitude modulation system the amplitude of a carrier pulse train is varied in accordance
with the instantaneous level of the modulating signal.
The simplest form of the PAM modulator is an analog switch that is turned on and off
at the RF carrier pulse rate. As the switch changes state, the modulating signal is connected
and disconnected from the output. Thus the output PAM signal is a sampled version of the
modulating signal. If the sampling frequency is sufficiently high (at least twice that of the
highest modulating frequency), the original signal can be recovered at the receiver by simply
passing it through a low pass filter having a cut-off frequency equal to the highest frequency
in the modulating signal.
PROCEDURE:
1.Test all the components and probes.
2. Set up the modulator circuit using CD 4016 as shown in figure. Switch on the power
supplies.
3. Feed 5Vpp, 100Hz modulating signal at IN 1 input and 5V, 1KHz square wave
signal at Control 1 input of CD 4016.
4. Observe the PAM output signal at OUT 1 pin on one channel of the CRO.
5. Set up the demodulator circuit as shown in figure. Feed the PAM signal as the input
and observe the demodulated output on the other channel of the CRO. Plot the
waveforms.

CIRCUIT DIAGRAM:
Modulator Demodulator
PIN DIAGRAM OF CD4016:
WAVEFORMS:
RESULT:
The PAM modulator and demodulator circuits were set up and the waveforms were
plotted.
INFERENCE:
Analog switch can be used as a PAM modulator and a simple RC low pass filter can be
used as a PAM demodulator.

Experiment No.3
PULSE WIDTH MODULATOR AND DEMODULATOR
AIM:
To set up pulse width modulator and demodulator circuits and to observe and plot the
waveforms.
OBJECTIVES:
After completing this experiment the students will be able to set up pulse width
modulator and demodulator circuits and to identify PWM waveform.

1 IC555, IC741 1No.each
2 Resistor-1.2K,4.7K, 10K, 1.5K 1No.each
1K 2Nos.
3 Capacitor-0.1F,0.001F 1No. Each
10F,1F 2Nos.each
4 Diode1N 4001 1No.
5 CRO 1No.
7 BreadBoard 1No.
8 PowerSupply10V 1No.
9 Wiresandconnectors
THEORY:
Pulse Width Modulation (PWM) is a form of pulse modulation where the width of the
pulses in a carrier pulse train is made proportional to the instantaneous amplitude of the
modulating signal.
A pulse width modulator circuit made up of 555 Timer is shown in figure. Here the
555 timer is working in monostable mode. A negative trigger pulse at pin 2 sets the output.
The modulating signal is applied to the control pin of the 555 which varies the threshold
voltage. This in turn varies the charging time of capacitor C2 and makes the trailing edge of
the output pulse proportional to the modulating signal. Thus the leading edge of the output
pulse is decided by the trigger pulse which occurs periodically and the trailing edge is
proportional to the amplitude of the modulating signal. The resulting output will be pulse
width modulated.
The pulse width demodulator circuit consists of an integrator and a low pass filter with
a cut off frequency of 100Hz. The integrator reconstructs the modulating signal which is
further smoothened by the low pass filter. The series capacitor eliminates the dc component
from the demodulated signal.

PROCEDURE:
2. Set up the circuit as shown in the figure on the bread board. Switch on the power
supply.
3. Feed 10Vpp, 1 KHz square wave signal at the trigger input and 5Vpp, 100Hz sine
wave at the control input.
4. Observe the input modulating signal, carrier pulse train and the PWM output signal
on CRO. Vary the modulating signal amplitude to get the optimal output. Plot the
waveforms.
CIRCUIT DIAGRAM:
Modulator

Demodulator
WAVEFORMS:
RESULT:
Pulse width modulator circuit was set up and the waveforms were observed and
plotted.
INFERENCE:
Learned the usage of 555 timer as a pulse width modulator.

Experiment No.4
PULSE POSITION MODULATOR AND DEMODULATOR
AIM:
To set up pulse position (PPM) modulator and demodulator circuits and to observe and
plot the waveforms.
OBJECTIVES:
After completing this experiment the students will be able to set up pulse position
modulator circuit using IC 555, demodulator using transistor and to identify PPM waveform.

Modulator
1 IC555 2Nos.
2 Resistor-4.7K,10K, 1.2K 2No.each
3 Capacitor-10F,0.01F 1No.each
0.1F,0.001F 2No
4 Diode1N 4001 2Nos.
5 CRO 1No.
7 BreadBoard 1No.
8 PowerSupply10V 1No.
Demodulator

1 IC741,IC LM324 1No.each
2 Resistor-1.5K,47K, 15K,100K 1No.each
1K,10 2Nos.
1F 2Nos.
4 CRO 1No.
5 BreadBoard 1No.
6 Power Supply10V,+/-15V 1No.each
THEORY:
Pulse Position Modulation (PPM) is one of the pulse modulation schemes where the
relative position of the pulses in a carrier pulse train is made proportional to the instantaneous
value of the modulating signal.
A pulse position modulator made up of IC 555 is shown in figure. Both the 555s are
working in monostable mode. The first monostabe generates a PWM signal and this PWM

output is used as the trigger input of the second monostable. Since the monastable triggers at
the trailing edge of the PWM signal, the position of the resulting pulses will have position
shift compared to the input pulse train.
The PPM demodulator is set up using an Op Amp SR flip flop, an integrator and a low
pass filter. The flip flop is set by the carrier pulses and reset by the PPM pulses. The resulting
output is a PWM signal. This PWM signal is then demodulated using the integrator-low pass
filter combination.
PROCEDURE:
2. Set up the circuit as shown in the figure on the bread board. Switch on the power
supplies.
3. Feed the 10Vpp, 1KHz, 0.2 duty cycle carrier pulse train and the 5Vpp, 100Hz
modulating signal (Sine wave) at the trigger and control inputs of the first 555
respectively.
4. Make sure that the PWM signal is available at pin 3 of the first 555. Vary the
amplitude of the modulating signal to get a proper PWM output if needed.
5. Observe the waveforms of the input pulse train, modulating input, PWM output and
PPM output on the CRO.
6. Observe the following waveforms in pairs on both the channels of the CRO;
a) Modulating input and PWM output b) PWM output and PPM output c) Modulating
input and PPM output
7. Plot the waveforms.
8. Set up the demodulator circuit as shown in figure. Switch on the power supply.
9. Feed the PPM signal input and the carrier pulse input as shown in figure. Observe the
waveforms at various points on CRO and plot.
CIRCUIT DIAGRAM:
Modulator

Demodulator
WAVEFORMS:
RESULT:
The PPM modulator and demodulator circuits were set up and the waveforms were
observed and plotted.
INFERENCE:
Studied the usage of 555 timer as PPM modulator.

Experiment No.5
PULSE CODE MODULATION
AIM:
To set up a PCM modulator and observe the waveforms.
OBJECTIVES:
After completing this experiment, the students will be able to a) Set up a PCM
modulator and to generate a PCM encoded output for a given analog input.

1 Resistor-2.2K 7Nos.
1K 3Nos.
2 ICCD4016, LM324,7493,7400 1No.each
4 CRO 1No.
5 PowerSupply-+5V 1No.
6 BreadBoard 1No.
7 Wiresandprobes
THEORY:
Pulse Code Modulation is a digital modulation technique by which an analog signal is
converted to an equivalent sequence of binary codes. The analog signal is first sampled at
regular intervals and these samples are then quantized to predefined levels. An analog to
digital convertor converts these quantized symbols to their corresponding binary codes.
In the circuit an analog switch is used to sample the input signal. These samples are
compared to the output of a DAC circuit which is initially zero. So the comparator output
goes ‘high’ and strobes the clock input to the counter. This signal also disables the reset inputs
of the counter. The counter starts to count up. An R-2R ladder DAC simultaneously converts
the counter output to its equivalent analog value. When the DAC output goes above the input
sample, the comparator output switches to ‘low’ and cuts off the clock input from the counter.
The reset inputs are also enabled causing the counter output to reset. When the next sample
reaches the comparator input the whole process starts over again.
PROCEDURE:

2. Set up the circuit as shown in figure on a bread board.
3. Feed 2Vpp, 100Hz unipolar sine wave as the analog input (Set dc level at 2V to
obtain a signal that varies between +1V and +3V). Make sure that the input peak
voltage never exceeds the peak DAC output.

4. Use the dc offset knob on the function generator to add dc offset to make unipolar
sine wave.
5. Use 4Vpp, 500Hz square wave with 20% duty cycle as sampling clock (clock 1) and
5V, 5KHz square wave as the clock input of the counter (clock 2).
6. Observe the input sine wave, sampled output and the PCM output (DAC output;
staircase waveform) on CRO. Vary the analog input and clock 1 input amplitudes to
obtain the optimum result, if needed.
8. The binary output can be checked by giving discrete dc input voltages (less than 5V)
CIRCUIT DIAGRAM:
PIN DIAGRAM OF LM324
WAVEFORMS:

RESULT:
The PCM modulator circuit was set up and the waveforms were plotted.
INFERENCE:
PCM is the actual digital modulation scheme where the analog input is sampled and
converted into sequence of binary codes corresponding to the sample amplitudes.

Experiment No.6
BINARY AMPLITUDE SHIFT KEYING
AIM:
To set up ASK modulator and demodulator circuits and to observe the waveforms.
OBJECTIVES:
After completing this experiment the students will be able to a) Set up ASK modulator
and demodulator circuits and b) Identify ASK waveform.

1 Transistor-BC107 1No.
2 Resistor-4.7K, 10K, 2.2K, 1K 1No.each
10Kpot 1No.
3 Capacitor-0.01F 1No.
4 Diode-1N 4001 1No.
5 ZenerDiode-5Z1 2Nos.
6 IC741 1No.
8 CRO 1No.
9 PowerSupply- +/-15V, 5V 1No.each
10 BreadBoard 1No.
11 Wiresandprobes
THEORY:
Amplitude Shift Keying (ASK) is a digital modulation scheme where the binary data is
transmitted using a carrier signal with two different amplitude levels. For binary 0 and 1, the
carrier switches between these two levels. In its simplest form, a carrier is sent during one
input and no carrier is sent during the other. This kind of modulation scheme is called on-off
keying.
A simple ASK modulator circuit is shown in figure. Here a sinusoidal high frequency
carrier signal is sent for logic ‘0’ (-5V) and no carrier is sent for logic ‘1’ (+5V). The transistor
works as a switch closes when the input (base) voltage is +5V (logic ‘1’) and shorts the
output. When the input voltage is -5V (logic ‘0’), the switch opens and the carrier signal is
directly connected to the output.
The demodulator circuit consists of an envelope detector and a comparator. The diode
D selects the positive half cycle of the ASK input. The envelop detector formed by 2.2K
resistor and 0.01uF capacitor detects the data out of the ASK input. The Op Amp comparator
and the zener diode amplitude limiter convert this detected signal to its original logic levels.
The 10K potentiometer may be varied to set suitable reference voltage for the comparator.

PROCEDURE:
1. Test all the components, bread board and probes.

2. Set up the circuits as shown in figure on the bread board.
3. Feed 10Vpp, 500Hz square wave as the message/data input and 2Vpp, 5KHz sine
wave as the carrier input.
4. Observe both the message input and ASK output simultaneously on CRO and plot.
5. Apply the ASK output of the modulator to the demodulator input.
6. Observe both the ASK input and the demodulated output simultaneously on CRO.
Adjust the reference voltage of the comparator if needed.
CIRCUIT DIAGRAM:
ASK modulator
ASK demodulator

WAVEFORMS:
RESULT:
ASK modulator and demodulator circuits were set up and the waveforms were plotted.
INFERENCE:
Studied the simplest digital modulation scheme.

Experiment No.7
BINARY FREQUENCY SHIFT KEYING
AIM:
To set up BFSK modulator and demodulator circuits and to observe the waveforms.
OBJECTIVES:
After completing this experiment, the students will be able to a) Set up FSK modulator
and demodulator circuits and b) Identify FSK waveform.

1 Transistor-BC177 1No.
2 Resistor-47K, 47Kpot, 10K pot 1No.each
10K 7Nos.
3 Capacitor- 3Nos.
0.01F 4Nos.
0.02F 1No.each
0.047F,0.001F
4 ICLM311 1No.
5 IC555, IC565 1No.each
7 CRO 1No.
8 PowerSupply- +/-5V 1No.
9 BreadBoard 1No.
10 Wiresandprobes
THEORY:
Frequency Shift Keying (FSK) is a digital modulation scheme where the binary
data is transmitted using a carrier signal with two different frequencies. For binary 0 and 1,
the carrier switches between these two different frequencies.
Modulator
A simple BFSK modulator circuit using an NPN-PNP transistor pair and an Op amp is
shown in figure. The transistors work as switches and the Op amp works as inverting
amplifier. The carrier signal is fed to the collectors and the message signal is fed to the bases
of the two transistors simultaneously. The emitters of the transistors are grounded. When the
message signal is at logic ‘1’ (+5V), the NPN transistor is ON and works as a closed switch.
The PNP transistor is OFF and works as an open switch. The Op amp now works as a
inverting amplifier with the carrier signal fed to its non-inverting input. The carrier signal of
frequency 2KHz reaches the output. When the message signal is at logic ‘0’ (-5V), the NPN

transistor is OFF and the PNP transistor ON. The Op amp works as an inverting amplifier
with the sinusoidal carrier signal of frequency 1KHz reaches the output. Thus the carrier
signal switches its frequency as the message signal switches between ‘0’ and ‘1’. The
resulting output is BFSK modulated.
Demodulator
The BPSK demodulator circuit shown in figure consists of low pass filter, a rectifier,
an envelope detector and a comparator. The LPF is fed with the BFSK modulated signal ,
passes only the low frequency signal to the output. The envelope detector removes the carrier
content and recovers the data information. The comparator inverts and level limits the signal
to regain the correct logic level.
PROCEDURE:
2. Set up the FSK modulator and demodulator circuits on the bread board. Switch on
the power supplies.
3. Feed 5V, 100Hz (10Vpp, 100Hz) square wave as the data input. Vary the pot R C to
adjust the output frequencies if needed.
4. Observe both the input and output waveforms on CRO and plot. The waveform of
the FSK output will be rectangular in nature for 555 modulator.
5. Apply the FSK output of the modulator to the input of the demodulator, and observe
the output. Vary the 10K pot to get the PLL locked with the input signal. Plot the
waveforms.
CIRCUIT DIAGRAM:
FSK Modulator

FSK Demodulator
AlternateCircuits
FSK Modulator

FSK Demodulator

WAVEFORMS:
RESULT:
The FSK modulator and demodulator circuits were set up and the waveforms were
plotted.
INFERENCE:
Studied the FSK modulator and FSK demodulator.

Experiment No.8
BINARY PHASE SHIFT KEYING
AIM:
To set up Binary Phase Shift Keying (BPSK) modulator and demodulator circuits and
to observe the waveforms.
OBJECTIVES:
After completing this experiment, the students will be able to a) Set up BPSK
modulator and demodulator circuits and b) Identify BPSK waveform.

1 Transistor-SL100,SK100 1No.each
2 Resistor- 10K pot, 1No.
100K1K 3No.
10K 7Nos. each
4 IC741 3No.
5 Diode-1N4001 1No.
ZenerDiode-5Z1 2Nos.
7 CRO 1No.
8 PowerSupply- +/-15V,2V 1No.each
9 BreadBoard 1No.
THEORY:
Binary Phase Shift Keying (BPSK) is digital transmission scheme where the binary
data is transmitted using out of phase signals. During logic ‘0’ a preset number of cycles of a
sinusoidal carrier signal is transmitted and during logic ‘1’ the same number of cycles of the
carrier signal is transmitted but with 180 o phase shift.
Modulator
A simple BPSK modulator circuit using an NPN-PNP transistor pair and an Op amp is
shown in figure. The transistors work as switches and the Op amp works as inverting/non-
inverting amplifier. The carrier signal is fed to the collectors and the message signal is fed to
the bases of the two transistors simultaneously. The emitters of the transistors are grounded.
When the message signal is at logic ‘1’ (+5V), the NPN transistor is ON and works as a
closed switch. The PNP transistor is OFF and works as an open switch. The Op amp now
works as a non- inverting amplifier with the carrier signal fed to its non-inverting input. The
carrier signal reaches the output without any phase shift. When the message signal is at logic
‘0’ (-5V), the NPN transistor is OFF and the PNP transistor ON. The Op amp works as an
inverting amplifier with the carrier signal fed to its inverting pin. The carrier signal now

reaches the output with 180 o phase shift. Thus the carrier signal switches its phase as the
message signal switches between ‘0’ and ‘1’. The resulting output is BPSK modulated.
Demodulator
The BPSK demodulator circuit shown in figure consists of an Op Amp difference
amplifier, a rectifier, an envelope detector and a comparator. The difference amplifier which is
fed with the unmodulated carrier signal at the non-inverting input and the BPSK modulated
signal at the inverting input passes only the phase shifted signal to the output. The in phase
signals get subtracted completely. The envelope detector removes the carrier content and
recovers the data information. The comparator inverts and level limits the signal to regain the
correct logic level.
PROCEDURE:
2. Set up the circuits on the bread board as shown in figure.
3. Feed 2Vpp, 1KHz sine wave as carrier input and 10Vpp, 200Hz square wave signal
as the message input.
4. Observe the BPSK output on CRO and plot the waveforms.
5. Feed this BPSK modulated signal to the inverting input of the demodulator. Also
feed the unmodulated carrier signal (2Vpp, 1KHz) to the non-inverting input.
6. Observe waveforms on CRO. Adjust the potentiometer to obtain the correct output
(if needed).
CIRCUIT DIAGRAM:
BPSKModulator

BPSKDemodulator
WAVEFORMS:
RESULT:
BPSK modulator and demodulator circuits were set up and the waveforms were
plotted.
INFERENCE:
Studied how digital data is transmitted using BPSK.

Experiment No.9
TIME DIVISION MULTIPLEXER AND DEMULTIPLEXER
AIM:
To set up Time Division Multiplexer and Demultiplexer circuits and to observe the
waveforms.
OBJECTIVES:
After completing this experiment, the students will be able to a) Set up TDM
multiplexer and demultiplexer circuits.

1 Transistor-SL100,SK100 1No.each
2 Resistor-1K 7Nos.
10K 4Nos.
4 IC741 1No.
6 CRO 1No.
8 BreadBoard 1No.
9 Wiresandprobes
THEORY:
Time Division Multiplexing (TDM) is widely used in digital communication networks
to transmit multiple signals simultaneously through the same channel. Different signals are
transmitted in a time shared manner. Each signal is allotted a fixed time slot and a sample of
the corresponding signal is transmitted during that period. After one sample each of all the
signals is sent, the time slot is given back to the first signal and this process repeats.
TDM Multiplexer
A simple TDM multiplexer circuit using an NPN-PNP transistor pair and an Op amp is
shown in figure. The transistors work as switches and the Op amp works as an adder. The
signals to be sent are fed to the collectors of the two transistors. The switching signal is
applied to the bases the transistors. During the ON time of the switching signal, the NPN
transistor is ON and the PNP transistor is OFF. Signal 1 alone is connected to the adder input
and reaches the output. During OFF time of the switching signal, the NPN transistor is OFF
and the PNP transistor is ON. Signal 2 alone is connected to the adder input and reaches the
output. Thus the two signals reach the output one after the other as the switching signal
changes state. The resulting signal is a time division multiplexed one. The on-off period of the
switching signal decides the time slot.
TDM Demultiplexer
In the demodulator circuit the two transistors act as switches. They connect the input
TDM signal to the respective outputs alternately as the switching signal changes state. A

square wave signal with the same phase and frequency as the one used at the TDM modulator
is used as the switching signal. During the ON time of the switching signal, the NPN
transistor is ON and the PNP transistor is OFF. TDM input is now connected to signal 1
output. During the OFF time of the switching signal, the NPN transistor is OFF and the PNP
transistor is ON. TDM input is now connected to signal 2 output. The RC networks act as low
pass filters.
PROCEDURE:
2. Set up the circuits on the bread board as shown in figure.
3. Connect 5Vpp, 2KHz square wave signal as the switching input.
4. Connect 2Vpp, 100Hz sine wave as signal 1 and 2Vpp, 100Hz square wave as
signal 2.
5. Observe the TDM output on CRO and plot the waveforms.
6. Feed this TDM output to the input of the demultiplexer. Use the same square wave
signal used at the modulator as the switching signal.
7. Observe signal 1 and signal 2 outputs of the demultiplexer on CRO.
CIRCUIT DIAGRAM:
TDMMultiplexer

TDMDemultiplexer
WAVEFORMS:
RESULT:
TDM Multiplexer and demultiplexer circuits were set up and the waveforms were
plotted.
INFERENCE:
Learned the basic idea of TDM multiplexing and demultiplexing.

Experiment No.10
ACTIVE LOW PASS FILTER
AIM:
To design and set up active low pass filter circuits using Op amp and to plot the
frequency response.
OBJECTIVES:
After completing this experiment, the students will be able to a) design and setup
active low pass filter circuits b)plot the frequency response curve.

1 IC741 1No.
2 Resistor-15K, 1K, 560 1No.each
4 SignalGenerator 1No.
5 CRO 1No.
7 BreadBoard 1No.
THEORY:
Electronic filters are circuits which perform signal processing functions, specifically to
remove unwanted frequency components from the signal, to enhance wanted ones, or both.
Electronic filter high-pass, low-pass, band-pass, band-stop (band-rejection; notch), or all-
pass.
Active Low Pass Filter:
The most common and easily understood active filter is the Active Low Pass Filter. Its
principle of operation and frequency response is exactly the same as those for the previously
seen passive filter, the only difference this time is that it uses an op-amp for amplification and
gain control. The simplest form of a low pass active filter is to connect an inverting or non-
inverting amplifier.
DESIGN:
Cut off frequency = 1KHz
1/2π RC = 1KHz
Take C = 0.01µF, then R = 15.9K, choose R=15KΩ
Required Gain A = 2
Gain of non-inverting amplifier = 1+Rf/R1
2= 1+Rf/R1

Rf/R1 = 1
Take R1 = 15K, then Rf = 15KΩ
PROCEDURE:
2. Set up the active low pass filter circuit on a bread board as shown in figure.
3. Feed 5Vpp sine wave as input. Vary the frequency from 50Hz to 3MHz and note
down the values of the corresponding output voltage on a tabular column.
4. Plot frequency response on a graph sheet with log f on x-axis and gain in dB on y
axis.
5. Mark the cut-off frequencies corresponding to 3dB points.
CIRCUIT DIAGRAM:
SAMPLE GRAPH:
TABULARCOLUMN:
Vin=
GainindB
f(Hz) Vo logf
(20logVo/Vi)

RESULT:
Designed and set up active low pass filter circuits using Op amp and to plot the
frequency response. Determined cut off frequency.
Cut-off frequency (3dB)=
INFERENCE:
Learned the active low pass filter and its frequency response.

Experiment No.11
ACTIVE HIGH PASS FILTER
AIM:
To design and set up active high pass filter circuits using Op amp and to plot the
frequency response
OBJECTIVES:
active high pass filter circuits b)plot the frequency response curve.

1 IC741 1No.
2 Resistor-15K, 1K, 560 1No. each
5 CRO 1No.
7 BreadBoard 1No.
THEORY:
pass.
High Pass Filter :
A first-order (single-pole) Active High Pass Filter as its name implies, attenuates low
frequencies and passes high frequency signals. It consists simply of a passive filter section
followed by a non-inverting operational amplifier. The frequency response of the circuit is the
same as that of the passive filter, except that the amplitude of the signal is increased by the
gain of the amplifier and for a non-inverting amplifier the value of the pass band voltage gain
is given as 1 + R2/R1, the same as for the low pass filter circuit.
DESIGN:
Cut off frequency = 1KHz
1/2π RC = 1KHz
Take C = 0.01µF, then R = 15.9KΩ, choose R=15KΩ
Required Gain A = 2

2= 1+Rf/R1
Rf/R1 = 1
Take R1 = 15K, then Rf = 15KΩ 

PROCEDURE:
2. Set up the active high pass filter circuit on a bread board as shown in figure.
axis.
CIRCUIT DIAGRAM:
SAMPLE GRAPH:
TABULARCOLUMN:
Vin=
GainindB
f(Hz) Vo logf
(20logVo/Vi)

RESULT:
design and set up active high pass filter circuits using Op amp and to plot the
frequency response. Determined cut off frequency.
Cut-off frequency (3dB)=
INFERENCE:
Learned the active high pass filter and its frequency response.

Experiment No.12
ACTIVE BAND PASS FILTER
AIM:
To design and set up active band pass filter circuits using Op amp and to plot the
frequency response
OBJECTIVES:
active band pass filter circuits b)plot the frequency response curve.

1 IC741 1No.
2 Resistor-15K, 1K, 560 1No. each
5 CRO 1No.
7 BreadBoard 1No.
THEORY:
pass.
The cut-off frequency or ƒc point in a simple RC passive filter can be accurately
controlled using just a single resistor in series with a non-polarized capacitor, and depending
upon which way around they are connected, we have seen that either a Low Pass or a High
Pass filter is obtained. By connecting or “cascading” together a single Low Pass Filter circuit
with a High Pass Filter circuit, we can produce another type of passive RC filter that passes a
selected range or “band” of frequencies that can be either narrow or wide while attenuating all
those outside of this range. This new type of passive filter arrangement produces a frequency
selective filter known commonly as a Band Pass Filter or BPF for short. Unlike a low pass
filter that only pass signals of a low frequency range or a high pass filter which pass signals of
a higher frequency range, a Band Pass Filters passes signals within a certain “band” or
“spread” of frequencies without distorting the input signal or introducing extra noise. This
band of frequencies can be any width and is commonly known as the filters Bandwidth.
DESIGN:
Lower Cut off frequency = 1KHz
1/2π RC = 1KHz
Take C = 0.01µF, then R = 15.9K, choose R=15KΩ

Upper Cut off frequency = 10KHz

1/2π RC = 10KHz
Take C’ = 0.01µF, then R’ = 159KΩ, choose R’=150KΩ
Required Gain A = 2
2 = 1+Rf/R1
Rf/R1 = 1
Take R1=R1’ = 15KΩ, then Rf =Rf’= 15KΩ
PROCEDURE:

2. Set up the active high pass filter circuit on a bread board as shown in figure.
axis.
CIRCUIT DIAGRAM:
SAMPLE GRAPH:

TABULAR COLUMN:
Vin=
GainindB
f(Hz) Vo logf
(20logVo/Vi)
RESULT:
Designed and set up active band pass filter circuits using Op amp and to plot the
frequency response. Determined cut off frequencies.
Lower cut-off frequency (3dB)=
Upper cut-off frequency (3dB)=
INFERENCE:
Learned the active band pass filter and its frequency response.

Experiment No.13
PN SEQUENCE GENERATOR
AIM:
To set up a PN Sequence Generator using flipflops
OBJECTIVES:
After completing this experiment, the students will be able to set up a PN Sequence
Generator using flipflops and explain the properties of PN sequence

1 IC 7474, 2No.
2 IC 7486, 1No.
3 Digital trainer kit. 1No.
THEORY:
A Pseudo-random Noise (PN) sequence is a sequence of binary numbers, e.g. ±1, which
appears to be random; but is in fact perfectly deterministic. A software or hardware device
designed to produce a PN sequence is called a PN Generator. Pseudo-random noise sequences
or PN sequences are known Sequences that exhibit the properties or characteristics of random
sequences. They can be used to logically isolate users on the same frequency channel. They
can also be used to perform scrambling as well as spreading and dispreading functions. The
reason we need to use PN sequences is that if the code sequences were deterministic, then
everybody could access the channel. If the code sequences were truly random on the other
hand, then nobody, including the intended receiver, would be able to access the channel.
PROCEDURE:
1. Set up the circuit as shown in figure.
2. Apply the power supply to each IC.
3. Preset all flipflops to 1
4. Apply the clock and observe the output.
CIRCUIT DIAGRAM:

RESULT:
Set up a PN Sequence Generator using flipflops and observed its output.
INFERENCE:
Learned about PN sequence.

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DIGITAL COMMUNICATION LAB

GPTC MATTANNUR 1 DEPARTMENT OF ELECTRONICS ENGIEERING

INSTRUCTIONS TO STUDENTS FOR WRITING THE FAIR RECORD

On the Left side page of the record following has to be recorded:

1. Circuit/Program: Neatly drawn circuit diagrams/experimental set up.

GPTC MATTANNUR 2 DEPARTMENT OF ELECTRONICS ENGIEERING

GENERAL RULES FOR PERSONAL SAFETY

TO PROTECT EQUIPMENT AND MINIMIZE MAINTENANCE

GPTC MATTANNUR 3 DEPARTMENT OF ELECTRONICS ENGIEERING

COMPONENTS AND EQUIPMENTS REQUIRED:

Sl.No. Item&Specification Quantity

1. Test all the components and probes.

GPTC MATTANNUR 4 DEPARTMENT OF ELECTRONICS ENGIEERING

4. Apply 5 Vpp square wave signal as sampling pulse.

GPTC MATTANNUR 5 DEPARTMENT OF ELECTRONICS ENGIEERING

GPTC MATTANNUR 6 DEPARTMENT OF ELECTRONICS ENGIEERING

COMPONENTS AND EQUIPMENTS REQUIRED:

Sl.No. Item&Specification Quantity

GPTC MATTANNUR 7 DEPARTMENT OF ELECTRONICS ENGIEERING

PIN DIAGRAM OF CD4016:

GPTC MATTANNUR 8 DEPARTMENT OF ELECTRONICS ENGIEERING

COMPONENTS AND EQUIPMENTS REQUIRED:

Sl.No. Item&Specification Quantity

GPTC MATTANNUR 9 DEPARTMENT OF ELECTRONICS ENGIEERING

GPTC MATTANNUR 10 DEPARTMENT OF ELECTRONICS ENGIEERING

GPTC MATTANNUR 11 DEPARTMENT OF ELECTRONICS ENGIEERING

COMPONENTS AND EQUIPMENTS REQUIRED:

Sl.No. Item&Specification Quantity

GPTC MATTANNUR 12 DEPARTMENT OF ELECTRONICS ENGIEERING

GPTC MATTANNUR 13 DEPARTMENT OF ELECTRONICS ENGIEERING

GPTC MATTANNUR 14 DEPARTMENT OF ELECTRONICS ENGIEERING

COMPONENTS AND EQUIPMENTS REQUIRED:

Sl.No. Item&Specification Quantity

1. Test all the components and probes.

GPTC MATTANNUR 15 DEPARTMENT OF ELECTRONICS ENGIEERING

PIN DIAGRAM OF LM324

GPTC MATTANNUR 16 DEPARTMENT OF ELECTRONICS ENGIEERING

GPTC MATTANNUR 17 DEPARTMENT OF ELECTRONICS ENGIEERING

Sl.No. Item&Specification Quantity

GPTC MATTANNUR 18 DEPARTMENT OF ELECTRONICS ENGIEERING

1. Test all the components, bread board and probes.

GPTC MATTANNUR 19 DEPARTMENT OF ELECTRONICS ENGIEERING

GPTC MATTANNUR 20 DEPARTMENT OF ELECTRONICS ENGIEERING

COMPONENTS AND EQUIPMENTS REQUIRED:

Sl.No. Item&Specification Quantity

GPTC MATTANNUR 21 DEPARTMENT OF ELECTRONICS ENGIEERING

GPTC MATTANNUR 22 DEPARTMENT OF ELECTRONICS ENGIEERING

GPTC MATTANNUR 23 DEPARTMENT OF ELECTRONICS ENGIEERING

PIN DIAGRAM OF LM565

PIN DIAGRAM OF LM311

GPTC MATTANNUR 24 DEPARTMENT OF ELECTRONICS ENGIEERING

GPTC MATTANNUR 25 DEPARTMENT OF ELECTRONICS ENGIEERING

COMPONENTS AND EQUIPMENTS REQUIRED:

Sl.No. Item&Specification Quantity

GPTC MATTANNUR 26 DEPARTMENT OF ELECTRONICS ENGIEERING

GPTC MATTANNUR 27 DEPARTMENT OF ELECTRONICS ENGIEERING

GPTC MATTANNUR 28 DEPARTMENT OF ELECTRONICS ENGIEERING

COMPONENTS AND EQUIPMENTS REQUIRED:

Sl.No. Item&Specification Quantity