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Chapter 7 Notes

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kutay.asikoglu
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0% found this document useful (0 votes)
13 views

Chapter 7 Notes

Uploaded by

kutay.asikoglu
Copyright
© © All Rights Reserved
Available Formats
Download as PDF, TXT or read online on Scribd
You are on page 1/ 15

Chapter 7

Sampling, Digital Devices, and Data


Acquisition

Material from Theory and Design for Mechanical Measurements;


Figliola, Third Edition

Introduction

‘ “Integrating analog electrical transducers with


digital data-acquisitions systems is cost effective
and commonplace on the factory floor, the testing
lab, and even in our homes. There are many
advantages to this hybrid arrangement, including
the efficient handling and rapid processing of
large amounts of data and varying degrees of
artificial intelligence by using digital
microprocessor systems.”

Analog Signal and Discrete


Time Series
Common Questions:
• Frequency content of measured signal?
• Size of time increment?
• Total sample period?
• How often should we sample?

Figliola, 2000

1
Notes:
‘A continuous dynamic signal can be
represented by a fourier series.
‘The discrete fourier transform can
reconstruct a dynamic signal from a
discrete set of data.

Sample Rate
‘ Sample time increment τf = δt (seconds)
‘ Sample Frequency fs = 1/δt (hertz)
‘ The sample rate has a significant effect on our perception and
reconstruction of the continuous analog signal in the time
domain.

Figliola, 2000

‘ Note the decrease in frequency of signal estimated by the


slower sampling frequency.
‘ The sampling theorem states that to reconstruct the
frequency content of a measured signal accurately, the
sample rate must be more than twice the highest
frequency contained in the measured signal.
‘ Sampling theorem: fs > 2fm
‘ Then, δt < 1/(2fm) should always give accurate DFT
frequency determination.
fm is the maximum frequency
component in a signal.

2
Alias Frequency
‘ If fs < 2fm, the high frequency content will be
falsely represented by a low frequency
component. False frequency is called alias
frequency and results from discrete sampling of a
signal at fs < 2fm
‘ The alias phenomenon is an inherent
consequence of a discrete sampling process.
‘ Refer to the discussion of folding frequency for
more detail in the text.

Alias Frequency
‘By following sampling theorem fs > 2fm,
all aliases are eliminated.
‘The concepts apply to complex periodic,
aperiodic and non-deterministic that are
represented by fourier transform

Alias Frequency

‘ Nyquist frequency: fN = fs/2 = 1/(2δt)


‘ This represents a folding point for the aliasing
phenomenon.
‘ All actual frequency content in the analog signal that
is at frequencies above fN will appear as alias
frequencies of less than fN; that is, such frequencies
will be folded back and superimposed on the signal
at lower frequencies.
‘ An alias frequency, fa, can be computed from the
folding diagram, in which the original frequency axis
is folded back over itself at the folding point of fN
and its harmonics, mfN, where m = 1, 2, …

3
Alias Frequency

‘ For example, as
noted by solid
arrows in this
figure, the
frequencies of f =
0.5fN, 1.5fN,
2.5fN,… will all
appear as 0.5fN in
the discrete series
y(rδt)

Alias Frequency
‘How is the alias of an unknown signal
avoided?
– If maximum frequency of interest is known, set
fs = 2fmax and use low pass filter with fc = fmax
– Set fs at max and set fc = fs/2

Amplitude Ambiguity
‘ The DFT (discrete fourier transform) of
sampled discrete time signal is unchanged by
changes in the total sample period Nδt,
provided that:
1. Total sample period is integer multiple of
fundamental period T1, mT1 = Nδt
2. Sample increments meets δt < 1/(2fm)
‘ Thus, the DFT will accurately represent the
frequencies and amplitudes of the discrete
time series regardless of δt used.

4
Amplitude Ambiguity

‘ Sample period defines the frequency resolution


of the DFT:
• δf = 1 / (Nδt) = fs/N
‘ Problems occur when Nδt ≠ mT1.
- problems due to truncation of complete cycle.
‘ Error decreases as Nδt more closely approaches mT1
or as fs >> fm

Observe noise on the amplitude spectrum plots, known as


leakage, where amplitude is leaked to adjacent frequencies,
which prevents accurate reconstruction of signal.

y(t) = 10 cos 628t


Note in a) and b) the
original signal can
not be reconstructed.

Figliola, 2000

“The reconstruction of a measured waveform from a


discrete signal is controlled by the sampling rate and DFT
resolution.”

Figliola, 2000

5
Amplitude Ambiguity

‘ By varying the sample period or its equivalent,


the DFT resolution, leakage can be minimized,
and the accuracy of the spectral amplitudes can
be controlled.
‘ If y(t) is an aperiodic or nondeterministic
waveform, there may not be a fundamental
period.
‘ In such a situation, one controls the accuracy of
the spectral amplitudes by varying the DFT
resolution, δf, to minimize leakage.

Amplitude Ambiguity

‘ In summary, the reconstruction of a measured


waveform from a discrete signal is controlled by
the sampling rate and the DFT resolution.
‘ By adherence to the sampling theorem, one
controls the frequency content of both the
measured signal and the resulting spectrum.
‘ By variation of δf, one can control the accuracy
of the spectral amplitude representation.

Selecting Sample Rate and Data


Number
‘ Use δt < 1/2fm (eq 1)
‘ For an exact discrete representation in both
frequency and amplitude of any periodic, analog
waveform, both the number of data points and
the sample rate should be chosen based on the
preceding discussion.
‘ This equation sets the maximum value for δt, or
the minimum sample rate fs, and the next
equation sets the total sampling time Nδt, from
which the data number N is estimated.

6
Selecting Sample Rate and Data
Number
‘ For most real signals, exact discrete
representations of the input analog signal
frequency and amplitude content are not possible
or practical.
‘ Setting the sample rate fs at five time the
maximum signal frequency together with large
values of Nδt is recommended to minimize
spectral leakage and provide a good
approximation of the original signal.

Selecting Sample Rate and Data


Number
‘An antialias filter should be used to ensure
that no frequency above a desired
maximum frequency is encountered.
‘Still, the maximum sample rate available
will be limited by the data-acquisition
system and the maximum data number by
the memory size available.

Selecting Sample Rate and Data


Number
‘ δf = 1/Nδt = fs/N (eq 2)
– Eq 1 sets max value of δt and Eq 2 sets N
‘ Exact representation is not possible
‘ Set sampling rate fs = 5 * fm and set Nδt to large
values to reduce/minimize spectral leakage and
get good approximation of signal.
‘ Recommend use of anti-aliasing filter.

7
Selecting Sample Rate and Data
Number
‘ Estimation of y(t)
N
sin[π (t / δt ) − r ]
y * (t ) = 1 / π ∑ y (rδt )
r =1 (t / δt ) − r

• Where y*(t) is a reconstructed signal

Digital Devices
‘Digital signals are discrete in time and
amplitude. Almost all systems use some
variation of the binary numbering system,
base 2.
– Bit = on/off ~ 0/1
– Byte = 8 bits
– Word = 4 bits to 64 bits depending on
microprocessor
– 2 bit: 00, 01, 10, 11 is 0 to 3

Representation
N Bits Data Range

‘1 bit 0 to 1 0 range (2n-1)


‘2 bit 0 to 3 00
‘3 bit 0 to 7 000
‘4 bit 0 to 15 0000
‘8 bit 0 to 255
‘16 bit 0 to 65535

8
Representation

‘ b8b7b6b5b4b3b2b1b0 where bn = 0 or 1
↑ MSB ↑ LSB

‘ 10010011 LSB = least significant bit


↑ MSB ↑ LSB MSB = most significant bit

Straight Binary
‘ Equivalent decimal value
n −1
– Value= ∑ b i 2 i
i= 0

– Value= b020 + b121 + b323 +…+ bn-12n-1


= 1(1) + 1(2) + 0*4 + 0*8 + 1*16 + 0*32 + 0*64 + 1*128
= 1 + 2 + 16 + 128
= 147
Examples of other binary is given in Table 7.1

Binary Coded Decimal (BCD)

‘53210 – 0101 0011 0010


5 3 2
– Each four bits represent the decimal number between 0 to 9 used in digital
readouts.

Figliola, 2000

9
Parallel vs. Serial Communication
‘ A simple on/off switch
‘ Parallel: by setting
control logic a single
+5v source is used to set
a binary register
‘ Serial: by turning on/off
a single output for
duration δt, a serial
representation of a bit
string can be
communicated.
Figliola, 2000

Digital to Analog Converter


‘ A digital-to-analog (D/A) converter is an M-
bit digital device that converts a digital
binary word into an analog voltage.
‘ Network of M binary weighted resistors with
a common summing point.
‘ MSB has R, while LSB has 2m-1*R
resistance.
‘ Network output of M
I = E ref ∑ cm
m =1
/( 2 m − 1 *R)

‘ Output voltage: Eo = IRr


‘ The full-scale output range EFSR is 0 to 10 V
or ±5V for m of 8, 12, 16, 18 bits.

Figliola, 2000

Analog to Digital Converter

‘ Quantization – the conversion of analog voltage


input to binary numbers.
‘ A/D converter is rated by its full-scale voltage
range EFSR and the number of bits “M” in the
output resister.
‘ Ex: if EFSR = 10 V or ±5 V, M = 8 bits or 256
values

10
Analog to Digital Converter

‘The resolution of an A/D converter is


defined in terms of the smallest voltage
increment that will cause a bit change.
‘Resolution is specified in volts and
determined by:
‘ Q = EFSR/2M = 10 V/ 256 = 39.1 mV, for
m=8.

Analog to Digital Converter

‘ Quantization Error – due to limited resolution, results


in error between analog and digital voltage
‘ For A/D converter with EFSR = 0 to 4V, M = 2 bit

Figliola, 2000

A/O converter resolution in terms of


signal to noise ratio

‘ Ratio of power of signal (E2/R) to power that can be


resolved by quantization (resolution of power P/2m)
expressed in decibels. SNR[dB] = 20 log 2m

Figliola, 2000

11
Saturation vs. Conversion Error

‘ Saturation Error – A/D converter is limited to minimum


and maximum voltage. If Ei is outside range of A/D
converter, Eo is saturated at the level of A/D range. The
difference between A/D limit and Ei is considered the
saturation error.
‘ Conversion Error – A/D converter experiences bias and
precision error based on method of conversion. They fall
into categories we have seen previously: hystersis,
linearity, sensitivity, zero, and repeatability.

Data Acquisition Systems

‘Data Acquisition Systems – quantifies and


stores data
‘Types:
– Manual Dedicated
– Processor and A/D PC
– Data Acquisition
– Storage

Figliola, 2000

Figliola, 2000

12
Filters

‘Filters:
– Analog- control frequency content of signal
being sampled, remove aliases.
– Digital- forward or backward moving average,
remove unwanted components.
• Take DFT, modify signal in frequency domain,
inverse DFT.

Voltage Divider Circuit


‘ Amplifiers:
– most signals need amplification or attenuation before A/D
conversion to prevent saturation.
‘ Voltage divider to attenuate input
– Eo = Ei (R2 / (R1 + R2))

Figliola, 2000
‘Note: Digital filters can not remove aliases.

Amplifiers

‘ When only the dynamic content of signal is


important. Ex: mean value of signal is large with
respect to the dynamic content.
• y(t) = 2 + 0.05 sin 2πft [volts]
• f = 5 hz

‘ Solution:
1) remove mean component before amplification by
adding on an equal but opposite sign, mean voltage.
2) pass signal through a high pass filter to remove DC
component, setting fcutoff = 1 hz

13
Shunt Resistors
‘ Many common transducers produce a current as their output;
however, an A/D converter requires a voltage signal at its
input.
‘ It is straightforward to convert current signals into voltage
signals by using a shunt resistor.

Figliola, 2000
‘ Current output sensor
• Eo = I Rshunt for I = 4 – 20 MA
‘ A 500Ω shunt provides 2-10V signal for 10V analog input.

Data Acquisition Boards

‘ Common name DAS I/O


‘ Available as expansion plug-
in-boards or as PCMCIA cards
– A/D – analog in
– D/A – analog out
– Digital I/O
– Counter-timer ports
‘ A/D amplifier gain is set either
externally by jumpers or
internally in software.
‘ Gains range from 0.5 to 1000
‘ Resolution = EFSR/G(2m) =
10V/(1000*212) = 2.44 MV
Figliola, 2000

Data Acquisition Boards

‘PCMCIA – mostly for laptops, while


expansion boards are for desktops
‘The board shown has a 12-bit successive
approximation A/D converter with 8-9 ms
conversion
‘Sampling rates up to 100,000 hz and
higher
– (0 to 10V or ± 5V)

14
Analog Inputs
‘ Single-ended connections – use one signal
line (+-high) that is measured relative to
ground (gnd). No local ground and short
wires due to EMI noises.
‘ Differential-ended connections – allows
voltage difference between two distinct input
signals. High (+) and low (-) signals are
isolated from ground. It is called a floating
input because the difference is between +
and -, not ground. Good for low voltage.

Analog Inputs
‘ When signals from various instruments are used,
differential-ended connections are usually required.
‘ DATA Acquisition is triggered by software, external
pulse, or on-board clock.

Analog Inputs
‘ Single-ended connections are suitable only when all
analog signals in the system can be made relative to a
common ground
‘ EMI – Electro-magnetic interference
‘ For low level measurements a 10k – 100k Ω resistor
should be connected between low (-) and ground at the
DAS board.

Figliola, 2000

15

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