SN751177, SN751178 DUAL DIFFERENTIAL DRIVERS AND RECEIVERS

SLLS059D FEBRUARY 1990 REVISED MAY 1999

D D D D D D D D D D D

Meet or Exceed the Requirements of ANSI Standards TIA/EIA-422-B and TIA/EIA-485-A and ITU Recommendations V.10 and V.11 Designed for Multipoint Bus Transmission on Long Bus Lines in Noise Environments Driver Positive- and Negative-Current Limiting Thermal Shutdown Protection Driver 3-State Outputs Receiver Common-Mode Input Voltage Range of 12 V to 12 V Receiver Input Sensitivity . . . 200 mV Receiver Hysteresis . . . 50 mV Typ Receiver Input Impedance . . . 12 k Min Receiver 3-State Outputs (SN751177 Only) Operate From Single 5-V Supply

SN751177 . . . N OR NS PACKAGE (TOP VIEW)

1B 1A 1R RE 2R 2A 2B GND

1 2 3 4 5 6 7 8

16 15 14 13 12 11 10 9

VCC 1D 1Y 1Z DE 2Z 2Y 2D

SN751178 . . . N OR NS PACKAGE (TOP VIEW)

description
The SN751177 and SN751178 dual differential drivers and receivers are monolithic integrated circuits that are designed for balanced multipoint bus transmission at rates up to 10 Mbit/s. They are designed to improve the performance of full-duplex data communications over long bus lines and meet ANSI Standards TIA/EIA-422-B and TIA/EIA-485-A and ITU Recommendations V.10 and V.11.

1B 1A 1R 1DE 2R 2A 2B GND

1 2 3 4 5 6 7 8

16 15 14 13 12 11 10 9

VCC 1D 1Y 1Z 2DE 2Z 2Y 2D

The NS package is only available taped and reeled.

The SN751177 and SN751178 driver outputs provide limiting for both positive and negative currents and thermal-shutdown protection from line-fault conditions on the transmission bus line. The receiver features high input impedance of at least 12 k, an input sensitivity of 200 mV over a common-mode input voltage range of 12 V to 12 V, and typical input hysteresis of 50 mV. Fail-safe design ensures that if the receiver inputs are open, the receiver outputs always will be high. The SN751177 and SN751178 are characterized for operation from 20C to 85C.

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters.

Copyright 1999, Texas Instruments Incorporated

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SN751177, SN751178 DUAL DIFFERENTIAL DRIVERS AND RECEIVERS

SLLS059D FEBRUARY 1990 REVISED MAY 1999

Function Tables
SN751177, SN751178 (each driver) INPUT D H L X ENABLE DE H H L OUTPUTS Y H L Z Z L H Z

H = high level, L = low level, X = irrelevant, Z = high impedance (off) SN751177 (each receiver) DIFFERENTIAL INPUTS AB VID 0.2 V 0.2 V < VID < 0.2 V VID 0.2 V X Open ENABLE RE L L L H L OUTPUT R H ? L Z H

H = high level, L = low level, ? = indeterminate, X = irrelevant, Z = high impedance (off) SN751178 (each receiver) DIFFERENTIAL INPUTS AB VID 0.2 V 0.2 V < VID < 0.2 V VID 0.2 V H = high level, L ? = indeterminate = low OUTPUT R H ? L level,

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SN751177, SN751178 DUAL DIFFERENTIAL DRIVERS AND RECEIVERS

SLLS059D FEBRUARY 1990 REVISED MAY 1999

logic symbols
SN751177 DE RE 15 12 4 EN1 EN2 1 1 3 2 1 1 5 2 14 13 2 1 10 11 6 7 1Y 1Z 1A 1B 2Y 2Z 2A 2B

logic diagrams (positive logic)

SN751177 DE RE 1D 12 4 14 15 13 2 1R 3 1 10 2D 9 11 6 2R SN751178 5 7 1Y 1Z 1A 1B 2Y 2Z 2A 2B

1D

1R

2D

2R

1DE 1D 1R 2DE 2D 2R

4 15 3 12 9 5

EN

14 13 2 1

1Y 1Z 1A 1B 2Y 2Z 2A 2B 2R 5 1R 2DE 2D 3 12 1DE 1D 4 15

SN751178 14 13 2 1 10 9 11 6 7 1Y 1Z 1A 1B 2Y 2Z 2A 2B

EN

10 11 6 7

These symbols are in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12.

schematics of inputs
EQUIVALENT OF DRIVER OR ENABLE INPUT VCC R(eq) EQUIVALENT OF RECEIVER INPUT VCC

Input Input

Driver Input: R(eq) = 6 k NOM Enable Input: R(eq) = 4 k NOM R(eq) = Equivalent Resistor All resistor values are nominal.

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SN751177, SN751178 DUAL DIFFERENTIAL DRIVERS AND RECEIVERS

SLLS059D FEBRUARY 1990 REVISED MAY 1999

schematics of outputs
TYPICAL OF ALL DRIVER OUTPUTS VCC TYPICAL OF ALL RECEIVER OUTPUTS VCC 85 NOM

Output Output

GND

All resistor values are nominal.

absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage, VCC (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 V Input voltage, VI (DE, RE, and D inputs) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 V Receiver input voltage range, VI (A or B inputs) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 V to 25 V Receiver differential input voltage range, VID (see Note 2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 V to 25 V Driver output voltage range, VO . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 V to 15 V Receiver low-level output current, IOL . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50 mA Package thermal impedance, JA (see Note 3): N package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 78C/W NS package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 111C/W Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 65C to 150C Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 260C
Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under recommended operating conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. NOTES: 1. All voltage values, except differential input voltage, are with respect to the network ground terminal. 2. Differential input voltage is measured at the noninverting terminal with respect to the inverting terminal. 3. The package thermal impedance is calculated in accordance with JESD 51, except for through-hole packages, which use a trace length of zero.

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SN751177, SN751178 DUAL DIFFERENTIAL DRIVERS AND RECEIVERS

SLLS059D FEBRUARY 1990 REVISED MAY 1999

recommended operating conditions

MIN Supply voltage, VCC High-level input voltage, VIH Low-level input voltage, VIL Common-mode output voltage, VOC High-level output current, IOH Low-level output current, IOL Common-mode input voltage, VIC Differential input voltage, VID High-level output current, IOH Low-level output current, IOL Receiver Driver DE RE, and D inp ts DE, RE inputs 7 4.75 2 0.8 12 60 60 12 12 400 16 NOM 5 MAX 5.25 UNIT V V V V mA mA V V A mA

Operating free-air temperature, TA 20 85 C The algebraic convention, where the less positive (more negative) limit is designated as minimum, is used in this data sheet for common-mode output and threshold voltage levels only.

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SN751177, SN751178 DUAL DIFFERENTIAL DRIVERS AND RECEIVERS

SLLS059D FEBRUARY 1990 REVISED MAY 1999

DRIVER SECTIONS electrical characteristics over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted)
PARAMETER VIK VOH VOL |VOD1| |VOD2| VOD3 |VOD| VOC |VOC| IO IOZ IIH IIL IOS Input clamp voltage High-level output voltage Low-level output voltage Differential output voltage Differential output voltage g Differential output voltage Change in magnitude of differential output voltage (see Note 5) Common-mode output voltage Change in magnitude of common-mode output voltage (see Note 5) Output current with power off High-impedance-state output current High-level input current Low-level input current Short-circuit output current (see Note 6) VCC = 0, VO = 7 V to 12 V VO = 7 V to 12 V VIH = 2.7 V VIL = 0.4 V VO = 7 V VO = VCC VO = 12 V ICC Supply current No load Outputs enabled Outputs disabled 80 50 RL = 54 or 100 , See Figure 1 1 II = 18 mA VIH = 2 V, VIH = 2 V, IO = 0 RL = 100 , RL = 54 , See Note 4 TEST CONDITIONS MIN TYP 3.7 1.1 1.5 See Figure 1 See Figure 1 2 or 1/2 VOD1 1.5 1.5 5 5 0.2 3 0.2 100 100 20 100 250 250 250 110 80 mA mA V V V V A A A A 6 MAX 1.5 VIL = 0.8 V, VIL = 0.8 V, IOH = 33 mA IOH = 33 mA UNIT V V V V V

All typical values are at VCC = 5 V and TA = 25C. The minimum VOD2 with a 100- load is either 1/2 VOD1 or 2 V, whichever is greater. The algebraic convention, where the less positive (more negative) limit is designated as minimum, is used in this data sheet for common-mode output and threshold voltage levels only. NOTES: 4. See TIA/EIA-485-A Figure 3.5, Test Termination Measurement 2 5. |VOD| and |VOC| are the changes in magnitude of VOD and VOC, respectively, that occur when the input is changed from a high level to a low level. 6. Not more than one output should be shorted at a time, and the duration of the short circuit should not exceed one second.

switching characteristics at VCC = 5 V, CL = 50 pF, TA = 25C

PARAMETER td(OD) tt(OD) tPLH tPHL tPZH tPZL tPHZ tPLZ Differential output delay time Differential output transition time Propagation delay time, low- to high-level output Propagation delay time, high- to low-level output Output enable time to high level Output enable time to low level Output disable time from high level Output disable time from low level TEST CONDITIONS RL = 54 , RL = 27 , RL = 110 , RL = 110 , RL = 110 , RL = 110 , See Figure 3 See Figure 4 See Figure 5 See Figure 6 See Figure 5 See Figure 6 MIN TYP 20 27 20 20 80 40 90 30 MAX 25 35 25 25 120 60 120 45 UNIT ns ns ns ns ns ns ns ns

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SN751177, SN751178 DUAL DIFFERENTIAL DRIVERS AND RECEIVERS

SLLS059D FEBRUARY 1990 REVISED MAY 1999

SYMBOL EQUIVALENTS DATA-SHEET PARAMETER |VOD1| |VOD2| |VOD3| |VOD| VOC |VOC| IOS IO | |Vt| |Vt| | |VOS| |VOS VOS| |Isa|, |Isb| |Ixa|, |Ixb| Iia, Iib TIA/EIA-422-B VO Vt (RL = 100 ) TIA/EIA-485-A VO Vt (RL = 54 ) Vt (Test Termination Measurement 2) | |Vt| |Vt| | |VOS| |VOS VOS|

RECEIVER SECTIONS electrical characteristics over recommended ranges of common-mode input voltage, supply voltage, and operating free-air temperature (unless otherwise noted)
PARAMETER VIT+ VIT Vhys VIK VOH VOL IOZ II IIH IIL IOS ICC Positive-going input threshold voltage Negative-going input threshold voltage Input hysteresis voltage (VIT+ VIT) Enable clamp voltage High-level output voltage Low-level Low level output voltage High-impedance-state output current Line input current (see Note 7) High-level enable input current Low-level enable input current Short-circuit output current (see Note 6) Supply current No load, Outputs enabled SN751177 SN751177 SN751177 SN751177 II = 18 mA VID = 200 mV, VID = 200 mV 200 VO = 0.4 V to 2.4 V Other input at 0 V VIH = 2.7 V VIL = 0.4 V 15 80 VI = 12 V VI = 7 V IOH = 400 A IOL = 8 mA IOL = 16 mA 2.7 0.45 0.5 20 1 0.8 20 100 85 110 TEST CONDITIONS VO = 2.7 V, VO = 0.5 V, IO = 0.4 mA IO = 16 mA 0.2 50 1.5 MIN TYP MAX 0.2 UNIT V V mV V V V A mA A A A mA

ri Input resistance 12 k All typical values are at VCC = 5 V and TA = 25C. The algebraic convention, where the less positive (more negative) limit is designated as minimum, is used in this data sheet for common-mode output and threshold voltage levels only. NOTES: 6. Not more than one output should be shorted at a time, and the duration of the short circuit should not exceed one second. 7. Refer to ANSI Standards TIA/EIA-422-B, TIA/EIA-423-A, and TIA/EIA-485-A for exact conditions.

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SN751177, SN751178 DUAL DIFFERENTIAL DRIVERS AND RECEIVERS

SLLS059D FEBRUARY 1990 REVISED MAY 1999

switching characteristics at VCC = 5 V, CL = 15 pF, TA = 25C

PARAMETER tPLH tPHL tPZH tPZL tPHZ tPLZ Propagation delay time, low- to high-level output Propagation delay time, high- to low-level output Output enable time to high level Output enable time to low level Output disable time from high level Output disable time from low level SN751177 See Figure 8 TEST CONDITIONS VID = 1.5 V to 1.5 V, 15 15V See Figure 7 MIN TYP 20 22 17 20 25 30 MAX 35 35 25 27 40 40 UNIT ns ns ns ns ns ns

PARAMETER MEASUREMENT INFORMATION

RL 2 VOD2 RL 2 VOC

Figure 1. Driver Test Circuit, VOD and VOC

VID VOH VOL +IOL IOH

Figure 2. Receiver Test Circuit, VOH and VOL

RL = 54 3V

CL = 50 pF Output (see Note A) Input td(OD) 1.5 V 1.5 V

3V 0V td(OD) 50% 10% 90% 90% 2.5 V 50% 10% tt(OD) 2.5 V

Generator (see Note B)

50

Output

tt(OD) TEST CIRCUIT VOLTAGE WAVEFORMS

NOTES: A. CL includes probe and jig capacitance. B. The pulse generator has the following characteristics: PRR 1 MHz, 50% duty cycle, ZO = 50 , tr 6 ns, tf 6 ns.

Figure 3. Driver Differential Output-Delay and Transition-Time Test Circuit and Voltage Waveforms

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SN751177, SN751178 DUAL DIFFERENTIAL DRIVERS AND RECEIVERS

SLLS059D FEBRUARY 1990 REVISED MAY 1999

PARAMETER MEASUREMENT INFORMATION

3V Input 2.3 V RL = 27 S1 Output Generator (see Note B) 50 3V CL = 15 pF (see Note A) Y Output 1.5 V tPLH 2.3 V tPHL Z Output 2.3 V 1.5 V 0V tPHL VOH 2.3 V VOL tPLH VOH 2.3 V VOL TEST CIRCUIT VOLTAGE WAVEFORMS NOTES: A. CL includes probe and jig capacitance. B. The pulse generator has the following characteristics: PRR 1 MHz, 50% duty cycle, ZO = 50 , tr 6 ns, tf 6 ns.

Figure 4. Driver Propagation-Time Test Circuit and Voltage Waveforms

Output S1 0 V or 3 V CL = 15 pF (see Note A) RL = 110 Output tPZH 0.5 V Input 1.5 V 1.5 V

3V 0V

Generator (see Note B)

50

VOH 2.3 V tPHZ Voff 0 V

TEST CIRCUIT

VOLTAGE WAVEFORMS

NOTES: A. CL includes probe and jig capacitance. B. The pulse generator has the following characteristics: PRR 1 MHz, 50% duty cycle, ZO = 50 , tr 6 ns, tf 6 ns.

Figure 5. Driver Enable- and Disable-Time Test Circuit and Voltage Waveforms

5V RL = 110 S1 0 V or 3 V CL = 15 pF (see Note A) Output VOL 0.5 V TEST CIRCUIT VOLTAGE WAVEFORMS NOTES: A. CL includes probe and jig capacitance. B. The pulse generator has the following characteristics: PRR 1 MHz, 50% duty cycle, ZO = 50 , tr 6 ns, tf 6 ns. tPZL 2.3 V tPLZ 5V Output Input 1.5 V 1.5 V 0V 3V

Generator (see Note B)

50

Figure 6. Driver Enable- and Disable-Time Test Circuit and Voltage Waveforms

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SN751177, SN751178 DUAL DIFFERENTIAL DRIVERS AND RECEIVERS

SLLS059D FEBRUARY 1990 REVISED MAY 1999

PARAMETER MEASUREMENT INFORMATION

3V Output Generator (see Note B) 50 1.5 V 0V CL = 15 pF (see Note A) Output Input 1.5 V tPLH 1.3 V 1.5 V 0V tPHL 1.3 V VOH VOL TEST CIRCUIT VOLTAGE WAVEFORMS NOTES: A. CL includes probe and jig capacitance. B. The pulse generator has the following characteristics: PRR 1 MHz, 50% duty cycle, ZO = 50 , tr 6 ns, tf 6 ns.

Figure 7. Receiver Propagation-Time Test Circuit and Voltage Waveforms

1.5 V 1.5 V

S1 CL = 15 pF (see Note A)

2 k

S2 5V

5 k

1N916 or Equivalent

Generator (see Note B)

50

S3

TEST CIRCUIT

Input tPZH Output 1.5 V

3V 1.5 V 0 V S1 to 1.5 V S3 Closed VOH S2 Open 0V

Input tPZL Output

3V 1.5 V 0V 4.5 V 1.5 V VOL 3V

S1 to 1.5 V S2 Closed S3 Open

3V Input 1.5 V 0V tPHZ VOH Output 0.5 V 1.3 V VOLTAGE WAVEFORMS S1 to 1.5 V S2 Closed S3 Closed Output Input 1.5 V

0V tPLZ 1.3 V 0.5 V VOL

S1 to 1.5 V S2 Closed S3 Closed

NOTES: A. CL includes probe and jig capacitance. B. The pulse generator has the following characteristics: PRR 1 MHz, 50% duty cycle, ZO = 50 , tr 6 ns, tf 6 ns.

Figure 8. Receiver Output Enable- and Disable-Time Test Circuit and Voltage Waveforms

10

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PACKAGE OPTION ADDENDUM

www.ti.com

4-Jun-2007

PACKAGING INFORMATION
Orderable Device SN751177N SN751177NE4 SN751177NSR SN751177NSRE4 SN751177NSRG4 SN751178N SN751178NE4 SN751178NSR SN751178NSRE4 SN751178NSRG4
(1)

Status (1) ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE

Package Type PDIP PDIP SO SO SO PDIP PDIP SO SO SO

Package Drawing N N NS NS NS N N NS NS NS

Pins Package Eco Plan (2) Qty 16 16 16 16 16 16 16 16 16 16 25 25 Pb-Free (RoHS) Pb-Free (RoHS)

Lead/Ball Finish CU NIPDAU CU NIPDAU CU NIPDAU CU NIPDAU CU NIPDAU CU NIPDAU CU NIPDAU CU NIPDAU CU NIPDAU CU NIPDAU

MSL Peak Temp (3) N / A for Pkg Type N / A for Pkg Type Level-1-260C-UNLIM Level-1-260C-UNLIM Level-1-260C-UNLIM N / A for Pkg Type N / A for Pkg Type Level-1-260C-UNLIM Level-1-260C-UNLIM Level-1-260C-UNLIM

2000 Green (RoHS & no Sb/Br) 2000 Green (RoHS & no Sb/Br) 2000 Green (RoHS & no Sb/Br) 25 25 Pb-Free (RoHS) Pb-Free (RoHS)

2000 Green (RoHS & no Sb/Br) 2000 Green (RoHS & no Sb/Br) 2000 Green (RoHS & no Sb/Br)

The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device.
(2)

Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above. Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)
(3)

MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.

Addendum-Page 1

PACKAGE MATERIALS INFORMATION

www.ti.com

11-Mar-2008

TAPE AND REEL INFORMATION

*All dimensions are nominal

Device

Package Package Pins Type Drawing SO SO NS NS 16 16

SPQ

Reel Reel Diameter Width (mm) W1 (mm) 330.0 330.0 16.4 16.4

A0 (mm)

B0 (mm)

K0 (mm)

P1 (mm) 12.0 12.0

W Pin1 (mm) Quadrant 16.0 16.0 Q1 Q1

SN751177NSR SN751178NSR

2000 2000

8.2 8.2

10.5 10.5

2.5 2.5

Pack Materials-Page 1

PACKAGE MATERIALS INFORMATION

www.ti.com

11-Mar-2008

*All dimensions are nominal

Device SN751177NSR SN751178NSR

Package Type SO SO

Package Drawing NS NS

Pins 16 16

SPQ 2000 2000

Length (mm) 346.0 346.0

Width (mm) 346.0 346.0

Height (mm) 33.0 33.0

Pack Materials-Page 2

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