PTN 78000 H

PTN78000W, PTN78000H
www.ti.com...................................................................................................................................... SLTS230C – NOVEMBER 2004 – REVISED SEPTEMBER 2008
1.5-A, WIDE-INPUT ADJUSTABLE SWITCHING REGULATOR

1FEATURES
• 1.5-A Output Current DESCRIPTION
• Wide-Input Voltage The PTN78000 is a series of high-efficiency,
(7 V to 36 V) / (15 V to 36 V) step-down Integrated Switching Regulators (ISR),
that represent the third generation in the evolution of
• Wide-Output Voltage Adjust
the popular 78ST100 series of products. In new
(2.5 V to 12.6 V) / (11.85 V to 22 V) designs it should be considered in place of the
• High Efficiency (Up to 95%) 78ST100, PT78ST100, PT5100, and PT6100 series
• On/Off Inhibit of single in-line pin (SIP) products. The PTN78000 is
smaller and lighter than its predecessors, and has
• Undervoltage Lockout
either similar or improved electrical performance
• Output Current Limit characteristics. The case-less, double-sided package,
• Overtemperature Shutdown also exhibits improved thermal characteristics, and is
• Operating Temperature: –40°C to 85°C compatible with TI's roadmap for RoHS and lead-free
compliance.
• Surface Mount Package Available
Operating from a wide-input voltage range, the
APPLICATIONS PTN78000 provides high-efficiency, step-down
voltage conversion for loads of up to 1.5 A. The
• General-Purpose, Industrial Controls, output voltage is set using a single external resistor.
HVAC Systems, Test and Measurement, The PTN78000W may be set to any value within the
Medical Instrumentation, AC/DC Adaptors, range, 2.5 V to 12.6 V, and the PTN78000H from
Vehicles, Marine, and Avionics 11.85 V to 22 V. The output voltage of the
PTN78000W can be as little as 2 V lower than the
STANDARD APPLICATION input, allowing operation down to 7 V, with an output
voltage of 5 V. The output voltage of the PTN78000H
VO
can be as little as 3 V lower than the input, alowing
1 5 operation down to 15 V, with an output voltage of
1 12 V.
VI 2 PTN78000
The PTN78000 has undervoltage lockout and an
(Top View) +
integral on/off inhibit. The modules are suited to a
Inhibit 3 4 wide variety of general-purpose applications that
CO(A)
100 mF operate off 12-V, 24-V, or 28-VDC power.
CI(A) RSET(B) Electrolytic
Ceramic 0.05 W, 1 % (Required)
(Required) (Required)
GND GND
(A) See the Application Information section for

capacitor recommendations. The minimum input
capacitance is 2.2 µF for PTN78000W, and 9.4 µF (2
x 4.7 µF) for PTN78000H.
(B) RSET is required to adjust the output voltage
higher than 2.5 V for PTN78000W, and high than
11.824 V for PTN78000H. See the Application
Information section for specific values.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date. Copyright © 2004–2008, Texas Instruments Incorporated
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
SLTS230C – NOVEMBER 2004 – REVISED SEPTEMBER 2008...................................................................................................................................... www.ti.com
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
ORDERING INFORMATION
For the most current package and ordering information, see the Package Option Addendum at the end of this datasheet, or see
the TI website at www.ti.com.
(1)
ABSOLUTE MAXIMUM RATINGS
over operating free-air temperature range unless otherwise noted, all voltages with respect to GND (pin 1),
PTN78000W UNIT
TA Operating free-air temperature Over VI range –40 to 85
Surface temperature of module body Horizontal TH (suffix AH) 260
Wave solder temperature
or pins (5 seconds)
°C
Surface temperature of module body Horizontal SMD (suffix AS) 235
Solder reflow temperature
or pins Horizontal SMD (suffix AZ) 260
Tstg Storage temperature –55 to 125
VI Input surge voltage, 10 ms maximum 38
V
VINH Inhibit (pin 3) input voltage –0.3 to 5
(1) Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under recommended operating
conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
RECOMMENDED OPERATING CONDITIONS

MIN MAX UNIT
PTN78000W 7 36
VI Input voltage V
PTN78000H 15 36
TA Operating free-air temperature –40 85 °C
PACKAGE SPECIFICATIONS
PTN78000x (Suffix AH, AS, and AZ)
Weight 2 grams
Flammability Meets UL 94 V-O
Per Mil-STD-883D, Method 2002.3, 1 ms, 1/2 sine, (1)
Mechanical shock 500 G
mounted
(1)
Horizontal T/H (suffix AH) 20 G
Mechanical vibration Mil-STD-883D, Method 2007.2, 20-2000 Hz (1)
Horizontal SMD (suffix AS and AZ) 15 G
(1) Qualification limit.
2 Submit Documentation Feedback Copyright © 2004–2008, Texas Instruments Incorporated
Product Folder Link(s): PTN78000W PTN78000H

ELECTRICAL CHARACTERISTICS
operating at 25°C free-air temperature, VI = 20 V, VO = 5 V, IO = IO (max), CI = 2.2 µF, CO = 100 µF (unless otherwise noted)
PTN78000W
PARAMETER TEST CONDITIONS
MIN TYP MAX UNIT
IO Output current TA = 85°C, natural convection airflow 0 1.5 A
(1) (2)
VI Input voltage range Over IO range 7 36 V
(3)
Set-point voltage tolerance TA = 25°C ±2%
Temperature variation –40°C to +85°C ±0.5%
Line regulation Over VI range ±10 mV
VO
Load regulation Over IO range ±10 mV
Includes set point, line, load (3)
Total output voltage variation ±3%
–40°C < TA < 85°C
VI < 12 V 2.5 VI – 2
12 V ≤ VI ≤ 15.1 V 2.5 VI – 2.5
VO Adj Output voltage adjust range V
15.1 V < VI ≤ 25 V 2.5 12.6
VI > 25 V 0.1 x VI 12.6
VI = 24 V, RSET = 732 Ω, VO = 12 V 91%
η Efficiency VI = 15 V, RSET = 21 kΩ, VO = 5 V 86%
VI = 15 V, RSET = 78.7 kΩ, VO = 3.3 V 82%
Output voltage ripple 20 MHz bandwith 1% VO V(PP)
IO (LIM) Current limit threshold ΔVO = –50 mV 3.2 A
1 A/µs load step from 50% to 100% IOmax
Transient response Recovery time 100 µs
VO over/undershoot 2.5 %VO
VI increasing 5.5
UVLO Undervoltage lockout V
VI decreasing 5.2
(4)
Input high voltage (VIH) 1 Open
V
Inhibit control (pin 3) Input low voltage (VIL) –0.1 0.3
Input low current (IIL) 0.25 mA
II (STBY) Input standby current Pin 3 connected to GND 17 mA
FS Switching frequency Over VI and IO ranges 440 550 660 kHz
(5)
CI External input capacitance Ceramic 2.2 µF
(6)
Nonceramic 100
µF
CO External output capacitance Ceramic 200
(7)
Equiv. series resistance (nonceramic) 10 mΩ
Per Telcordia SR-332, 50% stress,
MTBF Calculated reliability 8.9 106 Hr
TA = 40°C, ground benign
(1) For output voltages less than 10 V, the minimum input voltage is 7 V or (VO + 2) V, whichever is greater. For output voltages of 10 V
and higher, the minimum input voltage is (VO + 2.5) V. See the Application Information section for further guidance.
(2) For output voltages less than 3.6 V, the maximum input voltage is 10 × VO . See the Application Information section for further guidance.
(3) The set-point voltage tolerance is affected by the tolerance and stability of RSET. The stated limit is unconditionally met if RSET has a
tolerance of 1% with with 100 ppm/°C or better temperature stability.
(4) This control pin has an internal pullup, and if left open circuit, the module operates when input power is applied. The open-circuit voltage
is typically 1.5 V. A smal,l low-leakage (< 100 nA) MOSFET is recommended for control. See the Application Information section for
further guidance.
(5) An external 2.2-µF ceramic capacitor is required across the input (VI and GND) for proper operation. Locate the capacitor close to the
module.
(6) 100 µF of output capacitance is required for proper operation. See the Application Information section for further guidance.
(7) This is the typical ESR for all the electrolytic (nonceramic) capacitance. Use 17 mΩ as the minimum when using maximum ESR values
to calculate.
Copyright © 2004–2008, Texas Instruments Incorporated Submit Documentation Feedback 3

ELECTRICAL CHARACTERISTICS
operating at 25°C free-air temperature, VI = 24 V, VO = 12 V, IO = IO (max), CI = 2× 4.7 µF, CO = 100 µF (unless otherwise
noted)
PTN78000H
PARAMETER TEST CONDITIONS
MIN TYP MAX UNIT
VO = 12 V 0.1 1.5
(1)
IO Output current TA = 85°C, natural convection airflow VO = 15 V 0.1 1.5 A
(1)
VO = 22 V 0.1 1
(2)
VI Input voltage range Over IO range 15 36 V
(3)
Set-point voltage tolerance TA = 25°C ±2%
Temperature variation –40°C to +85°C ±0.5%
Line regulation Over VI range ±10 mV
VO
Load regulation Over IO range ±10 mV
Total output voltage Includes set point, line, load (3)
±3%
variation –40°C < TA < 85°C
VI < 19 V 11.85 VI – 3
Output voltage adjust 19 V ≤ VI ≤ 25 V 11.85 VI – 4
VO Adj V
range
VI > 25 V 11.85 22
VI = 24 V, RSET = 383 k Ω, VO = 12 V 91%
η Efficiency VI = 24 V, RSET = 15 kΩ, VO = 15 V 93%
VI = 32 V, RSET = 95.3 Ω, VO = 22 V 94%
Output voltage ripple 20 MHz bandwith 1% VO V(PP)
IO (LIM) Current limit threshold ΔVO = –50 mV, minimum VI 2× IO(max) A
1 A/µs load step from 50% to 100% IOmax
Transient response Recovery time 200 µs
VO over/undershoot 1 %VO
VI increasing 12.2
UVLO Undervoltage lockout V
VI decreasing 12
(4)
Input high voltage (VIH) 1 Open
V
Inhibit control (pin 3) Input low voltage (VIL) –0.1 0.3
Input low current (IIL) 0.25 mA
II (STBY) Input standby current Pin 3 connected to GND 17 mA
FS Switching frequency Over VI and IO ranges 440 550 660 kHz
(5)
CI External input capacitance Ceramic 9.4 µF
(6)
Nonceramic 100
External output µF
CO Ceramic 200
capacitance
(7)
Equiv. series resistance (nonceramic) 10 mΩ
Per Telcordia SR-332, 50% stress,
MTBF Calculated reliability 8.9 106 Hr
TA = 40°C, ground benign
(1) The maximum output current is 1.5 A or the maximum output power is 22.5 W, whichever is less.
(2) For output voltages less than 19 V, the minimum input voltage is 15 V or (VO + 3) V, whichever is greater. For output voltages of 19 V
and higher, the minimum input voltage is (VO + 4) V. See the Application Information section for further guidance.
(3) The set-point voltage tolerance is affected by the tolerance and stability of RSET. The stated limit is unconditionally met if RSET has a
tolerance of 1% with with 100 ppm/°C or better temperature stability.
(4) This control pin has an internal pullup, and if left open circuit, the module operates when input power is applied. The open-circuit voltage
is typically 1.5 V. A small, low-leakage (< 100 nA) MOSFET is recommended for control. See the Application Information section for
further guidance.
(5) Two external 4.7-µF ceramic capacitors are required across the input (VI and GND) for proper operation. Locate the capacitor close to
the module.
(6) 100 µF of output capacitance is required for proper operation. See the Application Information section for further guidance.
(7) This is the typical ESR for all the electrolytic (nonceramic) capacitance. Use 17 mΩ as the minimum when using maximum ESR values
to calculate.

PIN ASSIGNMENT
1 5
PTN78000
2 (Top View)
3 4
TERMINAL FUNCTIONS
TERMINAL
I/O DESCRIPTION
NAME NO.
This is the common ground connection for the VI and VO power connections. It is also the 0 Vdc
GND 1 I/O
reference for the Inhibit and VO Adjust control inputs.
VI 2 I The positive input voltage power node to the module, which is referenced to common GND.
The Inhibit pin is an open-collector/drain active-low input that is referenced to GND. Applying a low-level
ground signal to this input disables the module's output and turns off the output voltage. When the
Inhibit 3 I
Inhibit control is active, the input current drawn by the regulator is significantly reduced. If the Inhibit pin
is left open-circuit, the module will produce an output whenever a valid input source is applied.
A 1% resistor must be connected between this pin and GND (pin 1) to set the output voltage. If left
open-circuit, the output voltage defaults to its minimum adjust value. The temperature stability of the
VO Adjust 4 O resistor should be 100 ppm/°C (or better). The PTN78000W set-point range is 2.5 V to 12.6 V. The
PTN78000H set-point range is 11.85 V to 22 V. The standard resistor value for a number of common
output voltages is provided in the application information.
VO 5 O The regulated positive power output with respect to the GND node.

TYPICAL CHARACTERISTICS (7-V INPUT) (1) (2)

EFFICIENCY OUTPUT VOLTAGE RIPPLE
vs vs
OUTPUT CURRENT OUTPUT CURRENT
100 50
VO = 5 V VO = 3.3 V
V O − Output Voltage Ripple − mV PP

90 40
Efficiency − %
80 30
VO = 2.5 V
VO = 3.3 V
VO = 2.5 V
70 20
60 10
VO = 5 V
50 0
0 0.3 0.6 0.9 1.2 1.5 0 0.3 0.6 0.9 1.2 1.5
IO − Output Current − A IO − Output Current − A
Figure 1. Figure 2.
POWER DISSIPATION TEMPERATURE DERATING

vs vs
1 90
80
PD − Power Dissipation − W
0.8 60 LFM Airflow:
Temperature Derating - °C
70 Nat conv
VO = 2.5 V
0.6 60
50
0.4
VO = 5 V
40
0.2 VO = 3.3 V VO £ 5 V
30
0 20
0 0.3 0.6 0.9 1.2 1.5 0 0.3 0.6 0.9 1.2 1.5
IO − Output Current − A IO - Output Current - A
Figure 3. Figure 4.
(1) The electrical characteristic data has been developed from actual products tested at 25° C. This data is considered typical for the
converter. Applies to Figure 1, Figure 2, and Figure 3.
(2) The temperature derating curves represent the conditions at which internal components are at or below the manufacturer's maximum
operating temperatures. Derating limits apply to modules soldered directly to a 100 mm x 100 mm double-sided PCB with 2 oz. copper.
For surface mount packages, multiple vias (plated through holes) are required to add thermal paths around the power pins. Please refer
to the mechanical specification for more information. Applies to Figure 4.


EFFICIENCY OUTPUT VOLTAGE RIPPLE POWER DISSIPATION
vs vs vs
OUTPUT CURRENT OUTPUT CURRENT OUTPUT CURRENT
100 100 1.5
VO = 12 V
V O − Output Voltage Ripple − mV PP

VO = 9 V
PD − Power Dissipation − W
90 80 1.2 VO = 5 V
VO = 9 V
Efficiency − %
80 60 0.9
VO = 9 V
VO = 12 V
VO = 5 V
VO = 5 V 40
70 0.6
VO = 3.3 V
VO = 2.5 V
VO = 3.3 V
60 20 0.3
VO = 2.5 V
VO = 3.3 V VO = 2.5 V VO = 12 V
50 0 0
0 0.3 0.6 0.9 1.2 1.5 0 0.3 0.6 0.9 1.2 1.5 0 0.3 0.6 0.9 1.2 1.5
IO − Output Current − A IO − Output Current − A IO − Output Current − A
Figure 5. Figure 6. Figure 7.
TEMPERATURE DERATING TEMPERATURE DERATING

vs vs
90 90
80 200 LFM 80
Airflow:
120 LFM
70 70 Nat conv
60 LFM
Nat conv
60 60
50 50
40 40
VO £ 5 V VO = 12 V
30 30
20 20
0 0.3 0.6 0.9 1.2 1.5 0 0.3 0.6 0.9 1.2 1.5
IO - Output Current - A IO - Output Current - A
Figure 8. Figure 9.
operating temperatures. Derating limits apply to modules soldered directly to a 100-mm x 100-mm, double-sided PCB with 2 oz. copper.
to the mechanical specification for more information. Applies to Figure 8 and Figure 9.


vs vs vs
100 140 2
VO = 15 V
VO - Output Voltage Ripple - mVPP

VO = 12 V
120 VO = 15 V VO = 12 V
PD- Power Dissipation - W

90
1.5
Efficiency - %
100
VO = 9 V
VO = 12 V
80 VO = 5 V
80
1
60
70 VO = 5 V
VO = 3.3 V VO = 5 V
40 VO = 3.3 V
60 0.5
VO = 2.5 V 20 VO = 2.5 V
VO = 2.5 V VO = 3.3 V
50 0 0
0 0.3 0.6 0.9 1.2 1.5 0 0.3 0.6 0.9 1.2 1.5 0 0.3 0.6 0.9 1.2 1.5
IO- Output Current - A IO- Output Current - A IO- Output Current - A
TEMPERATURE DERATING TEMPERATURE DERATING TEMPERATURE DERATING

vs vs vs
90 90 90
200 LFM 200 LFM
200 LFM
80 80
80
Nat conv Nat conv

Nat conv
60 LFM 70 60 LFM
70 120 LFM 70 60 LFM
120 LFM
120 LFM
60 60 60
50 50 50
40 40 40
VO = 3.3 V VO = 5 V
30 VO = 12 V
30 30
20 20 20
0 0.3 0.6 0.9 1.2 1.5 0 0.3 0.6 0.9 1.2 1.5
IO - Output Current - A 0 0.3 0.6 0.9 1.2 1.5
IO - Output Current - A IO - Output Current - A
TEMPERATURE DERATING TEMPERATURE DERATING

vs vs
90 90
80 80
60 LFM
200 LFM
120 LFM 120 LFM
70 70
60 LFM 200 LFM
Nat conv
60 Nat conv 60
50 50
40 40
VO = 15 V VO = 18 V
30 30
20 20
0 0.3 0.6 0.9 1.2 1.5 0 0.2 0.4 0.6 0.8 1 1.2
IO- Output Current - A IO - Output Current - A
Figure 16. Figure 17.
to the mechanical specification for more information. Applies to Figure 13 through Figure 17.


vs vs vs
100 250 2.5
VO = 22 V VO = 15 V VO = 15 V
VO -Output Voltage Ripple - mVPP

90 VO = 22 V
VO = 22 V
PD - Power Dissipation - W
200 2
80 VO = 12 V
Efficiency - %
VO = 9 V
VO = 12 V
70 150 1.5
60
VO = 5 V VO = 12 V
100 1 VO = 5 V
50
40 VO = 5 V VO = 3.3 V VO = 3.3 V
VO = 3.3 V 50 0.5
30
20 0 0
0 0.3 0.6 0.9 1.2 1.5 0 0.3 0.6 0.9 1.2 1.5 0 0.3 0.6 0.9 1.2 1.5
IO - Output Current - A IO - Output Current - A IO - Output Current - A

vs vs vs
90 90 90
200 LFM
80 80 80
200 LFM
120 LFM 200 LFM
70 120 LFM 70 70
60 LFM Nat conv 120 LFM
Nat conv 60
60 60 60 LFM 60 LFM
Nat conv
50 50 50
40 40 40
VO = 3.3 V VO = 12 V
VO = 5 V
30 30 30
20 20 20
0 0.3 0.6 0.9 1.2 1.5 0 0.3 0.6 0.9 1.2 1.5 0 0.3 0.6 0.9 1.2 1.5
IO - Output Current - A IO - Output Current - A IO - Output Current - A

vs vs vs
90 90 90
200 LFM
80 80 200 LFM 80
200 LFM
120 LFM 120 LFM
70 70 70 120 LFM
60 LFM 60 LFM 60 LFM
60 60 60
Nat conv Nat conv Nat conv
50 50 50
40 40 40
VO = 15 V VO = 18 V VO = 22 V
30 30 30
20 20 20
0 0.3 0.6 0.9 1.2 1.5 0 0.2 0.4 0.6 0.8 1 1.2 0 0.2 0.4 0.6 0.8 1
IO- Output Current - A IO - Output Current - A IO- Output Current - A
to the mechanical specification for more information. Applies to Figure 21 through Figure 26.

APPLICATION INFORMATION
Adjusting the Output Voltage of the PTN78000 Wide-Output Adjust Power Modules
General
A resistor must be connected between the VO Adjust control (pin 4) and GND (pin 1) to set the output voltage.
The adjustment range is from 2.5 V to 12.6 V for PTN78000W. The adjustment range is from 11.85 V to 22 V for
PTN78000H. If pin 4 is left open, the output voltage defaults to the lowest value.
Table 2 gives the preferred value of the external resistor for several standard voltages, with the actual output
voltage that the value provides. For other output voltages, the value of the required resistor can be calculated
using Equation 1, and the constants for the applicable product in Table 1. Alternatilvey, RSET can be simply
selected from the range of values given in Table 3. Figure 27 shows the placement of the required resistor.
RSET = 54.9 kW ´ 1.25 V - RP

VO - Vmin (1)
Table 1. RSET Formula Constants

PRODUCT VMIN (V) RP (kΩ)
PTN780x0W 2.5 6.49
PTN780x0H 11.824 6.65
Input Voltage Considerations

The PTN78000 is a step-down switching regulator. In order that the output remains in regulation, the input
voltage must exceed the output by a minimum differential voltage. (Please refer to the input voltage range
requirements in the electrical characteristics table.)
Another consideration is the pulse width modulation (PWM) range of the regulator's internal control circuit. For
stable operation, its operating duty cycle should not be lower than some minimum percentage. This defines the
maximum advisable ratio between the regulator input and output voltage magnitudes.
As an example, for satisfactory performance, the operating input voltage range of the PTN78000x must adhere to
the following requirements.
1. For PTN78000W output voltages lower than 10 V, the minimum input voltage is (VO + 2 V ) or 7 V, whichever
is higher.
2. For PTN78000W output voltages equal to 10 V and higher, the minimum input voltage is (VO + 2.5 V ) .
3. For PTN78000W, the maximum input voltage is (10 x VO ) or 36 V, whichever is less.
4. For PTN78000H output voltages lower than 19 V, the minimum input voltage is (VO + 3 V ) or 15 V,
whichever is higher.
5. For PTN78000H output voltages equal to 19 V and higher, the minimum input voltage is (VO + 4 V ) .

As an example, Table 2 gives the operating input voltage range for the common output bus voltages. In addition,
the Electrical Characteristics define the available output voltage adjust range for various input voltages.
Table 2. Standard Values of RSET for Common Output Voltages

RSET
VO VO Operating
PRODUCT (Standard Value)
(Required) (V) (Actual) (V) VI Range (V)
(kΩ)
2.5 Open 2.5 7 to 25
3.3 78.7 3.306 7 to 33
PTN780x0W
5 21 4.996 7 to 36
12 0.732 12.002 14.5 to 36
12 383 12.000 15 to 36
15 15 14.994 18 to 36
PTN780x0H
18 4.42 18.023 21 to 36
22 0.0953 21.998 26 to 36
VI PTN78000W VO
2 5
VI VO
Inh GND Adj

3 1 4
CI RSET CO
2.2 mF 100 mF
0.05 W
(Ceramic) (Required)
1%
Inhibit
GND GND
(1) A 0.05-W rated resistor may be used. The tolerance should be 1%, with a temperature stability of 100 ppm/°C (or
better). Place the resistor as close to the regulator as possible. Connect the resistor directly between pins 4 and 1
using dedicated PCB traces.
(2) Never connect capacitors from VO Adjust to GND or VO. Any capacitance added to the VO Adjust pin affects the
stability of the regulator.
Figure 27. PTN78000W VOAdjust Resistor Placement

Table 3. PTN78000W Output Voltage Set-Point Resistor Values

VO (V) RSET (kΩ) VO (V) RSET (kΩ) VO (V) RSET (kΩ) VO (V) RSET (kΩ)
2.50 Open 3.7 50.7 6.1 12.6 9.0 4.07
2.55 1370 3.8 46.3 6.2 12.1 9.2 3.75
2.60 680 3.9 42.5 6.3 11.6 9.4 3.46
2.65 451 4.0 39.3 6.4 11.1 9.6 3.18
2.70 337 4.1 36.4 6.5 10.7 9.8 2.91
2.75 268 4.2 33.9 6.6 10.2 10.0 2.66
2.80 222 4.3 31.6 6.7 9.85 10.2 2.42
2.85 190 4.4 29.6 6.8 9.47 10.4 2.20
2.90 165 4.5 27.8 6.9 9.11 10.6 1.98
2.95 146 4.6 26.2 7.0 8.76 10.8 1.78
3.00 131 4.7 24.7 7.1 8.43 11.0 1.58
3.05 118 4.8 23.3 7.2 8.11 11.2 1.40
3.10 108 4.9 22.1 7.3 7.81 11.4 1.22
3.15 99.1 5.0 21.0 7.4 7.52 11.6 1.05
3.20 91.5 5.1 19.9 7.5 7.24 11.8 0.889
3.25 85.0 5.2 18.9 7.6 6.97 12.0 0.734
3.30 79.3 5.3 18.0 7.7 6.71 12.2 0.585
3.35 74.2 5.4 17.2 7.8 6.46 12.4 0.442
3.40 69.8 5.5 16.4 7.9 6.22 12.6 0.305
3.45 65.7 5.6 15.6 8.0 5.99
3.50 62.1 5.7 15.0 8.2 5.55
3.55 58.9 5.8 14.3 8.4 5.14
3.60 55.9 5.9 13.7 8.6 4.76
3.65 53.2 6.0 13.1 8.8 4.40

Table 4. PTN78000H Output Voltage Set-Point Resistor Values

VO (V) RSET (kΩ) VO (V) RSET (kΩ) VO (V) RSET (kΩ)
11.85 2633 13.50 34.3 17.20 6.12
11.90 896 13.65 30.9 17.40 5.66
11.95 538 13.80 28.1 17.60 5.23
12.00 383 13.95 25.6 17.80 4.83
12.10 242 14.10 23.5 18.00 4.46
12.15 204 14.25 21.6 18.20 4.11
12.20 176 14.40 19.9 18.40 3.79
12.25 154 14.55 18.5 18.60 3.48
12.30 138 14.70 17.2 18.80 3.19
12.35 124 14.85 16.0 19.00 2.91
12.40 113 15.00 14.9 19.20 2.65
12.45 103 15.15 13.9 19.40 2.41
12.50 94.9 15.30 13.1 19.60 2.18
12.55 87.9 15.45 12.3 19.80 1.95
12.60 81.8 15.60 11.5 20.00 1.74
12.65 76.4 15.75 10.8 20.20 1.54
12.70 71.7 15.90 10.2 20.40 1.35
12.75 67.5 16.05 9.59 20.60 1.17
12.80 63.7 16.20 9.03 20.80 0.995
12.85 60.2 16.35 8.51 21.00 0.829
12.90 57.1 16.50 8.03 21.20 0.669
12.95 54.3 16.65 7.57 21.40 0.516
13.00 51.7 16.80 7.14 21.80 0.229
13.05 49.3 17.10 6.36 22.00 0.09

CAPACITOR RECOMMENDATIONS FOR PTN78000 WIDE-OUTPUT

ADJUST POWER MODULES
PTN78000W Input Capacitor

The minimum requirement for the input of PTN78000W is 2.2 µF of ceramic capacitance. The dielectric may be
either an X5R or X7R temperature characteristic. Ceramic capacitors should be located within 0.5 inch (1,27 cm)
of the regulator input pins. Electrolytic capacitors can be used at the input, but only in addition to the required
ceramic capacitance. The minimum ripple current rating for any nonceramic capacitance must be at least
650 mArms. The ripple current rating of electrolytic capacitors is a major consideration when they are used at the
input. This ripple current requirement can be reduced by placing more ceramic capacitors at the input, in addition
to the minimum required capacitance.
Tantalum capacitors are not recommended for use at the input bus, as none were found to meet the minimum
voltage rating of 2 x (maximum dc voltage + ac ripple). The 2x rating is standard practice for regular tantalum
capacitors to ensure reliability. Polymer-tantalum capacitors are more reliable and are available with a maximum
rating of typically 20 V. These can be used with input voltages up to 16 V.
PTN78000H Input Capacitor

The minimum requirement for the input of PTN78000H is 2 × 4.7 µF of ceramic capacitance. The dielectric may
be either an X5R or X7R temperature characteristic. Ceramic capacitors should be located within 0.5 inch
(1,27 cm) of the regulator input pins. Electrolytic capacitors can be used at the input, but only in addition to the
required ceramic capacitance. The minimum ripple current rating for any nonceramic capacitance must be at
least 350 mArms. The ripple current rating of electrolytic capacitors is a major consideration when they are used
at the input. This ripple current requirement can be reduced by placing more ceramic capacitors at the input, in
addition to the minimum required capacitance.
Tantalum capacitors are not recommended for use at the input bus, as none were found to meet the minimum
voltage rating of 2 x (maximum dc voltage + ac ripple). The 2× rating is standard practice for regular tantalum
capacitors to ensure reliability. Polymer-tantalum capacitors are more reliable and are available with a maximum
rating of typically 20 V. These can be used with input voltages up to 16 V.
PTN78000W and PTN78000H Output Capacitors

The minimum capacitance required to insure stability is a 100 µF. Either ceramic or electrolytic-type capacitors
can be used. The minimum ripple current rating for the nonceramic capacitance must be at least 150 mA rms.
The stability of the module and voltage tolerances will be compromised if the capacitor is not placed near the
output bus pins. A high-quality, computer-grade electrolytic capacitor should be adequate. A ceramic capacitor
can be also be located within 0.5 inch (1,27 cm) of the output pin.
For applications with load transients (sudden changes in load current), the regulator response improves with
additional capacitance. Additional electrolytic capacitors should be located close to the load circuit. These
capacitors provide decoupling over the frequency range, 2 kHz to 150 kHz. Aluminum electrolytic capacitors are
suitable for ambient temperatures above 0°C. For operation below 0°C, tantalum or OS-CON type capacitors are
recommended. When using one or more nonceramic capacitors, the calculated equivalent ESR should be no
lower than 10 mΩ (17 mΩ using the manufacturer's maximum ESR for a single capacitor). A list of capacitors
and vendors are identified in Table 5 and Table 6, the recommended capacitor tables.
Ceramic Capacitors
Above 150 kHz the performance of aluminum electrolytic capacitors becomes less effective. To further reduce
the reflected input ripple current, or the output transient response, multilayer ceramic capacitors must be added.
Ceramic capacitors have low ESR and their resonant frequency is higher than the bandwidth of the regulator.
When placed at the output, their combined ESR is not critical as long as the total value of ceramic capacitance
does not exceed 200 µF.

Tantalum Capacitors
Tantalum type capacitors may be used at the output, and are recommended for applications where the ambient
operating temperature can be less than 0°C. The AVX TPS, Sprague 593D/594/595, and Kemet
T495/T510/T520 capacitors series are suggested over many other tantalum types due to their rated surge, power
dissipation, and ripple current capability. As a caution, many general-purpose tantalum capacitors have
considerably higher ESR, reduced power dissipation, and lower ripple current capability. These capacitors are
also less reliable as they have lower power dissipation and surge current ratings. Tantalum capacitors that do not
have a stated ESR or surge current rating are not recommended for power applications. When specifying
OS-CON and polymer tantalum capacitors for the output, the minimum ESR limit is encountered well before the
maximum capacitance value is reached.
Capacitor Table
The capacitor table, Table 5 and Table 6, identifies the characteristics of capacitors from various vendors with
acceptable ESR and ripple current (rms) ratings. The recommended number of capacitors required at both the
input and output buses is identified for each capacitor type. This is not an extensive capacitor list. Capacitors
from other vendors are available with comparable specifications. Those listed are for guidance. The rms rating
and ESR (at 100 kHz) are critical parameters necessary to insure both optimum regulator performance and long
capacitor life.
Designing for Load Transients

The transient response of the dc/dc converter has been characterized using a load transient with a di/dt of
1 A/µs. The typical voltage deviation for this load transient is given in the data sheet specification table using the
required value of output capacitance. As the di/dt of a transient is increased, the response of a converter's
regulation circuit ultimately depends on its output capacitor decoupling network. This is an inherent limitation of
any dc/dc converter once the speed of the transient exceeds its bandwidth capability. If the target application
specifies a higher di/dt or lower voltage deviation, the requirement can only be met with additional output
capacitor decoupling. In these cases, special attention must be paid to the type, value, and ESR of the
capacitors selected.
If the transient performance requirements exceed those specified in the data sheet, the selection of output
capacitors becomes more important. Review the minimum ESR in the characteristic data sheet for details on the
capacitance maximum.
Table 5. Recommended Input/Output Capacitors (PTN78000W)

CAPACITOR CHARACTERISTICS QUANTITY
CAPACITOR VENDOR/ 85°C

EQUIVALENT VENDOR
COMPONENT WORKING MAXIMUM PHYSICAL
VALUE SERIES INPUT OUTPUT NUMBER
SERIES VOLTAGE RIPPLE SIZE
(µF) RESISTANCE BUS BUS
(V) CURRENT (mm)
(ESR) (Ω)
(Irms) (mA)
Panasonic
FC (Radial) 50 180 0.119 850 10 x 16 1 1 EEUFC1H181
(1)
FC (SMD) 3 100 0.150 670 10 x 10,2 1 1 EEVFC1V101P
United Chemi-Con
(1)
PXA (SMD) 16 180 0.016 4360 8 x 12 1 1 PXA16VC180MF60
LXZ 50 120 0.160 620 x 2 10 x 12,5 2 1 LXZ50VB121M10X12LL
(1) MVY50VC101M10X10TP
MVY (SMD) 50 100 0.300 500 10 x 10 1 1
(VO ≤ 5.5 V)
Nichicon
(1) UWG1H101MNR1GS
UWG (SMD) 50 100 0.300 500 10 x 10 1 1
(VO ≤ 5.5 V)
(1)
F55 (Tantalum) 10 100 0.055 2000 7,7 x 4,3 N/R ≤ 3 (2) F551A107MN (VO ≤ 5 V)
HD (Radial) 50 100 0.074 724 8 x 11,5 1 1 UHD1H101MPR
(1) The voltage rating of the input capacitor must be selected for the desired operating input voltage range of the regulator. To operate the
regulator at a higher input voltage, select a capacitor with the next higher voltage rating.
(2) The maximum voltage rating of the capacitor must be selected for the desired set-point voltage (VO ). To operate at a higher output
voltage, select a capacitor with a higher voltage rating.

Table 5. Recommended Input/Output Capacitors (PTN78000W) (continued)


EQUIVALENT VENDOR
(V) CURRENT (mm)
(ESR) (Ω)
(Irms) (mA)
Sanyo OS-CON
(3) 20SVP100M
SVP (SMD) 20 100 0.024 2500 8 x 12 1 ≤2
(VI and VO ≤ 16 V)
(3)
SP 16 100 0.032 2890 10 × 5 1 ≤2 16SP100M (VI and VO ≤ 14 V)
7,3 x 4,3 x (4) TPSV107M020R0085
20 100 0.085 1543 N/R ≤3
4,1 (VO ≤ 10 V)
AVX Tantalum TPS (SMD)
7,3 x 4,3 x (4) TPSE107M020R0200
20 100 0.200 > 817 N/R ≤3
4,1 (VO ≤ 10 V)
(3) GRM32ER60J107M
Murata X5R Ceramic 6.3 100 0.002 >1000 3225 N/R ≤2
(VO ≤ 5.5 V)
(3) C3225X5R0J107MT
TDK X5R Ceramic 6.3 100 0.002 >1000 3225 N/R ≤2
(VO ≤ 5.5 V)
(3) GRM32ER61C476M
Murata X5R Ceramic 16 47 0.002 >1000 3225 1 ≤4
(VI and VO ≤ 13.5 V)
(3) C1210C476K9PAC
Kemet X5R Ceramic 6.3 47 0.002 >1000 3225 N/R ≤4
(VO ≤ 5.5 V)
(3) C3225X5R0J476MT
TDK X5R Ceramic 6.3 47 0.002 >1000 3225 N/R ≤4
(VO ≤ 5.5 V)
(3) GRM422X5R476M6.3
Murata X5R Ceramic 6.3 47 0.002 >1000 3225 N/R ≤4
(VO ≤ 5.5 V)
(5) C3225X7R1E225KT/MT
TDK X7R Ceramic 25 2.2 0.002 >1000 SMD ≥1 1
(5) GRM32RR71E225K
Murata X7R Ceramic 25 2.2 0.002 >1000 3225 ≥1 1
C1210C225K3RAC
Kermet X7R Ceramic 25 2.2 0.002 >1000 3225 ≥ 1(4) 1
12103C225KAT2A
AVX X7R Ceramic 25 2.2 0.002 >1000 ≥ 1(4) 1
(6)
Kemet X7R Ceramic 50 1 0.002 >1000 SMD ≥2 1 C1210C105K5RAC
Murata X7R Ceramic 50 4.7 0.002 >1000 ≥1 1 GRM32ER71H475KA88L
TDK X7R Ceramic 50 2.2 0.002 >1000 ≥1 1 C3225X7R1H225KT
(6)
Murata X7R Ceramic 50 1 0.002 >1000 3225 ≥2 1 GRM32RR71H105KA01L
(6)
TDK X7R Ceramic 50 1 0.002 >1000 3225 ≥2 1 C3225X7R1H105KT
5,1 x 7,6 × (6)
Kemet Radial Through-hole 50 1 0.002 >1000 ≥2 1 C330C105K5R5CA
9,1
Murata Radial Through-hole 50 2.2 0.004 >1000 10 x 10 1 1 RPER71H2R2KK6F03
(4) Not reccomended (N/R). The voltage rating does not meet the minimum operating limits in most applications.
(5) The maximum rating of the ceramic capacitor limits the regulator's operating input voltage to 20 V. Select a alternative ceramic
component to operate at a higher input voltage.
(6) A total capacitance of 2 µF is an acceptable replacement value for a single 2.2-µF ceramic capacitor.

Table 6. Recommended Input/Output Capacitors (PTN78000H)


EQUIVALENT VENDOR
(V) CURRENT (mm)
(ESR) (Ω)
(Irms) (mA)
Panasonic
FC (Radial) 50 100 0.162 615 10 × 12,5 1 1 EEUFC1H1081
FK (SMD) 50 150 0.180 670 10 × 10,2 1 1 EEVFK1H151P
(1)
FC (SMD) 35 100 0.150 670 10 × 10,2 1 1 EEVFC1V101P (VI ≤ 32 V)
United Chemi-Con
(1) 25PS100MJ12
PS (Radial) 25 100 0.020 4320 8 × 12,5 1 ≤1
LXZ 50 120 0.160 620 10 × 12,5 1 1 LXZ50VB121M10X12LL
MVY (SMD) 50 100 0.300 500 10 × 10 1 1 MVY50VC101M10X10TP
Nichicon
UWG (SMD) 50 100 0.300 500 10 × 10 1 1 UWG1H101MNR1GS
(1) (2)
F55 (Tantalum) 10 100 0.055 2000 7,7 × 4,3 N/R ≤3 F551A107MN (VO ≤ 5 V)
HD (Radial) 50 100 0.074 724 8 × 11,5 1 1 UHD1H101MPR
Sanyo OS-CON
(1) 20SVP100M
SVP (SMD) 20 100 0.024 2500 8 × 12 1 ≤2
(1)
SP 20 120 0.024 3110 8 × 10,5 1 ≤2 20SP120M (VI and VO ≤ 16 V)
(1) GRM32ER61C476M
Murata X5R Ceramic 16 47 0.002 >1000 3225 1 1
(VO ≤ 13.5 V)
(3) C3225X7R1E225KT/MT
TDK X7R Ceramic 25 2.2 0.002 >1000 SMD ≥5 1
(3) GRM32RR71E225K
Murata X7R Ceramic 25 2.2 0.002 >1000 3225 ≥5 1
(3) C1210C225K3RAC
Kemet X7R Ceramic 25 2.2 0.002 >1000 3225 ≥5 1
(3) 12103C225KAT2A
AVX X7R Ceramic 25 2.2 0.002 >1000 ≥5 1
(4)
Kemet X7R Ceramic 50 1 0.002 >1000 SMD ≥9 1 C1210C105K5RAC
Murata X7R Ceramic 50 4.7 0.002 >1000 ≥2 1 GRM32ER71H475KA88L
TDK X7R Ceramic 50 3.3 0.002 >1000 ≥3 1 CKG45NX7R1H335M
Kemet Radial 5,1 × 7,6 ×
50 4.7 0.003 >1000 ≥2 1 C350C475K5R5CA
Through-hole 9,1
Murata Radial
50 3.3 0.003 >1000 12,5 × 12,5 3 1 RPER71H3R3KK6F03
Through-hole
(2) The maximum voltage rating of the capacitor must be selected for the desired set-point voltage (VO ). To operate at a higher output
voltage, select a capacitor with a higher voltage rating.
(3) The maximum rating of the ceramic capacitor limits the regulator's operating input voltage to 20 V. Select a alternative ceramic
component to operate at a higher input voltage.
(4) A total capacitance of 2 µF is an acceptable replacement value for a single 2.2-µF ceramic capacitor

Power-Up Characteristics
When configured per the standard application, the PTN78000 power module produces a regulated output voltage
following the application of a valid input source voltage. During power up, internal soft-start circuitry slows the
rate that the output voltage rises, thereby limiting the amount of in-rush current that can be drawn from the input
source. The soft-start circuitry introduces a short time delay (typically 5 ms–10 ms) into the power-up
characteristic. This is from the point that a valid input source is recognized. Figure 28 shows the power-up
waveforms for a PTN78000W, operating from a 12-V input and with the output voltage adjusted to 5 V. The
waveforms were measured with a 1.5-A resistive load.
VI (5 V/div)
VO (2 V/div)
II (0.5 A/div)
t - Time = 5 ms/div
Figure 28. Power-Up Waveforms
Undervoltage Lockout
The undervoltage lockout (UVLO) circuit prevents the module from attempting to power up until the input voltage
is above the UVLO threshold. This prevents the module from drawing excessive current from the input source at
power up. Below the UVLO threshold, the module is held off.
Current Limit Protection

The PTN78000 modules protect against load faults with a continuous current limit characteristic. Under a load
fault condition, the output current cannot exceed the current limit value. Attempting to draw current that exceeds
the current limit value causes the module to progressively reduce its output voltage. Current is continuously
supplied to the fault until it is removed. On removal of the fault, the output voltage promptly recovers. When
limiting output current, the regulator experiences higher power dissipation, which increases its temperature. If the
temperature increase is excessive, the module's overtemperature protection begins to periodically turn the output
voltage completely off.
Overtemperature Protection
A thermal shutdown mechanism protects the module's internal circuitry against excessively high temperatures. A
rise in temperature may be the result of a drop in airflow, a high ambient temperature, or a sustained current-limit
condition. If the junction temperature of the internal control IC rises excessively, the module turns off, reducing
the output voltage to zero. The module instantly restarts when the sensed temperature decreases by a few
degrees.
Note: Overtemperature protection is a last resort mechanism to prevent damage to the module. It should not be
relied on as permanent protection against thermal stress. Always operate the module within its temperature
derated limits, for the worst-case operating conditions of output current, ambient temperature, and airflow.
Operating the module above these limits, albeit below the thermal shutdown temperature, reduces the long-term
reliability of the module.

Output On/Off Inhibit

For applications requiring output voltage on/off control, the PTN78000 power module incorporates an output
on/off Inhibit control (pin 3). The inhibit feature can be used wherever there is a requirement for the output
voltage from the regulator to be turned off.
The power module functions normally when the Inhibit pin is left open-circuit, providing a regulated output
whenever a valid source voltage is connected to VI with respect to GND. Figure 29 shows the the circuit used to
demonstrate the inhibit function. Note the discrete transistor (Q1). Turning Q1 on applies a low voltage to the
Inhibit control pin and turns the module off. The output voltage decays as the load circuit discharges the
capacitance. The current drawn at the input is reduced to typically 17 mA. If Q1 is then turned off, the module
executes a soft-start power up. A regulated output voltage is produced within 20 ms Figure 30 shows the typical
rise in the output voltage, following the turn off of Q1. The turn off of Q1 corresponds to the fall in the waveform,
Q1 VGS. The waveforms were measured with a 1.5-A resistive load.
PTN78000W
VI = 12 V 2 5 VO = 5 V
VI VO
Inh GND Adj

3 1 4
CI
2.2 mF RSET CO L
Ceramic 21 kW 100 mF O
0.05 W A
1% D
Q1
Inhibit BSS138
GND GND
Figure 29. On/Off Inhibit Control Circuit
VO (2 V/div)
II (0.5 A/div)
Q1 VGS (10 V/div)
t - Time = 5 ms/div
Figure 30. Power Up Response From Inhibit Control

Optional Input/Output Filters

Power modules include internal input and output ceramic capacitors in all their designs. However, some
applications require much lower levels of either input reflected or output ripple/noise. This application note
describes various filters and design techniques found to be successful in reducing both input and output
ripple/noise.
Input/Output Capacitors
The easiest way to reduce output ripple and noise is to add one or more 1-µF ceramic capacitors, such as C4
shown in Figure 31. Ceramic capacitors should be placed close to the output power terminals. A single 1-µF
capacitor reduces the output ripple/noise by 10% to 30% for modules with a rated output current of less than 3 A.
(Note: C3 is recommended to improve the regulators transient response and does not reduce output ripple and
noise.)
Switching regulators draw current from the input line in pulses at their operating frequency. The amount of
reflected (input) ripple/noise generated is directly proportional to the equivalent source impedance of the power
source including the impedance of any input lines. The addition of C1, minimum 1-µF ceramic capacitor, near the
input power pins, reduces reflected conducted ripple/noise by 30% to 50%.
PTN78000W
2 5
VI VI VO VO
A B
Inhibit GND VOAdjust
+
C1 C2 3 1 4 C3 C4
2.2 µF 2.2 µF 100 µF 2.2 µF
50 V 50 V (Required) Ceramic
RSET
Ceramic Ceramic
(Required)
GND GND
UDG−05086
Figure 31. Adding High-Frequency Bypass Capacitors To The Input and Output
π Filters
If a further reduction in ripple/noise level is required for an application, higher order filters must be used. A π (pi)
filter, employing a ferrite bead (Fair-Rite part number 2673000701 or equivalent) in series with the input or output
terminals of the regulator reduces the ripple/noise by at least 20 db (see Figure 32 and Figure 33). In order for
the inductor to be effective in reduction of ripple and noise ceramic capacitors are required. (Note: see Capacitor
Recommendations for the PTN78000W for addtional information on vendors and component suggestions.)
These inductors plus ceramic capacitors form an excellent filter because of the rejection at the switching
frequency (650 kHz - 1 MHz). The placement of this filter is critical. It must be located as close as possible to the
input or output pins to be efffective. The ferrite bead is small (12,5 mm x 3 mm), easy to use, low cost, and has
low dc resistance. Fair-Rite also manufactures a surface-mount bead (part number 2773021447), through hole
(part number 2673000701) rated to 5 A, but in this application, it is effective to 5 A on the output bus. Inductors
in the range of 1 µH to 5 µH can be used in place of the ferrite inductor bead.

L1 PTN78000W L2
1 µH to 5 µH 1 µH to 5 µH
2 5
VI VI Vo Vo
A Inhibit GND Adjust B

+ +
C1 C2 3 1 4 C3 C5
2.2 µF 2.2 µF 100 µF C4
50 V 50 V RSET (Required) 2.2 µF
Ceramic Ceramic Ceramic
(Required)
GND GND
UDG−05087
Figure 32. Adding π Filters (IO ≤ 3 A)
45
40
35
Attenuation − dB
1 MHz
30
25
20 600 kHz
15
10
0 0.5 1 1.5 2 2.5 3
Load Current − A
Figure 33. π-Filter Attenuation vs. Load Current

PACKAGE OPTION ADDENDUM
www.ti.com 9-May-2023
PACKAGING INFORMATION
Orderable Device Status Package Type Package Pins Package Eco Plan Lead finish/ MSL Peak Temp Op Temp (°C) Device Marking Samples
(1) Drawing Qty (2) Ball material (3) (4/5)
(6)
PTN78000HAH ACTIVE Through- EUS 5 56 RoHS Exempt SN N / A for Pkg Type -40 to 85 Samples
Hole Module & Green
PTN78000HAS ACTIVE Surface EUT 5 49 Non-RoHS SNPB Level-1-235C-UNLIM/ -40 to 85 Samples
Mount Module & Green Level-3-260C-168HRS
PTN78000HAZ ACTIVE Surface EUT 5 49 RoHS (In SNAGCU Level-3-260C-168 HR -40 to 85 Samples
Mount Module Work) & Green
(In Work)
PTN78000WAH ACTIVE Through- EUS 5 56 RoHS Exempt SN N / A for Pkg Type -40 to 85 Samples
Hole Module & Green
PTN78000WAS ACTIVE Surface EUT 5 49 Non-RoHS SNPB Level-1-235C-UNLIM/ -40 to 85 Samples
(In Work)
PTN78000WAST ACTIVE Surface EUT 5 250 Non-RoHS SNPB Level-1-235C-UNLIM/ -40 to 85 Samples
(In Work)
PTN78000WAZ ACTIVE Surface EUT 5 49 RoHS Exempt SNAGCU Level-3-260C-168 HR -40 to 85 Samples
Mount Module & Green
PTN78000WAZT ACTIVE Surface EUT 5 250 RoHS Exempt SNAGCU Level-3-260C-168 HR -40 to 85 Samples
Mount Module & Green
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may
reference these types of products as "Pb-Free".
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based
flame retardants must also meet the <=1000ppm threshold requirement.
(3)
MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
Addendum-Page 1
PACKAGE OPTION ADDENDUM
www.ti.com 9-May-2023
(4)
There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.
(5)
Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.
(6)
Lead finish/Ball material - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead finish/Ball material values may wrap to two
lines if the finish value exceeds the maximum column width.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
Addendum-Page 2
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www.ti.com...................................................................................................................................... SLTS230C – NOVEMBER 2004 – REVISED SEPTEMBER 2008

1.5-A, WIDE-INPUT ADJUSTABLE SWITCHING REGULATOR

(A) See the Application Information section for

RECOMMENDED OPERATING CONDITIONS

(1) Qualification limit.

2 Submit Documentation Feedback Copyright © 2004–2008, Texas Instruments Incorporated

Product Folder Link(s): PTN78000W PTN78000H

Copyright © 2004–2008, Texas Instruments Incorporated Submit Documentation Feedback 3

4 Submit Documentation Feedback Copyright © 2004–2008, Texas Instruments Incorporated

Product Folder Link(s): PTN78000W PTN78000H

Copyright © 2004–2008, Texas Instruments Incorporated Submit Documentation Feedback 5

TYPICAL CHARACTERISTICS (7-V INPUT) (1) (2)

V O − Output Voltage Ripple − mV PP

POWER DISSIPATION TEMPERATURE DERATING

0.8 60 LFM Airflow:

IO − Output Current − A IO - Output Current - A

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TYPICAL CHARACTERISTICS (15-V INPUT) (1) (2)

V O − Output Voltage Ripple − mV PP

TEMPERATURE DERATING TEMPERATURE DERATING

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TYPICAL CHARACTERISTICS (24-V INPUT) (1) (2)

VO - Output Voltage Ripple - mVPP

PD- Power Dissipation - W

Figure 10. Figure 11. Figure 12.

TEMPERATURE DERATING TEMPERATURE DERATING TEMPERATURE DERATING

Nat conv Nat conv

TEMPERATURE DERATING TEMPERATURE DERATING

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TYPICAL CHARACTERISTICS (32-V INPUT) (1) (2)

VO -Output Voltage Ripple - mVPP

Figure 18. Figure 19. Figure 20.

TEMPERATURE DERATING TEMPERATURE DERATING TEMPERATURE DERATING

TEMPERATURE DERATING TEMPERATURE DERATING TEMPERATURE DERATING

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RSET = 54.9 kW ´ 1.25 V - RP

Table 1. RSET Formula Constants

Input Voltage Considerations

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Table 2. Standard Values of RSET for Common Output Voltages

Inh GND Adj

Figure 27. PTN78000W VOAdjust Resistor Placement

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Table 3. PTN78000W Output Voltage Set-Point Resistor Values

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Table 4. PTN78000H Output Voltage Set-Point Resistor Values

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CAPACITOR RECOMMENDATIONS FOR PTN78000 WIDE-OUTPUT

PTN78000W Input Capacitor

PTN78000H Input Capacitor

PTN78000W and PTN78000H Output Capacitors

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Designing for Load Transients