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Unit 4: Control Unit and Central Processing Unit (9 Hrs.)

Control Unit of Basic Computer

Control unit generates timing and control signals for the operations of the computer. The
control unit communicates with ALU and main memory. It also controls the transmission
between processor, memory and the various peripherals. It also instructs the ALU which
operation has to be performed on data.
Control unit can be designed by two methods:
1. Hardwired Control
2. Micro-programmed Control

Hardwired Control

The Hardwired Control organization involves the control logic to be implemented with gates,
flip-flops, decoders, and other digital circuits. The inputs to control unit are the instruction
register, flags, timing signals etc. This organization can be very complicated if we have to
make the control unit large.
If the design has to be modified or changed, all the combinational circuits have to be
modified which is a very difficult task.

Figure: Hardwired control unit of basic computer

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 A Hard-wired Control consists of two decoders, a sequence counter, and a number of

logic gates.
 An instruction fetched from the memory unit is placed in the instruction register (IR).
 The component of an instruction register includes; I bit, the operation code, and bits 0
through 11.
 The operation code in bits 12 through 14 are coded with a 3 x 8 decoder.
 The outputs of the decoder are designated by the symbols D0 through D7.
 The operation code at bit 15 is transferred to a flip-flop designated by the symbol I.
 The operation codes from Bits 0 through 11 are applied to the control logic gates.
 The Sequence counter (SC) can count in binary from 0 through 15.

Micro-programmed Control

It is implemented by using programming approach. A sequence of micro operations is carried

out by executing a program consisting of micro-instructions. In this organization any
modifications or changes can be done by updating the micro program in the control memory
by the programmer.

Figure: Micro-programmed control unit of a basic computer

o The Control memory address register specifies the address of the micro-instruction.
o The Control memory is assumed to be a ROM, within which all control information is
permanently stored.
o The control register holds the microinstruction fetched from the memory.
o The micro-instruction contains a control word that specifies one or more micro-
operations for the data processor.
o While the micro-operations are being executed, the next address is computed in the
next address generator circuit and then transferred into the control address register to
read the next microinstruction.
o The next address generator is often referred to as a micro-program sequencer, as it
determines the address sequence that is read from control memory.

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Difference between Hardwired Control and Micro-programmed Control

Hardwired Control Micro-programmed Control
Technology is circuit based. Technology is software based.
It is implemented through flip-flops, Microinstructions generate signals to control the
gates, decoders etc. execution of instructions.
Variable instruction format (16-64 bits per
Fixed instruction format.
instruction).
Instructions are register based. Instructions are not register based.
ROM is not used. ROM is used.
It is used in RISC. It is used in CISC.
Faster decoding. Slower decoding.
Difficult to modify. Easily modified.
Chip area is less. Chip area is large.

Computer Arithmetic (Adder, Subtractor, Divider, and Multiplicator)

Arithmetic instructions in digital computers manipulate data to produce results

necessary for the solutions of computational problems. These instructions perform
arithmetic calculations and are responsible for the bulk of activity involved in
processing data in a computer.

• The four basic arithmetic operations are addition, subtraction, multiplication and
division.
• From these four basic operations, it is possible to formulate other arithmetic
functions and solve problems by means of numerical analysis methods.
• An arithmetic instruction may specify binary or decimal data, and in each case the
data may be in fixed-point or floating point form.
• Negative numbers may be in signed magnitude or signed compliment
representation.
• Fixed point numbers may represent integers or fractions.

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Timing Signal

-Generated by 4-bit sequence counter and 4*16 decoder

- Sequence counter (SC) can be incremented or decremented
Example: T0, T1, T2, T3, T4, T0, T1, . . .
Assume At time T4, SC is cleared to 0 if decoder output D3 is active

Fig: Example of timing signal

Micro-Instruction and Micro-Operation Format

Fig: Microinstruction format (20 bits)

F1, F2, F3 : Micro-operation Field, each field 3-bits

CD : Condition For Branching, 2-bit field
BR : Branch Field, 2-bit field
AD : Address Field, 7-bit field

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Symbolic Microinstructions

It is possible to create a symbolic language for microcode that is machine-translatable

to binary code. Each line defines a symbolic microinstruction with each column
defining one of five fields:
 Each line of the assembly language microprogram defines a symbolic
microinstruction.
 Each symbolic microinstruction is divided into five fields: label, microoperations,
CD, BR, and AD. The fields specify the following Table
1 Label The label field may be empty or it may specify a symbolic address. A
label is terminated with a colon (:).
2 Microo It consists of one, two, or three symbols, separated by commas. There
peratio may be no more than one symbol from each F field (F1,F2 and F3). The
ns NOP symbol is used when the microinstruction has no microoperations.
This will be translated by the assembler to nine zeros.
3 CD The CD field has one of the letters U, I, S, or Z.
4 BR The BR field contains one of the four symbols: JMP, CAL,RET and MAP

5 AD The AD field specifies a value for the address field of the

microinstruction in one of three possible ways:
1. With a symbolic address, this must also appear as a label.
2. With the symbol NEXT to designate the next address in
sequence.
3. When the BR field contains a RET or MAP symbol, the AD field is
left empty and is converted to seven zeros by the assembler.

Label - Either blank or a name followed by a colon (indicates a potential branch)

Microoperations - One, Two, Three Symbols, separated by commas (indicates that the
micro operation being performed). Symbols and Binary code for Microinstruction Fields
are shown in table: 1.1

CD - Either U, I, S or Z (indicates condition)

The CD (condition) field consists of two bits which are encoded to specify four status
bits condition as shown below:

Table: Condition field

CD Condition Symbol Comments
00 Always=1 U Unconditional Branch
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01 DR(15) I Indirect address bit
10 AC(15) S Sign bit of AC
11 AC=0 Z Zero value in AC

BR - The BR (branch) field consists of two bits. It is used, in conjunction with the
address field AD, to choose the address of the next microinstruction shown below:

Table: Branch Field

CAR: Control
Address Register

AD - A Symbolic Address, NEXT (address), RET, MAP (both of these last two converted
to zeros by the assembler) (indicates the address of the next microinstruction)

The pseudo instruction ORG is used to define the first instruction (or origin) of a micro
program, e.g., ORG 0 begins at 0000000.

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Symbols and Binary code for Microinstruction Fields:

Table 1.1: Symbols and Binary code for Microinstruction Fields

As an example, a microinstruction can specify two simultaneous micro-operations

from F2 and F3 and none from F1.

DR ←M [AR] with F2 = 100

PC ←PC + 1 with F3 = 101

The nine bits of the micro-operation fields will then be 000 100 101.

Symbolic Micro-program
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 A sequence of microinstructions constitutes a micro-program.

 Since alterations of the micro-program are not needed once the control unit is
in operation, the control memory can be a read-only memory (ROM).
 ROM words are made permanent during the hardware production of the unit.
 The use of a micro program involves placing all control variables in words of
ROM for use by the control unit through successive read operations.
 The content of the word in ROM at a given address specifies a microinstruction.

Binary Micro-Program
The symbolic micro-program is a convenient way for writing micro-programs in a way
that people can read and understand, but this is not the way that the micro-program is
stored in memory. The symbolic micro-program must be translated to binary either by
means of an assembler program or by the user if the microprogram is simple enough.
For example simple binary microinstructions are shown in below table:

The equivalent binary form of the microprograms is shown in the above table. The
addresses for control memory are given in both decimal and binary. The binary
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content of each microinstruction is derived from the symbols and their equivalent
binary values from table 1.1 which is given above.
Notes:
1. Address 3 has no equivalent in the symbolic microprogram since the ADD
routine has only three microinstructions at addresses 0, 1, and 2. The next
routine starts at address 4.
2. Even though address 3 is not used, some binary value must be specified for each
word in control memory. We could have specified all 0's in the word since this
location will never be used. However; if some unforeseen error occurs, or if a
noise signal sets CAR to the value of 3, it will be wise to jump to address 64,
which is the beginning of the fetch routine.

Register Organization

Registers are the smaller and the fastest accessible memory units in the central
processing unit (CPU). According to memory hierarchy, the registers in the processor,
function a level above the main memory and cache memory. The registers used by the
central unit are also called as processor registers.

A register can hold the instruction, address location, or operands. Sometimes, the
instruction has register as a part of itself.

Types of Register

User Visible Register Control and status Register

General Purpose Register Program Counter

Data Register Instruction Register

Address Register Memory Address Register

Conditional Code
Memory Buffer Register

Register organization is the arrangement of the registers in the processor. The

processor designers decide the organization of the registers in a processor. Different
processors may have different register organization. Depending on the roles played by
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the registers they can be categorized into two types, user-visible register and control
and status register.

Register Stack and Memory Stack

Stack is a storage structure that stores information in such a way that the last item
stored is the first item retrieved. It is based on the principle of LIFO (Last-in-first-out).
The stack in digital computers is a group of memory locations with a register that holds
the address of top of element. This register that holds the address of top of element of
the stack is called Stack Pointer.
The two operations of a stack are: * The two operations of a stack are the
1. Push: Inserts an item on top of stack. insertion and deletion of items.
2. Pop: Deletes an item from top of stack. However, nothing is pushed or popped
in a computer stack. These operations
Implementation of Stack are simulated by incrementing or
In digital computers, stack can be implemented in two decrementing
ways: the stack pointer
1. Register Stack register.
2. Memory Stack

Register Stack

A stack can be organized as a collection of finite number of registers that are used to
store temporary information during the execution of a program.
A stack can be placed in a portion of a large memory or it can be organized as a
collection of a finite number of memory words or registers. The stack pointer register
(SP) contains a binary number whose value is equal to the address of the word that is
currently on top of the stack. Three items are placed in the stack: A, B, and C, in that
order. Item C is on top of the stack so that the content of SP is now 3.

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Fig: Block diagram of 64 bit stack

 To remove the top item, the stack is popped by reading the memory word at address 3 and
decrementing the content of SP.
 Item B is now on top of the stack since SP holds address 2. To insert a new item, the stack is
pushed by incrementing SP and writing a word in the next-higher location in the stack. Note
that item C has been read out but not physically removed.
 This does not matter because when the stack is pushed, a new item is written in its place. In
a 64-word stack, the stack pointer contains 6 bits because 26 = 64.
 Since SP has only six bits, it cannot exceed a number greater than 63 (111111 in binary).
When 63 is incremented by 1, the result is 0 since 111111 + 1 = 1000000 in binary, but SP can
accommodate only the six least significant bits.
 Similarly, when 000000 is decremented by 1, the result is 111111. The one-bit register FULL
is set to 1 when the stack is full, and the one-bit register EMTY is set to 1 when the stack is
empty of items. DR is the data register that holds the binary data to be written into or read
out of the stack.
 Initially, SP is cleared to 0, EMTY is set to 1, and FULL is cleared to 0, so that SP points to the
word at address 0 and the stack is marked empty and not full. If the stack is not full (if FULL =
0), a new item is inserted with a push operation.
 The push operation is implemented with the following sequence of microoperations;

SP ← SP + 1 Increment stack pointer

M[SP] ← DR Write item on top of the stack
If (SP = 0) then (FULL ←1) Check if stack is full
EMTY ← 0 Mark the stack not empty

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 The stack pointer is incremented so that it points to the address of the next-higher word. A
memory write operation inserts the word from DR into the top of the stack. Note that SP
holds the address of the top of the stack and that M[SP] denotes the memory word specified
by the address presently available in SP.

 The first item stored in the stack is at address L The last item is stored at address 0.
 If SP reaches 0, the stack is full of items, so FULL is set to L This condition is reached if the top
item prior to the last push was in location 63 and, after incrementing SP, the last item is
stored in location 0.
 Once an item is stored in location 0, there are no more empty registers in the stack. If an item
is written in the stack, obviously the stack cannot be empty, so EMTY is cleared to 0.
 A new item is deleted from the stack if the stack is not empty (if EMTY = 0). The pop
operation consists of the following sequence of microoperations:

DR ← M[SP] Read item from the top of stack

SP ← SP - 1 Decrement stack pointer
If (SP = 0) then (EMTY ← 1) Check if stack is empty
FULL ← 0 Mark the stack not full
 The top item is read from the stack into DR . The stack pointer is then decremented. If its
value reaches zero, the stack is empty, so EMTY is set to 1.
 This condition is reached if the item read was in location 1. Once this item is read out, SP is
decremented and reaches the value 0, which is the initial value of SP. Note that if a pop
operation reads the item from location 0 and then SP is decremented, SP changes to 111111,
which is equivalent to decimal 63.

Memory Stack
A stack can be implemented in a random access memory (RAM) attached to a CPU.
The implementation of a stack in the CPU is done by assigning a portion of memory to
a stack operation and using a processor register as a stack pointer. The starting
memory location of the stack is specified by the processor register as stack pointer.

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Fig: Computer memory with program, data and stack

 The stack pointer SP points at the top of the stack. The three registers are connected to a
common address bus, and either one can provide an address for memory.
 PC is used during the fetch phase to read an instruction. AR is used during the execute phase
to read an operand.
 SP is used to push or pop items into or the stack. As shown in Fig, the initial value of SP is
4001 and the stack grows with decreasing addresses.
 Thus the first item stored in the stack is at address 4000, the second item is stored at address
3999, and the last address that can be used for the stack Is 3000.
 No provisions are available for stack limit checks.
 We assume that the items in the stack communicate with a data register DR. A new item is
inserted with the push operation as follows:

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 SP ← SP - 1
 M[SP] ← DR

 The stack pointer is decremented so that it points at the address of the next word. A memory
write operation inserts the word from DR into the top of the stack. A new item is deleted with
a pop operation as follows:

 DR ← M[SP]
 SP ← SP + 1
 The top item is read from the stack into DR. The stack pointer is then incremented to point at
the next item in the stack.
 Most computers do not provide hardware to check for stack overflow (full stack) or
underflow (empty stack).
 The stack limits can be checked by using two processor registers: one to hold the upper limit
(3000 in this case), and the other to hold the lower limit (4001 in this case).
 After a push operation SP is compared with the upper-limit register and after a pop
operation, SP is compared with the lower-limit register.
 The two microoperations needed for either the push or pop are
o an access to memory through SP, and
o Updating SP.
Which of the two microoperations is done first and whether SP is updated by
incrementing or decrementing depends on the organization of the stack.
 The advantage of a memory stack is that the CPU can refer to it without having to specify an
address, since the address is always available and automatically updated in the stack pointer.

Data transfer and Manipulation

Most instructions can be classified into three categories:
1. Data transfer instructions
2. Data manipulation instructions
3. Program control instructions

1. Data transfer
- Data transfer instruction cause transfer of data from one location to another
without changing the binary information.
- The most common transfers are between memory and processor registers,
between processor registers and input or output, and between the processor
registers themselves.
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- Typical data transfer instructions are:

2. Data manipulation
- Data manipulation instructions are those that perform arithmetic, logic ,shift
operation
- Operation on data provides the computational capabilities for computers
- Data manipulation instructions are divided into three basic types
1. Arithmetic Instructions
2. Logical and bit manipulation instructions
3. Shift instructions
2.1 Arithmetic Instructions

2.2 Logical and bit manipulation instructions

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2.3 Shift Instructions:

3. Program control instructions

The program control instructions provide decision making capabilities and
change the path taken by the program when executed in computer. These instructions
specify condition for altering the content of the program counter. Some typical
program control instructions are:

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Introduction to RISC and CISC

RISC (Reduced Instruction Set Computer)

A reduced instruction set computer is a computer that only uses simple commands
that can be divided into several instructions that achieve low-level operation within a
single CLK cycle, as its name proposes “Reduced Instruction Set”. They can execute
their instructions very fast because instructions are very small and simple. RISC chips
require fewer transistors which make them cheaper to design and produce. Most
commands are completed in one machine cycle. This pipelining is a crucial technique
used to speed up RISC machines.
RISC (Reduced Instruction Set Computer) is used in portable devices due to its power
efficiency. For Example, Apple iPod and Nintendo DS. It has a high performance
advantage over CISC.

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CISC (Complex Instruction Set Computer)

The term CISC stands for ‘’Complex Instruction Set Computer’’. It is a CPU design plan
based on single commands. It contains large number of complex instructions. And
these Instructions cannot be completed in one machine cycle. In this instructions are
not register based. Also they have variable instruction formats. Data transfer is from
memory to memory. In CISC, instruction pipelining is not easily implemented.

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Difference between CISC and RISC:

Architectural Complex Instruction Set Reduced Instruction Set Computer
Characteristics Computer (CISC) (RISC)

CISC stands for Complex RISC stands for Reduced Instruction

Full Form
Instruction Set Computer. Set Computer.
Large set of instructions with
Instruction size and Small set of instructions with fixed
variable formats (16-64 bits per
format format (32 bit).
instruction).
Data transfer Memory to memory. Register to register.
Most micro coded using control
Mostly hardwired without control
CPU control memory (ROM) but modern
memory.
CISC use hardwired control.
Instruction type Not register based instructions. Register based instructions.
Memory access More memory access. Less memory access.
Clocks Includes multi-clocks. Includes single clock.
Instruction nature Instructions are complex. Instructions are reduced and simple.
Execution time Execution time is extremely high Execution time is very less
Decoding of instructions is The decoding of instructions is
Decoding
complex simple.
Uses CISC architecture is used in low- RISC architecture is used in high-end
end applications such as applications such as video
security systems, home processing, telecommunications, and

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automation, etc. image processing.

Problems:
1. Define the different ways to design the control unit of basic computer.
2. Differentiate between Hardwired Control and micro-programmed control.
3. What is register? Explain the types of registers.
4. Write the difference between CISC and RISC architecture.
5. What is stack? Explain the methods of implementation of the stack in digital
computers.
6. Define:
i. symbolic micro- program
ii. symbolic microinstructions
iii. Binary micro-program
iv. RISC
v. CISC

- End of Unit 4 -

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