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Index
No Topic Pg no. 1 Basic Logic Gates Implementation 3 2 NAND and NOR as Universal Gates 6 3 Boolean Expression Simplification 11 and Circuit Design 4 Half Adder and Full Adder Design 13 5 Design of a 2-Bit Magnitude 16 Comparator 6 Memory Simulation: RAM Module 19
2 1. Basic Logic Gates Implementation o Design and simulate basic logic gates (AND, OR, NOT) using Logisim. o Verify the truth tables for each gate using different input combinations.
Ans: AND Gate: Logic Diagram
Truth Table
Input Output A B C X = (A . B . C) 0 0 0 0 0 0 1 0 0 1 0 0 0 1 1 0 1 0 0 0 1 0 1 0 1 1 0 0 1 1 1 1
The AND gate produces the AND logic function.
3 The output is 1 if input A, input B and Input C equal to 1; otherwise the output is 0. The boolean expression for a 3-input AND gate is: X = (A . B . C). The algebraic symbol of the OR function is “ . ” , similar to arithmetic multiplication.
OR Gate: Logic Diagram
Trut h Table
Input Output A B C X = (A + B + C) 0 0 0 0 0 0 1 1 0 1 0 1 0 1 1 1 1 0 0 1 1 0 1 1 1 1 0 1 1 1 1 1
The OR gate produces the OR logic function.
4 The output is 0 if input A, input B and Input C equal to 0; otherwise the output is 1. The boolean expression for a 3-input OR gate is: X = (A + B + C). The algebraic symbol of the OR function is “ + ” , similar to arithmetic addition. Not Gate:
Logic Diagram
Tru th Table
Input Output A X = (A’) 0 1 1 0
The Not gate produces the logic function.
The output is 0 if input A equal to 1 and output is 1 if input A equal to 0. A NOT gate, regardless of the number of inputs, inverts the input. The boolean expression for OR gate is: X = (A’).
2. NAND and NOR as Universal Gates
5 o Implement and simulate NAND and NOR gates as universal gates. o Construct AND, OR, and NOT gates using only NAND and NOR gates. Ans: NAND Gate: Logic Diagram
Truth Table
Input Output A B C X = ( A . B . C) 0 0 0 1 0 0 1 1 0 1 0 1 0 1 1 1 1 0 0 1 1 0 1 1 1 1 0 1 1 1 1 0
A NOT-AND operation is known as NAND
operation. The NAND function is the complement of the AND function.
6 The NAND or “Not AND” function is a combination of the two separate logical functions, the AND function and the NOT function in series. The boolean expression for a 3-input AND gate is: X = ( A . B . C) . It produces a 0 output when all of the inputs are 1; otherwise the output is 1 . NAND gate also called as derived gate or Universal gate.
NOR Gate: Logic Diagram
Truth Table Input Output A B C X = ( A+ B+C ) 0 0 0 1 0 0 1 0 0 1 0 0 0 1 1 0 1 0 0 0 1 0 1 0 1 1 0 0 1 1 1 0
7 A NOT-OR operation is known as NOR operation. The NOR function is the complement of the OR function. The NOR or “Not OR” function is a combination of the two separate logical functions, the OR function and the NOT function in series. The boolean expression for a 3-input AND gate is: X = ( A+ B+C ) . It produces a 0 output when any or all of the inputs are 1 and 1 output when all the inputs are 0. NOR gate also called as derived gate or Universal gate.
I. And gate using NAND gate
Logic Diagram
Truth Table Input Output A B ( A . B) X = (A . B) 0 0 1 0 0 1 1 0 1 0 1 0 1 1 0 1
8 The And gate using NAND gate function is the complement of the NAND function. It produces a 1 output when all of the inputs are 1; otherwise the output is 0. The boolean expression is : X = (A . B).
II. OR gate using NAND gate
Logic Diagram
Truth Table
Input Output A B ( A+ B) X = (A + B) 0 0 1 0 0 1 0 1 1 0 0 1 1 1 0 1
The Or gate using NAND gate function is the
complement of the NOR function.
9 It produces a 0 output when all of the inputs are 0; otherwise the output is 1. The boolean expression is : X = (A + B).
III. Not gate using NOR gate
Logic Diagram
Truth Table Input Output A X = (A’) 0 1 1 0
The NOR gate then simply inverts the single
input, effectively acting as a NOT gate. When the input is 0 the output will be 1 and vice versa. The boolean expression is : X = (A’).
10 3. Boolean Expression Simplification and Circuit Design o Simplify a given Boolean expression using Boolean algebra. o Design and simulate the simplified logic circuit in Logisim.
12 o Design and simulate a half adder circuit using basic logic gates. o Expand the design to simulate a full adder and test it with all possible input combinations.
Ans: Half Adder: Logic Diagram
Truth Table
Input Output A B SUM CARR Y 0 0 0 0 0 1 1 0 1 0 1 0 1 1 0 1
13 Half adder is a combinational logic circuit with two inputs and two outputs. This circuit has two outputs carry and sum. The Carry output is 0 unless both the inputs are 1. Half Adder Produce sum of two variables and carry value which are those binary digit. Then the Boolean expression for a half adder is ⦁ For the SUM bit: SUM = A XOR B = A ⊕ B as follows. ⦁ For the CARRY bit: CARRY = A AND B = A.B
Full Adder: Logic Diagram
Truth Table 14 Input Output A B CARR SUM CARRY Y IN OUT 0 0 0 0 0 0 0 1 1 0 0 1 0 1 0 0 1 1 0 1 1 0 0 1 0 1 0 1 0 1 1 1 0 0 1 1 1 1 1 1
A full adder is a logical circuit that performs an
addition operation on three one-bit binary numbers. It is a three input and two output combinational circuit. The full adder is used to add three 1-bit binary numbers A, B, and carry C. The full adder has three input states and two output states i.e., sum and carry. The Boolean expression for a full adder is as ⦁ For the SUM bit: SUM = (A XOR B) XOR follows. CARRY IN = (A ⊕ B) ⊕ CARRY IN ⦁ For the CARRY OUT bit: CARRY OUT = A AND B OR CARRY IN (A XOR B) = A.B + CARRY IN(A ⊕ B) The main difference between the Full Adder and Half Adder is that a full adder has three inputs. The same two single bit data inputs A and B as before plus an additional CARRY IN input to receive the carry from a previous stage.
15 5. Design of a 2-Bit Magnitude Comparator o Implement and simulate a 2-bit magnitude comparator using logic gates. o Test the circuit with different pairs of binary inputs to verify the comparison results.
A comparator used to compare two binary numbers each of two bits is called a 2-bit Magnitude comparator. A 2-bit magnitude comparator is a digital circuit that compares two 2-bit binary numbers, A and B, and produces three output signals. To implement this 2-bit magnitude comparator, we can use basic logic gates: AND, OR, and NOT gates.
17 Inputs and Outputs: Inputs:
A1, A0: Two bits representing the binary
number A B1, B0: Two bits representing the binary number B Outputs: A > B: This output is 1 when A is greater than B, otherwise 0. A = B: This output is 1 when A is equal to B, otherwise 0. A < B: This output is 1 when A is less than B, otherwise 0.
Testing the Circuit:
We can test the circuit by applying different pairs of binary inputs and observing the outputs: 1.A = 00, B = 00: A = B should be 1. 2.A = 00, B = 01: A < B should be 1. 3.A = 01, B = 00: A > B should be 1. 4.A = 01, B = 01: A = B should be 1. 5.A = 10, B = 11: A < B should be 1. 6.A = 11, B = 10: A > B should be 1. By testing all possible input combinations, we can ensure the correct functionality of the 2-bit magnitude comparator.
18 6. Memory Simulation: RAM Module o Design and simulate a simple RAM module in Logisim. o Test read and write operations to the RAM module with different addresses.
Ans: Logic Diagram
The following function table
specifies the operations of a 128 * 8 RAM chip
CS CS R W Memory State of 1 2 D R Function data bus 0 0 x x Inhibit High- impedance 0 1 x x Inhibit High- impedance 1 0 0 0 Inhibit High- impedance 1 0 0 1 Write Input data
19 to RAM 1 0 1 x Read Output data to RAM 1 1 x X Inhibit High- impedance
