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Understanding the LLC Structure in Resonant Applications

Understanding the LLC Structure in Resonant Applications

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tran
Copyright
© © All Rights Reserved
Available Formats
Download as PDF, TXT or read online on Scribd
0% found this document useful (0 votes)
28 views

Understanding the LLC Structure in Resonant Applications

Understanding the LLC Structure in Resonant Applications

Uploaded by

tran
Copyright
© © All Rights Reserved
Available Formats
Download as PDF, TXT or read online on Scribd
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ON Semiconductor

Is Now

To learn more about onsemi™, please visit our website at


www.onsemi.com

onsemi and and other names, marks, and brands are registered and/or common law trademarks of Semiconductor Components Industries, LLC dba “onsemi” or its affiliates and/or
subsidiaries in the United States and/or other countries. onsemi owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of onsemi
product/patent coverage may be accessed at www.onsemi.com/site/pdf/Patent-Marking.pdf. onsemi reserves the right to make changes at any time to any products or information herein, without
notice. The information herein is provided “as-is” and onsemi makes no warranty, representation or guarantee regarding the accuracy of the information, product features, availability, functionality,
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AND8311/D

Understanding the LLC


Structure in Resonant
Applications
Prepared By: Christophe Basso http://onsemi.com
ON Semiconductor

The resonant LLC topology, member of the Series understand the resonant structure alone, object of the present
Resonant Converters (SRC) begins to be widely used in application note.
consumer applications such as LCD TVs or plasma display
panels. In these applications, a high level of safety and The LLC converter
reliability is required to avoid catastrophic failures once The LLC converter implies the series association of two
products are shipped and operated in the consumer field. To inductors (LL) and one capacitor (C). Figure 1 shows a
face these new challenges, ON Semiconductor has recently simplified representation of the resonant circuit where:
released to new controllers, the NCP1395 (low-voltage) and Ls is the series inductor
the NCP1396 (high-voltage) dedicated to driving resonant Lm is the magnetizing inductor
power supplies, usually of LLC type. However, before Cs represents the series capacitor
rushing to design a converter of this type, it is important to

ÏÏÏÏÏÏÏÏÏÏ
ÏÏÏÏÏÏÏÏÏÏ Vbulk

ÏÏÏÏÏÏÏÏÏÏ
ÏÏÏÏÏÏÏÏÏÏ
ÏÏÏÏÏÏÏÏÏÏ
ÏÏÏÏÏÏÏÏÏÏ
ÎÎÎÎÎÎÎÎÎÎ
ÏÏÏÏÏÏÏÏÏÏ ÏÏÏÏÏÏÏÏÏÏ
Vbulk

ÏÏÏÏÏÏÏÏÏÏ
ÎÎÎÎÎÎÎÎÎÎ ÏÏÏÏÏÏÏÏÏÏ
ÏÏÏÏÏÏÏÏÏÏ
ÎÎÎÎÎÎÎÎÎÎ ÏÏÏÏÏÏÏÏÏÏ
0
QA

ÏÏÏÏÏÏÏÏÏÏ
ÎÎÎÎÎÎÎÎÎÎ
ÏÏÏÏÏÏÏÏÏÏ
ÎÎÎÎÎÎÎÎÎÎ
ÏÏÏÏÏÏÏÏÏÏ
ÎÎÎÎÎÎÎÎÎÎ
HB
N:1 D1
Vout

ÏÏÏÏÏÏÏÏÏÏ
ÎÎÎÎÎÎÎÎÎÎ
ÏÏÏÏÏÏÏÏÏÏ
ÎÎÎÎÎÎÎÎÎÎ QB +

ÏÏÏÏÏÏÏÏÏÏ
ÎÎÎÎÎÎÎÎÎÎ
Lm
Rload
Cout

ÎÎÎÎÎÎÎÎÎ
CS D2

ÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎ
Figure 1. The LLC Topology Uses a Half-Bridge Configuration to Drive the Resonant Circuit

© Semiconductor Components Industries, LLC, 2008 1 Publication Order Number:


January, 2008 - Rev. 0 AND8311/D
AND8311/D

The operating principle is rather simple: a constant 50% associated with leaky transformers (radiated noise) has to be
duty-cycle switching pattern drives QA - QB gates and a kept in mind when selecting the final configuration.
high-voltage square wave appears on node HB. By When studying the resonant converter, it is convenient to
adjusting the switching frequency, the controller can control reduce the architecture to a passive element arrangement
the power flow depending on the output demand. As a such as presented on Figure 2. The high-voltage square
transformer is needed for isolation purposes, its magnetizing signal is replaced by its fundamental content thanks to the
inductance plays the role of the second inductor Lm. The first harmonic approximation (the so-called FHA in the
series inductor, Ls, can either be a separated element or literature): because we operate a tuned LC filter, all
physically lump into the transformer. In this case, a harmonics can be considered as rejected and only the
voluntary degradation of both primary and secondary fundamental passes through. Of course, this statement holds
coupling naturally increases the leakage inductance which as long the controller drives the resonating work in the
can act as the series element. There are pros and cons to vicinity of its resonant frequency. Figure 2 offers such a
include the leakage element in the transformer. The cost and simplified representation of the resonant cell, actually
the absence of saturation play in favor of the integration but pointing out a series impedance (Ls and Cs) with a parallel
the difficulty to keep a precise value from lots to lots impedance (Lm and the reflected load).

Figure 2. The Impedance Representation Makes the LCC Operation Easier to Understand

Depending on the loading, the network resonant frequency • RL = ∞, light or no load condition, Lm appears in series
varies between two different values: with Ls and the whole network resonates to
• RL = 0, short-circuit, Lm disappears and Zseries 1
becomes a short. The series resonant point for Zseries is F min +
thus 2p ǸǒLS ) LmǓCS (eq. 2)

F max + F S +
1 • 0 < RL < ∞, the resonance which combines Lm and Ls ,
(eq. 1)
2p ǸL SC S shifts depending on the total quality coefficient.

At Fsw = FS, Zseries becomes a short and the ac transfer


function drops to 1 or 0 dB.

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AND8311/D

Lm = 600 mH
24.0 LS = 100 mH
Vout = 24 V Pout = 10 W, Q = 60
CS = 33 nF
N=8
Pout = 50 W, Q = 13

12.0
Pout = 100 W, Q = 6.7

V out(s)
20log 10  dB Pout = 200 W, Q = 3
V in(s)
0

Pout = 300 W, Q = 2
-12.0

-24.0

10k 20k FREQUENCY (Hz) 50k 200k


1 1
F min + F max + F S
2p ǸL S ) Lm)CS 2p ǸLSC S
Figure 3. The AC Response of Figure 2 Circuit with Various Load Conditions

This is actually what Figure 3 plots suggest by showing the ac transfer function of Figure 2 as the load changes.
If we now study the impedance seen from the half-bridge node, we have an expression showing a series association of
inductors and a capacitor. Sticking to Figure 2 sketch and writing the impedance seen between ground and Node 3, we have:
Z in + Z L ) Z C ) Z L ŦR ac (eq. 3)
S S in

ƪ Ǔƫ
2

ǒ
4 2
(wL m) R ac 2 1 R ac2
Z in + ) wL S * ) wL m (eq. 4)
ǒR ac
2 wC S R ac 2 ) w2L m 2
2 ) w 2L m Ǔ
2

In the low frequency portion, the terms associated with inductors are of less importance and Cs dominates. The impedance
is thus capacitive. As the frequency increases, the inductive portion starts to kick-in and the impedance goes up. This is what
Figure 4 describes. As one can see, all the curves go through point A whose value is independent from the resistive loading.
For the sake of a friendly exercise, we can solve Equation 4 with two different Rac values and find the frequency at which input
impedances equal. We obtain:
wA + ǸL Cm S ) 2L SC S
2
(eq. 5)

If we substitute this value into Equation 4, the impedance at point A is:


Lm

2L
L Sw S
S
ZA +
Ǹ
(eq. 6)
Lm
)1
2L
S
If we define the ratio R by Lm/Ls, we can re-arrange equation 6:

ZA +
Ǹ2(R ) 2)
R
Ǹ LS
CS
+
R
Ǹ2(R ) 2)
ZO (eq. 7)

Where Z0 represents the characteristic impedance of the series resonant network. Using the numerical values noted in the
graphs, we obtain a frequency of 43.8 kHz and an impedance of 38.3 dBW (82.6 W).

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AND8311/D

5
1
2
3
4

62.0
Inductive Region

Capacitive Region Pout = 300 W, Q = 2


50.0

38.0
Pout = 100 W, Q = 6.7 A

Pout = 50 W, Q = 13
26.0 Pout = 200 W, Q = 3

Lm = 600 mH
dBW LS = 100 mH
Pout = 10 W, Q = 60 Vout = 24 V
14.0
CS = 33 nF
N=8

10k 20k FREQUENCY (Hz) 50k 200k


1
F min
2p ǸL S ) L in)C S
Figure 4. Impedance Plots at Various Power Levels

If we now observe the resonant current waveforms in a LLC body diode turns on first. Observing figure 3, the output
converter working below or above the series resonance Fs , level goes down as the frequency increases.
we have different types of operation: Most of the LLC converters operate in the inductive region
• Capacitive mode: in this mode, where the current leads for the second bullet reason. Also, given the feedback
the voltage, the bridge MOSFETs operate in zero polarity, if by mistake the closed-loop LLC enters the left
current switching (ZCS). ZCS means that power side of the resonance, the control law reverses and a power
MOSFETs are turned-off at zero current. Back to figure runaway obviously occurs. It is thus extremely important to
3, we can see that the output level goes up as the clamp down the lower frequency excursion in fault
frequency increases. condition or during the startup sequence to avoid falling on
• Inductive mode: in this mode, the current lags the the other slope of the characteristics.
voltage and the power switches are turned-on at zero The inductive region can be split into two other regions,
volt (ZVS), virtually eliminating all capacitive losses. depending where you operate compared to the resonant
This operating way implies that a certain delay exists series frequency Fs, as defined by Equation 1. Figure 5
before operating the concerned MOSFET so that its represents the classical set of curves often found in the
dedicated literature:

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AND8311/D

Region 2
4.00
Q = 10

Region 1
3.00

Q=5

2.00
Q=2

Q=1

1.00
1
2
3
4
5
0
Q = 0.5
Region 3

200m 600m 1.00 1.40 1.80


Vf/FS (V)
F sw < F s F sw = F s F sw > F s

Figure 5. Typical Transmittance Curves with Various Loading Conditions, Highlighting Three Distinct Regions

Region 3 is the capacitive mode where you do not want to 1 1


F max + F S + +
2p ǸL SC S Ǹ116m
operate since ZVS is a wanted feature for the power 6.28 28n
switches. In regions 1 and 2, you still have ZVS on the power
MOSFET's and the output diodes are operated in Zero + 88.3kHz
Current Switching (ZCS), cancelling all associated losses at 1
F min +
2p Ǹ(L S ) L m)C S
turn-off. Before discussing the benefits of a particular
solution, let us have a look at the various operating phases
the LLC converter is made of. 1
+ + 33kHz
6.28 Ǹ(116m ) 700m) 28n
Operating Waveforms Below the Series Resonance,
Fsw < Fs Fsw = 70 kHz at full load and nominal input voltage.
For this example, we have selected a set of elements which The converter delivers 24 V@10 A from a 380 Vdc input
operate the converter below the series resonance defined by source and a simulation has been performed using the above
Equation 1. The following value have been used: values. Figure 6 shows the main waveforms obtained from
Lm = 700 mH the simulator. Let us study the switching events step by step
Ls = 116 mH to learn about the LLC behavior in this region.
Cs = 28 nF
N=8

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AND8311/D

14.0
V V
GS,lower GS,upper

vgsl, vgsu in volts


10.0 23

Q is on Q is off

plot1
6.00 B B
Q is off DT Q is on
A A
2.00 Gate voltages
22
-2.00

V
4.00 400 HB
Resonant currents
ils, ilmag in amperes

vbridge in volts

2.00 300
I
mag
plot2

0 200
25
26
-2.00 100
I
L
-4.00 0 I =I 24
L mag

30.0
id(d3a), idiode in amperes

I
d,peak
20.0 I I
d2 d1
I
plot3

out
10.0
28
0 27

-10.0 Diode current


478u 482u 486u 490u 494u
time in seconds

Figure 6. Waveforms Obtained for a Converter Operated Below the Series Resonant Frequency

QA is off, QB is on, D2 is conducting : resonates to Fs as Lm is shorted. Figure 7 depicts the


The low-side MOSFET QB imposes a 0 V potential on the situation during this period of time.
half-bridge node and the current circulates from its drain to
source (first quadrant). The upper parasitic capacitor CossA QA is off, QB is on, D2 turns off:
is fully charged to the input voltage Vbulk since the HB node As the network current IL resonates in a sinusoidal
is grounded by QB. The secondary diode D2 is conducting manner, its amplitude peaks and then starts to dip towards 0.
and imposes a voltage reflection -NVout over the When it reaches a level equal to that of the magnetizing
magnetizing inductor Lm. Its current linearly decreases with current, no current circulates in the transformer anymore: D2
a slope of -NVout/Lin. As this inductor is dynamically blocks and the voltage reflection over Lm disappears. The
shorted by the voltage reflection, it does not participate to magnetizing inductor now comes back in series with Ls and
the on-going resonance between Ls and Cs which deliver the Cs and changes the resonant frequency from Fs to Fmin: the
output energy (the input source is out of the picture). The LLC converter is really a multi-resonant structure and the
current flowing into the transformer primary side (given its plateau - actually a small arch of a lower sinewave
theoretical representation, Lm associated to a perfect oscillation - in the current as it appears on figure 6 testifies
transformer) is the main current IL minus the magnetizing for it. Both diodes are now blocked and this moment lasts
current Imag. D1 is blocked and undergoes twice the output until QB opens. Figure 8 represents the circuit during this
voltage given the transformer coupling. The circuit time. As one can see, the output capacitor alone supplies the
energy to the load.

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AND8311/D

Vbulk Vbulk

QA Vbulk QA
CossA CossA
LS IL-Imag LS IL-Imag
Iout Vout Vout
N:1 D1 N:1 D1

Imag Iout Imag


VLm Vout VLm
IL IL

Lm + Lm +
QB QB
Vout
Imag
Imag

IL-Imag D2 Iout IL-Imag D2

IL CS IL CS
IL
IL IL

Figure 7. QA is Off, QB is On and Diode D2 Conducts Figure 8. QA is Off, QB is On and Diode D2 Blocked.
Current. Lm is Off the Picture as it is Dynamically Lm Comes Back Again in the Resonating Network
Shorted by the Output Voltage Reflection. and Changes the Resonant Frequency to Fmin.

QA is off, QB is Off, Both Secondary Diodes are reversing (Figure 9). At this moment, when the HB node
Blocked reaches Vbulk + Vf, the body-diode of QA conducts and
Both transistors are now open, this is the dead-time period ensures energy re-cycling through the input source
(DT on Figure 6). The dead-time is placed here to avoid (Figure 10). You understand that this dead-time period must
cross-conduction between both MOSFETs but also to favor last a time long enough to allow for the complete discharge
Zero Voltage Switching as we will see in a moment. Because of CossA before re-activating QA so that its body-diode
the current was circulating from drain to source in QB, the turns on first. If not, hard switching occurs and efficiency
circuit no longer sees an ohmic path when this transistor suffers.
opens. The current strives to find a way through the parasitic As currents are oscillating, a time is reached where IL and
drain-source capacitors Coss of both QA and QB: CossB starts Imag are no longer equal (end of the plateau) and a current
to charge (it was previously discharged by QB being on) and circulates again in the primary side. D1 starts to conduct and
given the rise of VHB towards the high voltage rail, CossA NVout appears across Lm :the resonant frequency goes back
sees its terminals voltage going down to zero and then from Fs to Fmin. Figure 10 describes this moment.

Vbulk Vbulk
The Voltage is Falling
CossA
QA Reaches (Vin + Vf) when
The Voltage is Rising
QA Body-Diode Conducts
Iout Vout QA Vout
LS N:1 D1 LS N:1 D1
Vf
IL IL
Imag VLm Imag VLm

Lm + Lm +

QB
CossB QB
CossB
Imag Imag
IL-Imag D2 D2
CS CS
IL IL
The Voltage is Rising

Figure 9. QA is Off, QB is Off. The Current Finds a Figure 10. QA and QB are Still Off. The Current Finds
Circulating Path Through Both Transistors Coss, a Circulating Path through the Upper-side Body
Both Secondary-Side Diodes are Off. Diode. D1 Starts Conducting at the End of the
Plateau when IL 0 Imag.

QA is on, QB is off, D1 is on can therefore safely turn it on and benefit from Zero Voltage
Now that QA body-diode is conducting, we have a Conditions. As we have a sinusoidal waveform in the
negligible voltage across its drain and source terminals: we network, the resonating current reaches zero and reverses.

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AND8311/D

Lm is still dynamically shorted as D1 is conducting. The Figure 6. At this point, no current circulates in the
energy is delivered by the source to the output load. This is transformer and D1 naturally blocks. As explained before,
illustrated by Figure 11. the magnetizing inductor re-appears in the circuit since the
output voltage reflection is gone. The resonant frequency
QA is on, QB is off, D1 turns off changes from Fmin to Fs and the energy to the load is
The current IL is moving down and reaches the delivered by the output capacitor alone. Figure 12 shows the
magnetizing current level, we are the second plateau on circuit state during this event.

Vbulk Vbulk

QA QA
+ IL-Imag N:1 Vout + Vout
D1 LS N:1
LS
IL IL
Imag Imag
VLm Vout VLm

Lm + Lm +

QB
CossB Vout
QB
CossB
Imag Imag
IL-Imag
D2
CS CS
IL IL

Figure 11. The Current is Now Flowing from the Figure 12. As Both Diodes are Off, the Network
Source to the Output Via the Upper-Side Includes the Magnetizing Inductance which
Transistor QA. Changes the Resonant Frequency.

QA is of, QB is off, both secondary diodes are blocked towards ground. The drain falls down in a resonating
At a certain time, both transistors block and only their manner, involving both Coss in parallel and the equivalent
drain-source capacitors remain in the circuit. The current inductor made of Ls + Lm. Figure 13 represents the circuit
keeps circulating in the same direction but CossA starts to during this event.
charge: the voltage on the HB node drops and CossB depletes

Vbulk Vbulk
The Voltage is Rising
CossA CossA
QA QA
The Voltage is Falling
+ Vout + Vout
LS N:1 D1 LS N:1 D1

IL IL
Imag VLm Imag VLm

Lm + Lm +

QB
CossB QB
Imag Imag
D2 D2
CS CS
IL IL

Figure 13. The Current is Still Flowing through the Figure 14. When the Voltage on the Node HB
Source and Contributes to Discharge CossB. Swings Below Ground, QB Body-Diode Conducts.

The bridge voltage further dips and becomes negative is not playing any role here. The controller now activates QB
until the body-diode of QB conducts. This is what Figure 14 in ZVS and the transistor conducts in its 3rd quadrant for a
suggests. At the end of the plateau, where IL = Imag, D2 will few moments, until the current reaches zero and swings
start conducting, reflecting -NVout over the primary negative: we are back at the beginning of the first phase.
inductance. The energy comes from Cs and Ls, as the source

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AND8311/D

Zero Voltage Switching


Figure 15 zooms on these ZVS events and show the turns-on at a Vf across its drain-source terminals but the
various signals in play. The MOSFET current starts to be current is still negative: we are in the 3rd quadrant
negative before the appearance of its gate-source bias: this conduction. Finally, the current becomes positive and flows
is the body-diode conduction period. Then the MOSFET from drain to source, back to the 1st quadrant.

400 V GS,lower 8
V HB
200
Vbridge (V)

I D,lower

0 6
2

Body 1st
-200
diode quadrant
3rd
-400 Q B quadrant

7
400 V GS,upper
9
V HB
200 I D,upper
Vbridge (V)

Body -200 1st


Diode quadrant

-400 3rd
Q A
quadrant
485u 488u 491u 494u 497u
TIME (s)

Figure 15. Simulation Results Zooming on the MOSFET Variables

ZVS A
V bridge
V gsB

V gsA

I L(t) ZVS B

Figure 16. Measured Signals on a Demonstration Board Showing the ZVS Operation on QA.

The selection of a controller where the dead-time is Zero Current Switching


adjustable therefore represents an important selection By the term ZCS, we assume a natural blocking event
argument to fine tune the behavior and ensure a minimum when the current in the semiconductor is zero. When
conduction period of both body-diodes. operating the LLC converter below Fs, as it is the case in this

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AND8311/D

example, both secondary-side diodes are operated in ZCS. resonating current IL. This is the plateau on figure 6.
The current in the concerned diode (D1 or D2) naturally Observing the diode current in this particular mode gives
reaches 0 when the magnetizing current Imag equals the main smooth signals as shown on Figure 17.

I
d
48.0 22.0 4.00
I -I
L mag

Diode blocks
24.0 11.0 2.00
here as I =0
d
idiodein amperes

iprim in amperes
vdiodein volts
Plot1

0 0 0 12
10

Both diodes

are blocked.

11
-24.0 -11.0 -2.00

The other diode

conducts, V = -2 V
-48.0 -22.0 -4.00 R out

484u 487u 490u 493u 495u


TIME (s)

Figure 17. The Secondary-Side Diodes are Naturally Blocked When the Primary Current Vanishes to Zero

Startup sequence and short-circuit differentiating the voltage across the capacitor Cs and
During startup or short-circuit, the magnetizing inductor routing the resulting voltage to a fast latch input. Figure 19
is shorted and the resonant frequency becomes Fs. Because shows this solution where the component values must be
we designed the LLC converter to operate at a frequency adjusted to avoid false triggering in normal operating
lower than Fs, the operating fault mode (lack of feedback) of transients.
the controller naturally lies below Fs. In other words, if the Reference [1] has experimented a solution where the
LLC converter quickly starts-up, without soft-start at all, resonating capacitor is split in two values - Cs/2 - and two
the controller will quickly sweep from a high frequency high voltage diodes clamp the voltage excursion between
value down to the minimum authorized in case of fault. The ground and the bulk rail. As the voltage across the capacitor
current in the network can therefore peak to a high value (at is limited, the resonant current is also clamped. The solution
resonance, the LC impedance is only limited by ohmic appears in Figure 20. There are several drawbacks
losses) and destroy the power MOSFETs instantaneously. associated to the usage of this diode arrangement such as a
Figure 18a shows an oscilloscope shot captured on a LLC variable clamping level in relationship to the high-voltage
circuit started with a short soft-start period (≈20 ms): the rail. However, experience shows that this simple circuit
current peaks to 6 A. Increasing the soft-start period to a few brings an efficient protection to the converter experiencing
hundred of milliseconds clearly helps to smooth the peak a short-circuit. The diodes must be of fast types, MUR260
and keep it below 4 A. can be selected for this purpose.
Short-circuit protection is more difficult to achieve given
the resonating nature of the circuit. Some solutions exist like

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AND8311/D

Imax = 6.2 A

Imax = 3.8 A

Css = 1 μF IL(t) Css = 10 μF IL(t)

a b

Figure 18. The LLC converter peaks to a high current if started too quickly. Increasing the soft-start sequence
naturally calms down the current excursion.

Vbulk

QA

LS N:1 D1
Vout

QB Lm
+
Rload
R15 C8 Cout
10k 100p D2
To Latch
Open
C4 R16 D2 R14 CS
10n 1k 1N4937 10k

Figure 19. Differentiating the Voltage Across the Resonant Capacitor Gives an Indication of the Current Flowing
Through it

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AND8311/D

Vbulk

QA
CS/2

LS N:1 D1
Vout

QB Lm
+
Rload
Cout
D2

CS/2

Figure 20. To Keep the Voltage Excursion on the Resonant Capacitor within Safe Limits, a Diode Network Forbids
any Lethal Runaways

Operating Waveforms Above the Series Resonance, secondary diode is always conducting. In other
Fsw > Fs words, a single resonance occurs in this mode at
For this example, we have selected a set of elements which full power, implying Ls and Cs only. Lm is out of
operate the converter above the series resonance defined by the picture as long as the converter operates in
equation 1. The following values have been used: continuous conduction mode (full load operation).
Lm = 1.2 mH 2. Observing Figure 21, we can see that the main
Ls = 200 mH resonant current IL changes from a sinusoidal
Cs = 44 nF waveshape to a straight line, implying a change in
N=6 the operating mode. This change occurs when a
1 1 voltage discontinuity appears across Ls terminals.
F max + F S + + This discontinuity comes from the delay between
2p ǸL SC S 6.28 Ǹ200m 44n the bridge signal VHB and the reflected voltage
+ 53.7kHz polarity across the magnetizing inductor Lm.
Figure 22 zooms on this particular moment where
1
F min + we can see that the bridge voltage goes down to
2p Ǹ(L S ) L m)C S zero via the body-diode activation of QB, but
1 because there is still current flowing in the
+ + 20kHz
6.28 Ǹ(200m ) 1.2m) 44n
transformer primary side (IL is different than Imag),
one of the secondary diode is still conducting,
Fsw = 70 kHz at full load and nominal input voltage. imposing a constant reflected output voltage
The converter still delivers 24 V@10 A from a 380 Vdc across Lm. The voltage across Ls is up by one step
input source and a simulation has been conducted using the which starts to reset it towards zero. This is the
above values. Figure 21 shows the main waveforms beginning of the linear segment, if we consider the
obtained from the simulator. There are several differences voltage across Ls almost constant. When IL
between this operating mode and the previous one: reaches the magnetizing current Imag, the
1. In the previous mode, the magnetizing inductance conducting diode blocks and the primary current
was released at a point where both secondary-side transitions to the second diode which now
diodes were blocked (IL = Imag). The resonant conducts. The voltage polarity across Lm reverses
frequency was therefore moved from Fs to Fmin and the resonant current goes back to its sinusoidal
during a certain time (the plateau on Figure 6). shape. The next segment occurs when QB opens
When operated above the series frequency Fs, the and the bridge voltage jumps to Vin via QA
magnetizing inductance is always shorted by the body-diode. This segment lasts until IL reaches
reflected voltage NVout or -NVout as one of the Imag again.

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AND8311/D

14.0 V GS,lower V GS,upper

vgsl,vgsuin volts
10.0 5
Q B is off

Plot1
Q B is on
6.00
DT
Q A is off Q A is on
2.00
6
-2.00 Gate voltages

4.00 400
ils,i(lmag)in amperes

Resonant currents
vbridge in volts

2.00 300 V HB
I mag
Plot2

0 200 9

-2.00 100 IL
8
-4.00 0 7
id(d3a),id(d3b)in amperes

35.0
Diode current
25.0 I d,peak
I d2 I d1
11
Plot3

15.0 I out

5.00
10
-5.00

473u 477u 481u 485u 490u


time in seconds

Figure 21. Figure 6 Waveforms Updated with a Converter now Operating Above the Series-Resonant Frequency
Fs

8.00 200 400 VL mag 15


vbridge in volts
ils in amperes

vprim in volts

4.00 100 300 ZVS


14
Plot2

0 0 200
IL s
-4.00 -100 100
V HB 19
0 S [( V
Lmag+ VC s ) L s
-8.00 -200

ZVS S [ ( V L + V bulk) L s
mag
14.0
vgsl,vgsuin volts

17
10.0
V GS,upper V GS,lower V GS,upper
Plot1

6.00

2.00
16
-2.00

800 + VC s
vls,vcapresoin volts

VL
mag
400 VC s
Plot3

0 21
7
-400 VL s
VL + V in
mag
-800

484u 487u 490u 494u 497u


time in seconds
Figure 22. The Voltage Discontinuity Across Ls Induces a Linear Segment in the Resonant Waveform

1. The diode are still operated in ZCS despite a (the segment on IL(t)) which smoothly leads the
switching frequency above Fs. This is thanks to the concerned diode to a blocking state. Figure 23
linear reset taking place on the resonant current illustrates this fact.

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AND8311/D

I
d
4.00 20.0 40.0
I -I
L mag

2.00 10.0 20.0

S [ (V L + VC s) L s 2
mag
idiodein amperes
iprimin amperes

vdiodein volts
Plot1

0 0 0 1

-2.00 -10.0 -20.0

-4.00 -20.0 -40.0 The other diode

conducts, V = -2 V
R out
3
481u 484u 487u 490u 493u
time in seconds

Figure 23. A Zoom on the Switching Diodes Reveal a ZCS Operation for Fsw greater than Fs

Operating Waveforms at the Series Resonance, Fsw = 1


F min +
2p Ǹ(L S ) L m)C S
Fs
For this final example, we have selected a set of elements
which operate the converter at the series resonance defined 1
+ + 28.2kHz
by Equation 1. The following values have been used: 6.28 Ǹ(277m ) 1.6m) 44n
Lm = 1.6 mH
Fsw = 73 kHz at full load and nominal input voltage.
Ls = 277 mH
When operated at the tank resonant frequency, the main
Cs = 17 nF
current IL(t) is sinusoidal as confirmed by Figure 24.
N=8
1 1
F max + F S + +
2p ǸL SC S 6.28 Ǹ277m 17n
+ 73.4kHz

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AND8311/D

16.0
Gate voltages

vgsu, vgsl in volts


12.0
V V 15

plot3
GS,upper GS,lower
8.00
Q is off Q is on
B B
4.00 DT
Q is on Q is off
A A
0 14

400 4.00
16
ils, i(lmag) in amperes
vbridge in volts

300 2.00
I
mag 17
plot1

200 0 20

I
100 -2.00 L I =I
I =I L mag
L mag V
HB
0 -4.00 Resonant currents
id(d3a), id(d3b) in amperes

20.0 I
d,peak
I I
d1 d2
10.0
I
plot2

out 19
0 18

-10.0

-20.0 Diode current


677u 681u 685u 688u 692u
time in seconds

Figure 24. At the Resonant Frequency, the Main Current is Sinusoidal. Also, There is no Deadtime Between the
Secondary-Side Diode Conduction Periods.

In this mode, the EMI signature is excellent as the 2I d.peak


I dc + (eq. 9)
distortion is least compared to the other modes. The p
secondary-side currents are at the boundary between the
segment-like shape and the dead-time period, as We can then evaluate the ac current flowing into the output
respectively observed for Fsw > Fs and Fsw < Fs. As we capacitor applying the following equation:
observed before, the diode block when the resonant current
equal the magnetizing current Imag. I Cou.RMS + ǸI2RMS * I2dc + Ǹ I2
peak
2
*
4I 2
d.peak
p2
(eq. 10)
[ 0.3I d.peak
Operating the LLC at the series resonant frequency offers
another advantage. Back to Figure 3, we can see a point In the simulated example, if we have a diode peak current of
where all curves cross. This point, for which Vout/Vin = 1, is 15.7 A at steady-state, the RMS current flowing in the
reached at the series resonance. When operated at this capacitor is therefore 4.7 A. If we simulate a similar
particular position, the LLC resonant network transfer converter in a 100 kHz 2-switch forward configuration, the
function becomes insensitive to load variations. This RMS current in the output capacitor reduces down to 0.5
characteristics is sometimes exploited when a LLC Arms. That is one of the major disadvantage of the resonant
converter is designed to operate at a fixed switching operation. The switching losses are almost removed,
frequency locked to Fs and the feedback loop drives the allowing high-frequency operation, but conduction losses
output voltage of a pre-converter. increase significantly.
The RMS current in the output capacitor is also at its
lowest value as no discontinuity, or deadtime, exists as Conclusion
shown on figure 6 for Fsw < Fs. We can quickly derive its This quick study of the LLC converter explores the
value in presence of sinusoidal signals: various operating modes of the power supply, mainly
dictated by the switching frequency value in relationship to
I d.peak
I d.RMS + (eq. 8) the series resonant frequency Fs. Most of LLC designs are
Ǹ2 operated at the series resonance in full load and nominal
input voltage conditions. The controller allows operation
The total dc current contributed by both diodes in the output
below Fs during an input voltage drop and lets the frequency
current delivered by the converter. This dc current can be
exceed Fs in light load conditions. Despite sinusoidal
linked to the equivalent full-wave rectification and equals:

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AND8311/D

currents, care must be taken in the selection of the output 2. Bo Yang, “Topology Investigation for Front-End
capacitor given the high ac ripple. Compared to dc-dc Power Conversion for Distributed Power
buck-derived applications, this is the penalty to pay with System”, Virginia Tech Dissertation, 2003”
LLC converters, however, largely compensated by the http://scholar.lib.vt.edu/theses/available/etd-09152
reduction in switching losses on both the primary transistors 003-180228/unrestricted/
(ZVS) and the secondary-side diodes (ZCS).

References:
1. Bo Yang, Fred C. Lee, Matthew Concannon, Over
Current Protection Methods for LLC Resonant
Converter, IEEE Conference 2003

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