A GSM Based Vehicle Theft Control System

GSM BASED VEHICLE THEFT CONTROL SYSTEM
1. INTRODUCTION
1.1 EMBEDDED SYSTEM:
An embedded system is a special-purpose system in which the computer is completely encapsulated by or dedicated to the device or system it controls. Unlike a generalpurpose computer, such as a personal computer, an embedded system performs one or a few predefined tasks, usually with very specific requirements. Since the system is dedicated to specific tasks, design engineers can optimize it, reducing the size and cost of the product. Embedded systems are often mass-produced, benefiting from economies of scale. Personal digital assistants (PDAs) or handheld computers are generally considered embedded devices because of the nature of their hardware design, even though they are more expandable in software terms. This line of definition continues to blur as devices expand. With the introduction of the OQO Model 2 with the Windows XP operating system and ports such as a USB port
both features usually Belong to "general purpose computers", the line of nomenclature blurs even more. Physically, embedded systems ranges from portable devices such as digital watches and MP3 players, to large stationary installations like traffic lights, factory controllers, or the systems controlling nuclear power plants. In terms of complexity embedded systems can range from very simple with a single microcontroller chip, to very complex with multiple units, peripherals and networks mounted inside a large chassis or enclosure.
1.2 HISTORY:
In the 1960s, computers possessed an ability to acquire, analyze, process data, and make decisions at very high speeds. However there were some disadvantages with the computer controls. They were: high cost, program complexity, and hesitancy of personnel to learn. However the new concept of electronic devices was evolved. They were called programmable controllers which later became a part of embedded systems. This concept developed from a mix of computer technology, solid state devices, and traditional electro mechanical sequences. The first mass-produced embedded system was the Autonetics D-17 guidance computer for the Minuteman missile released in 1961. It was built from discrete transistor logic and had a hard disk for main memory. REQUIREMENTS OF TYPICAL EMBEDDED SYSTEMS: EX: CHEMICAL PLANT: Consider a chemical plant. No. of temperatures have to be measured &based on values certain operations are performed, such as opening a value. INPUT: - From sensors which measure temperatures. OUTPUT: signal that controls a value. Ex: MOBILE PHONES: The processor of a mobile phone needs to carry out a great deal of communications protocol processing to make "TELEPHONECAL.
Fig 1.1 Typical embedded sysytem organisation
1.3 CHARACTERISTICS:
Embedded systems often use a (relatively) slow processor and small memory size with an intentionally simplified architecture to minimize costs. Programs on embedded systems must often run with limited resources Embedded system designers use compilers to develop an embedded system. They often have no operating system or a speciali8zed embedded operating system (often a real-time operating system ). Programs on an embedded system often must run with resources: often there is no disk drive, operating system, keyboard or screen. may replace rotating media, and a small keypad and screen may be used instead of a PC's keyboard and screen. Embedding a computer is to interact with the environment, often by monitoring and controlling external machinery. In order to do this, analog inputs and outputs must be transformed to and from digital signal levels.
1.4 APPLICATIONS OF EMBEDDED SYSTEMS:

Some widely used applications of embedded systems are listed below: Automatic teller machines Cellular telephones. Computer network. Disc drives. Thermo stats. Sprinklers. Security monitoring systems. Hand held calculations. House-hold appliances. Inertial guided systems. Flight control hardware / software. Medical equipment.
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1.5 GSM
The Global System for Mobile Communications (GSM) is the most popular standard for mobile phones in the world. GSM phones are used by over a billion people across more than 200 countries. The ubiquity of the GSM standard makes international roaming very common between mobile phone operators, which enable phone users to access their services in many other parts of the world as well as their own country. GSM differs significantly from its predecessors in that both signaling and speech channels are digital, which means that it is seen as a second generation (2G) mobile phone system. This fact has also meant that data communication was built into the system from very early on. GSM is an open standard, which is currently developed by the 3GPP.From the point of view of the consumer, the key advantage of GSM systems has been higher digital voice quality and low cost alternatives to making calls such as text messaging. The advantage for network operators has been 8 the ability to deploy equipment from different vendors because the open standard allows easy inter-operability. Also, the standards have allowed network operators to offer roaming services, which mean the subscribers, can use their phone all over the world. GSM retained backward-compatibility with the original GSM phones as the GSM standard continued to develop, for example packet data capabilities were added in the Release '97 version of the standard, by means of GPRS. Higher speed data transmission has also been introduced with EDGE in the Release '99 version of the standard.
2. BLOCK DIAGRAM AND SCHEMATIC DIAGRAM

2.1 BLOCK-DIAGRAM
GSM MODEM
MICRO
LCD
MEMS
ADC
CONTROLLER
KEYPAD
LED
KEYPAD
FIG 2.1 Block diagram of vehicle theft control system
2.2 BLOCK DIAGRAM EXPLANATION:

The project GSM BASED VEHICLE THEFT CONTROL SYSTEM deals with the design & development of a theft control system for automobiles which is being used to prevent / control the theft of a vehicle. The developed system makes use of an embedded system based on GSM technology. An interfacing mobile is also connected to the microcontroller, which is in turn, connected to the engine. Once, the vehicle is being stolen, the information is being used by the vehicle owner for further processing. The information is passed onto the central processing insurance system, where by sitting at a remote place, a particular number is dialed by them to the interfacing mobile that is with the hardware kit which is installed in the vehicle. By reading the signals received by the mobile, one can control the ignition of the engine; say to lock it or to stop the engine immediately. Again it will come to the normal condition only after entering a secured password. The owner of the vehicle & the centre processing system will know this secured password. We can modify this concept such that the vehicle owner also can lock the vehicle from his mobile phone.
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The main concept in this design is introducing the mobile communications into the embedded system. With the help of SIM tracking knows the location of vehicle and informs to the local police or stops it from further movement.
2.3 SCHEMATIC DIAGRAM:
Fig 2.2 schematic diagram

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2.4 SCHEMATIC DESCRIPTION:

The operation of this circuit mainly depends on the MEM sensor. The actual position of the MEM sensor should be 90 degrees with respect to ground. If there is any change in the actual position of the MEM a control signal will be given to the ADC. The ADC will convert the analog signal to the digital signal and it will send the digital signal to the micro controller. Micro controller will send a signal to the GSM module. As GSM receives a signal from micro controller it informs the owner as vehicle theft detected through an SMS. When the owner receives the above message he will send a message to the GSM module to lock the engine. As the GSM receives a secret code from the owner it sends a signal to the micro controller and the micro controller will lock the engine. As this is a protocol we have shown the locking of the engine by glowing led. After locking the engine, the owner can able to find the location of the Automobile by using the signals generated by GSM. After reaching the position where vehicle was locked, the owner enters an secret code to unlock the engine. In this way we can protect the vehicles. And we can also use this as a accident sensor.
3. HARDWARE COMPONENTS
3.1 MICRO CONTROLLER (AT89S52) 3.1.1 INTRODUCTION:
A Micro controller consists of a powerful CPU tightly coupled with memory, various I/O interfaces such as serial port, parallel port timer or counter, interrupt controller, data acquisition interfaces-Analog to Digital converter, Digital to Analog converter, integrated on to a single silicon chip. If a system is developed with a microprocessor, the designer has to go for external memory such as RAM, ROM, EPROM and peripherals. But controller is provided all these facilities on a single chip. Development of a Micro controller reduces PCB size and cost of design. One of the major differences between a Microprocessor and a Micro controller is that a controller often deals with bits not bytes as in the real world application. Intel has introduced a family of Micro controllers called the MCS-51.
Fig 3.1.1 Micro controller
NECESSITY OF MICROCONTROLLERS: Microprocessors brought the concept of programmable devices and made many applications of intelligent equipment. Most applications, which do not need large amount of data and program memory, tended to be: Costly: The microprocessor system had to satisfy the data and program requirements so, sufficient RAM and ROM are used to satisfy most applications .The peripheral control equipment also had to be satisfied. Therefore, almost all-peripheral chips were used in the design. Because of these additional peripherals cost will be comparatively high. An example: 8085 chip needs An Address latch for separating address from multiplex address and data.32KB RAM and 32-KB ROM to be able to satisfy most applications. As also Timer / Counter, Parallel programmable port, Serial port, Interrupt controller are needed for its efficient applications. In comparison a typical Micro controller 8052 chip has all that the 8052 board has except a reduced memory as follows. 4K bytes of ROM as compared to 32-KB, 128 Bytes of RAM as compared to 32-KB. Bulky: On comparing a board full of chips (Microprocessors) with one chip with all components in it (Micro controller) Debugging: Lots of Microprocessor circuitry and program to debug. In Micro controller there is no Microprocessor circuitry to debug. Slower Development time: As we have observed Microprocessors need a lot of debugging at board level and at program level, whereas, Micro controller do not have the excessive circuitry and the built-in peripheral chips are easier to program for operation.
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So peripheral devices like Timer/Counter, Parallel programmable port, Serial Communication Port, Interrupt controller and so on, which were most often used were integrated with the Microprocessor to present the Micro controller .RAM and ROM also were integrated in the same chip. The ROM size was anything from 256 bytes to 32Kb or more. RAM was optimized to minimum of 64 bytes to 256 bytes or more. Typical Micro controllers have all the following features: 8/16/32 CPU Instruction set rich in I/O & bit operations. One or more I/O ports. One or more timer/counters. One or more interrupt inputs and an interrupt controller One or more serial communication ports. Analog to Digital /Digital to Analog converter One or more PWM output Network controlled interface
Why AT 89C52? : The system requirements and control specifications clearly rule out the use of 16, 32 or 64 bit micro controllers or microprocessors. Systems using these may be earlier to implement due to large number of internal features. They are also faster and more reliable but, the above application is satisfactorily served by 8-bit micro controller. Using an inexpensive 8-bit Micro controller will doom the 32-bit product failure in any competitive market place. Coming to the question of why to use AT89C52 of all the 8-bit Micro controller available in the market the main answer would be because it has 8 Kb on chip flash memory which is just sufficient for our application. The on-chip Flash ROM allows the program memory
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to be reprogrammed in system or by conventional non-volatile memory Programmer. Moreover ATMEL is the leader in Flash technology in todays market place and hence using AT 89C52 is the optimal solution. 8052 micro controller architecture: The 8052 architecture consists of these specific features: Compatible with MCS-51 Products 8K Bytes of In-System Programmable (ISP) Flash 4.0V to 5.5V Operating Range Fully Static Operation: 0 Hz to 33 MHz Three-level Program Memory Lock 256 x 8-bit Internal RAM 32 Programmable I/O Lines Three 16-bit Timer/Counters Eight Interrupt Sources Full Duplex UART Serial Channel Low-power Idle and Power-down Modes Interrupt Recovery from Power-down Mode Watchdog Timer Dual Data Pointer Power-off Flag
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Fast Programming Time Flexible ISP Programming (Byte and Page Mode)
3.1.2 PIN DIAGRAM:
Fig -3.1.2 Pin out diagram of 89C52 ic
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3.1.3 FUNCTIONAL BLOCK DIAGRAM OF MICROCONTROLLER
Fig 3.1.3 Functional block diagram of micro controller
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3.1.4 Internal Block diagram:
Fig 3. Fig 3.1.4 AT89C52 internal block diagram
The 8052 oscillator and clock:

The heart of the 8052 circuitry that generates the clock pulses by which all the internal all internal operations are synchronized. Pins XTAL1 And XTAL2 is provided for
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connecting a resonant network to form an oscillator. Typically a quartz crystal and capacitors are employed. The crystal frequency is the basic internal clock frequency of the micro controller. The manufacturers make 8052 designs that run at specific minimum and maximum frequencies typically 1 to 16 MHz. Types of memory: The 8052 have three general types of memory. They are on-chip memory, external Code memory and external Ram. On-Chip memory refers to physically existing memory on the micro controller itself. External code memory is the code memory that resides off chip. This is often in the form of an external EPROM. External RAM is the Ram that resides off chip. This often is in the form of standard static RAM or flash RAM. a) Code memory Code memory is the memory that holds the actual 8052 programs that is to be run. This memory is limited to 64K. Code memory may be found on-chip or off-chip. It is possible to have 4K of code memory on-chip and 60K off chip memory simultaneously. If only off-chip memory is available then there can be 64K of off chip ROM. This is controlled by pin provided as Ea b) Internal memory The 8052 have a bank of 256 bytes of internal RAM. The internal RAM is found onchip. So it is the fastest Ram available. And also it is most flexible in terms of reading and writing. Internal Ram is volatile, so when 8052 is reset, this memory is cleared. 256 bytes of internal memory are subdivided. The first 32 bytes are divided into 4 register banks. Each bank contains 8 registers. Internal RAM also contains 128 bits, which are addressed from 20h to 2Fh. These bits are bit addressed i.e. each individual bit of a byte can be addressed by the user. They are numbered 00h to 7Fh. The user may make use of these variables with commands such as SETB and CLR.
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Special Function registered memory: Special function registers are the areas of memory that control specific functionality of the 8052 micro controller. a) Accumulator (0E0h) As its name suggests, it is used to accumulate the results of large no of instructions. It can hold 8 bit values b) B register (0F0h) The B register is very similar to accumulator. It may hold 8-bit value. The b register is only used by MUL AB and DIV AB instructions. In MUL AB the higher byte of the product gets stored in B register. In div AB the quotient gets stored in B with the remainder in A. c) Stack pointer (81h) The stack pointer holds 8-bit value. This is used to indicate where the next value to be removed from the stack should be taken from. When a value is to be pushed onto the stack, the 8052 first store the value of SP and then store the value at the resulting memory location. When a value is to be popped from the stack, the 8052 returns the value from the memory location indicated by SP and then decrements the value of SP. d) Data pointer The SFRs DPL and DPH work together work together to represent a 16-bit value called the data pointer. The data pointer is used in operations regarding external RAM and some instructions code memory. It is a 16-bit SFR and also an addressable SFR. e) Program counter The program counter is a 16 bit register, which contains the 2 byte address, which tells the 8052 where the next instruction to execute to be found in memory. When the 8052 is
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initialized PC starts at 0000h. And is incremented each time an instruction is executes. It is not addressable SFR. f) PCON (power control, 87h) The power control SFR is used to control the 8052s power control modes. Certain operation modes of the 8052 allow the 8052 to go into a type of sleep mode which consumes much less power.
g) TCON (timer control, 88h) The timer control SFR is used to configure and modify the way in which the 8052s two timers operate. This SFR controls whether each of the two timers is running or stopped and contains a flag to indicate that each timer has overflowed. Additionally, some non-timer related bits are located in TCON SFR. These bits are used to configure the way in which the external interrupt flags are activated, which are set when an external interrupt occurs.
h) TMOD (Timer Mode, 89h) The timer mode SFR is used to configure the mode of operation of each of the two timers. Using this SFR your program may configure each timer to be a 16-bit timer, or 13 bit timer, 8-bit auto reload timer, or two separate timers. Additionally you may configure the timers to only count when an external pin is activated or to count events that are indicated on an external pin.
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i) TO (Timer 0 low/high, address 8A/8C h)
These two SFRs taken together represent timer 0. Their exact behavior depends on how the timer is configured in the TMOD SFR; however, these timers always count up. What is configurable is how and when they increment in value. j) T1 (Timer 1 Low/High, address 8B/ 8D h) These two SFRs, taken together, represent timer 1. Their exact behavior depends on how the timer is configured in the TMOD SFR; however, these timers always count up. k)Timer 2: Timer 2 is a 16-bit Timer/Counter that can operate as either a timer or an event counter. The type of operation is selected by bit C/T2 in the SFR T2CON (shown in Table 2). Timer 2 has three operating modes: capture, auto-reload (up or down counting), and baud rate generator. The modes are selected by bits in T2CON, as shown in Table 3. Timer 2 consists of two 8-bit registers, TH2 and TL2. In the Timer function, the TL2 register is incremented every machine cycle. Since a machine cycle consists of 12 oscillator periods, the count rate is 1/12 of the oscillator frequency.
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Table 3. Timer 2 Operating Modes
In the Counter function, the register is incremented in response to a 1-to-0 transition at its corresponding external input pin, T2. In this function, the external input is sampled during S5P2 of every machine cycle. When the samples show a high in one cycle and a low in the next cycle, the count is incremented. The new count value appears in the register during S3P1 of the cycle following the one in which the transition was detected. Since two machine cycles (24 oscillator periods) are required to recognize a 1-to-0 transition, the maximum count rate is 1/24 of the oscillator frequency. To ensure that a given level is sampled at least once before it changes, the level should be held for at least one full machine cycle. l) P0 (Port 0, address 90h, bit addressable) This is port 0 latch. Each bit of this SFR corresponds to one of the pins on a micro controller. Any data to be outputted to port 0 is first written on P0 register. For e.g., bit 0 of port 0 is pin P0.0, bit 7 is pin p0.7. Writing a value of 1 to a bit of this SFR will send a high level on the corresponding I/O pin whereas a value of 0 will bring it to low level. m) P1 (port 1, address 90h, bit addressable) This is port latch1. Each bit of this SFR corresponds to one of the pins on a micro controller. Any data to be outputted to port 0 is first written on P0 register. For e.g., bit 0 of port 0 is pin P1.0, bit 7 is pin P1.7. Writing a value of 1 to a bit of this SFR will send a high level on the corresponding I/O pin whereas a value of 0 will bring it to low level n) P2 (port 2, address 0A0h, bit addressable) This is a port latch2. Each bit of this SFR corresponds to one of the pins on a micro controller. Any data to be outputted to port 0 is first written on P0 register. For e.g., bit 0 of port 0 is pin P2.0, bit 7 is pin P2.7. Writing a value of 1 to a bit of this SFR will send a high level on the corresponding I/O pin whereas a value of 0 will bring it to low level.
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o) P3(port 3,address B0h, bit addressable) This is a port latch3. Each bit of this SFR corresponds to one of the pins on a micro controller. Any data to be outputted to port 0 is first written on P0 register. For e.g., bit 0 of port 0 is pin P3.0, bit 7 is pin P3.7. Writing a value of 1 to a bit of this SFR will send a high level on the corresponding I/O pin whereas a value of 0 will bring it to low level p) IE (interrupt enable, 0A8h): The Interrupt Enable SFR is used to enable and disable specific interrupts. The low 7 bits of the SFR are used to enable/disable the specific interrupts, where the MSB bit is used to enable or disable all the interrupts. Thus, if the high bit of IE is 0 all interrupts are disabled regardless of whether an individual interrupt is enabled by setting a lower bit.
q) IP (Interrupt Priority, 0B8h) The interrupt priority SFR is used to specify the relative priority of each interrupt. On 8052, an interrupt maybe either low or high priority. An interrupt may interrupt interrupts. For e.g., if we configure all interrupts as low priority other than serial interrupt. The serial interrupt always interrupts the system, even if another interrupt is currently executing. However, if a serial interrupt is executing no other interrupt will be able to interrupt the serial interrupt routine since the serial interrupt routine has the highest priority.
r) PSW (Program Status Word, 0D0h) The program Status Word is used to store a number of important bits that are set and cleared by 8052 instructions. The PSW SFR contains the carry flag, the auxiliary carry flag, the parity flag and the overflow flag. Additionally, it also contains the register bank select flags, which are used to select, which of the R register banks currently in use.
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s) SBUF (Serial Buffer, 99h) SBUF is used to hold data in serial communication. It is physically two registers. One is writing only and is used to hold data to be transmitted out of 8052 via TXD. The other is read only and holds received data from external sources via RXD. Both mutually exclusive registers use address 99h.
I/O ports: One major feature of a microcontroller is the versatility built into the input/output (I/O) circuits that connect the 8052 to the outside world. The main constraint that limits numerous functions is the number of pins available in the 8052 circuit. The DIP had 40 pins and the success of the design depends on the flexibility incorporated into use of these pins. For this reason, 24 of the pins may each used for one of the two entirely different functions which depend, first, on what is physically connected to it and, then, on what software programs are used to program the pins. Port 0 Port 0 is an 8-bit open drain bidirectional I/O port. As an output port, each pin can sink eight TTL inputs. When 1s are written to port 0 pins, the pins can be used as high-impedance inputs. Port 0 can also be configured to be the multiplexed low-order address/data bus during accesses to external program and data memory. In this mode, P0 has internal pull-ups. Port 0 also receives the code bytes during Flash programming and outputs the code bytes during program verification. External pull-ups are required during program verification. Port 1 Port 1 is an 8-bit bidirectional I/O port with internal pull-ups. The Port 1 output buffers can sink/source four TTL inputs. When 1s are written to Port 1 pins, they are pulled high by the inter-nal pull-ups and can be used as inputs. As inputs, Port 1 pins that are externally being pulled low will source current (IIL) because of the internal pull-ups. In addition, P1.0 and P1.1
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can be configured to be the timer/counter 2 external count input (P1.0/T2) and the timer/counter 2 trigger input (P1.1/T2EX), respectively, as shown in the follow-ing table. Port 1 also receives the low-order address bytes during Flash programming and verification. Port 2 Port 2 is an 8-bit bidirectional I/O port with internal pull-ups. The Port 2 output buffers can sink/source four TTL inputs. When 1s are written to Port 2 pins, they are pulled high by the inter-nal pull-ups and can be used as inputs. As inputs, Port 2 pins that are externally being pulled low will source current (IIL) because of the internal pull-ups. Port 2 emits the high-order address byte during fetches from external program memory and dur-ing accesses to external data memory that use 16-bit addresses (MOVX @ DPTR). In this application, Port 2 uses strong internal pull-ups when emitting 1s. During accesses to external data memory that use 8-bit addresses (MOVX @ RI), Port 2 emits the contents of the P2 Special Function Register. Port 2 also receives the high-order address bits and some control signals during Flash program-ming and verification. Port 3 Port 3 is an 8-bit bidirectional I/O port with internal pull-ups. The Port 3 output buffers can sink/source four TTL inputs. When 1s are written to Port 3 pins, they are pulled high by the inter-nal pull-ups and can be used as inputs. As inputs, Port 3 pins that are externally being pulled low will source current (IIL) because of the pull-ups. Port 3 receives some control signals for Flash programming and verification. Port 3 also serves the functions of various special features of the
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AT89S52, as shown in the fol-lowing table
RST Reset input. A high on this pin for two machine cycles while the oscillator is running resets the device. This pin drives high for 98 oscillator periods after the Watchdog times out. The DISRTO bit in SFR AUXR (address 8EH) can be used to disable this feature. In the default state of bit DISRTO, the RESET HIGH out feature is enabled. ALE/PROG Address Latch Enable (ALE) is an output pulse for latching the low byte of the address during accesses to external memory. This pin is also the program pulse input (PROG) during Flash programming. In normal operation, ALE is emitted at a constant rate of 1/6 the oscillator frequency and may be used for external timing or clocking purposes. Note, however, that one ALE pulse is skipped dur-ing each access to external data memory. If desired, ALE operation can be disabled by setting bit 0 of SFR location 8EH. With the bit set, ALE is active only during a MOVX or MOVC instruction. Otherwise, the pin is weakly pulled high. Setting the ALE-disable bit has no effect if the microcontroller is in external execution mode.
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INTERRUPTS: Interrupts are hardware signals that are used to determine conditions that exist in external and internal circuits. Any interrupt can cause the 8052 to perform a hardware call to an interrupt handling subroutine that is located at a predetermined absolute address in the program memory. Five interrupts are provided in the 8052. Three of these are generated automatically by the internal operations: Timer flag 0, Timer Flag 1, and the serial port interrupt (RI or TI) Two interrupts are triggered by external signals provided by the circuitry that is connected to the pins INTO 0 and INTO1. The interrupts maybe enable or disabled, given priority or otherwise controlled by altering the bits in the Interrupt Enabled (IE) register, Interrupt Priority (IP) register, and the Timer Control (TCON) register. . These interrupts are mask able i.e. they can be disabled. Reset is a non maskable interrupt which has the highest priority. It is generated when a high is applied to the reset pin. Upon reset, the registers are loaded with the default values. Each interrupt source causes the program to do store the address in PC onto the stack and causes a hardware call to one of the dedicated addresses in the program memory. The appropriate memory locations for each for each interrupt are as follows:
In interrupt Rr RESET IE E0 (External interrupt 0) T F0 (Timer 0 interrupt) I E1 (External interrupt 1)
A Address 00 00 00 00 00 03 0B 13
T F1 (Timer 1 interrupt) S SERIAL
00 1B 00 23
The AT89C52 is a low-power, high-performance CMOS 8-bit microcomputer with 4K bytes of Flash programmable and erasable read only memory (PEROM). The device is manufactured using Atmels high-density nonvolatile memory technology and is compatible with the industry-standard MCS-51 instruction set and pin out. The on-chip Flash allows the program memory to be reprogrammed in-system or by a conventional nonvolatile memory programmer. By combining a versatile 8-bit CPU with Flash on a monolithic chip, the Atmel AT89C51 is a
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powerful microcomputer, which provides a highly flexible and cost-effective solution to many embedded control applications.
Hardware details:
The on chip oscillator of 89C52 can be used to generate system clock. Depending upon version of the device, crystals from 3.5 to 12 MHz may be used for this purpose. The system clock is internally divided by 6 and the resultant time period becomes one processor cycle. The instructions take mostly one or two processor cycles to execute, and very occasionally three processor cycles. The ALE (address latch enable) pulse rate is 16th of the system clock, except during access of internal program memory, and thus can be used for timing purposes. AT89C52 Serial port pins
PIN P3.O RXD P3.I TXD P3.2 INTO P3.3 INT1 P3.4 TO P3.5 T1 P3.6 WR P3.7 RD ALTERNATE USE Seria data input Serial data output External interrupt 0 External interrupt 1 External timer 0 input External timer 1 input External memory write pulse External memory read pulse
Table AT89C52 serial port pins
SFR SBUF SBUF TCON-1 TCON- 2 TMOD TMOD ------------
The two internal timers are wired to the system clock and prescaling factor is decided by the software, apart from the count stored in the two bytes of the timer control registers. One of the counters, as mentioned earlier, is used for generation of baud rate clock for the UART. It would be of interest to know that the 8052 have a third timer, which is usually used for generation of baud rate. The reset input is normally low and taking it high resets the micro controller,
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In the present hardware, a separate CMOS circuit has been used for generation of reset signal so
that it could be used to drive external devices as well. Writing the software: The 89C52 has been specifically developed for control applications. As mentioned earlier, out of the 128 bytes of internal RAM, 16 bytes have been organized in such a way that all the 128 bits associated. With this group may be accessed bit wise to facilitate their use for bit set/reset/test applications. These are therefore extremely useful for programs involving individual logical operations. One can easily give example of lift for one such application where each one of the floors, door condition, etc may be depicted by a single hit. The 89C52 has instructions for bit manipulation and testing. Apart from these, it has 8-bit multiply and divide instructions, which may be used with advantage. The 89C52 has short branch instructions for 'within page' and conditional jumps, short jumps and calls within 2k memory space which are very convenient, and as such the controller seems to favor programs which are less than 2k byte long. Some versions of 8751 EPROM devices have a security bit which can be programmed to lock the device and then the contents of internal program EPROM cannot be read. The device has to be erased in full for further alteration, and thus it can only be reused but not copied. EEPROM and FLASH memory versions of the device are also available now. Memory unit: Memory is part of the micro controller whose function is to store data. The easiest way to explain it is to describe it as one big closet with lots of drawers. If we suppose that we marked the drawers in such a way that they cannot be confused, any of their contents will then be easily accessible. It is enough to know the designation of the drawer and so its contents will be known to us for sure. Memory components are exactly like that. For a certain input we get the contents of a certain addressed memory location and thats all. Two new concepts are brought to us: addressing and memory location. Memory consists of all memory locations, and addressing is nothing but selecting one of them. This means that we need to select the desired memory
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location on one hand, and on the other hand we need to wait for the contents of that location. Besides reading from a memory location, memory must also provide for writing onto it. This is done by supplying an additional line, called control line. We will designate this line as R/W (read/write). Control line is used in the following way: if r/w=1, reading is done, and if opposite is true then writing is done on the memory location. Memory is the first element, and we need a few operation of our micro controller. Central Processing Unit: Let add 3 more memory locations to a specific block that will have a built in capability to multiply, divide, subtract, and move its contents from one memory location onto another. The part we just added in is called central processing unit (CPU). Its memory locations are called registers. Registers are therefore memory locations whose role is to help with performing various mathematical operations or any other operations with data wherever data can be found. Look at the current situation. We have two independent entities (memory and CPU), which are interconnected, and thus any exchange of data is hindered, as well as its functionality. If, for example, we wish to add the contents of two memory locations and return the result again back to memory, we would need a connection between memory and CPU. Simply stated, we must have some way through data goes from one block to another. Bus: That way is called bus. Physically, it represents a group of 8, 16, or more wires. There are two types of buses: address and data bus. The first one consists of as many lines as the amount of memory we wish to address, and the other one is as wide as data, in our case 8 bits or the connection line. First one serves to transmit address from CPU memory, and the second to connect all blocks inside the micro controller. Input-output unit: Those locations weve just added are called ports. There are several types of ports: input, output or bi-directional ports. When working with ports, first of all it is necessary to choose which port we need to work with, and then to send data to, or take it from the port.
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When working with it the port acts like a memory location. Something is simply being written into or read from it, and it could be noticed on the pins of the micro-controller.
3.2 555 TIMER IC
The 555 Timer IC is an integrated circuit (chip) implementing a variety of timer and multi vibrator applications. The IC was designed by Hans R. Camenzind in 1970 and brought to market in 1971 by Signetics (later acquired by Philips). The original name was the SE555 (metal can)/NE555 (plastic DIP) and the part was described as "The IC Time Machine". It has been claimed that the 555 gets its name from the three 5 k resistors used in typical early implementations, but Hans Camenzind has stated that the number was arbitrary. The part is still in wide use, thanks to its ease of use, low price and good stability. As of 2003, it is estimated that 1 billion units are manufactured every year. Depending on the manufacturer, the standard 555 package includes over 20 transistors, 2 diodes and 15 resistors on a silicon chip installed in an 8-pin mini dual-in-line package (DIP-8). Variants available include the 556 (a 14-pin DIP combining two 555s on one chip), and the 558 (a 16-pin DIP combining four slightly modified 555s with DIS & THR connected internally, and TR falling edge sensitive instead of level sensitive). Ultra-low power versions of the 555 are also available, such as the 7555 and TLC555. The 7555 requires slightly different wiring using fewer external components and less power.
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The 555 has three operating modes: Monostable mode: In this mode, the 555 functions as a "one-shot". Applications include timers, missing pulse detection, bounce free switches, touch switches, frequency divider, capacitance measurement, pulse-width modulation (PWM) etc A stable - free running mode: The 555 can operate as an oscillator. Uses include LED and lamp flashers, pulse generation, logic clocks, tone generation, security alarms, pulse position modulation, etc. Bi stable mode or Schmitt trigger: The 555 can operate as a flip-flop, if the DIS pin is not connected and no capacitor is used. Uses include bounce free latched switches, etc. The 555 Timer IC is available as an 8-pin metal can, an 8-pin mini DIP (dual-in-package) or a 14-pin DIP. This IC consists of 23 transistors, 2 diodes and 16 resistors. The explanation of terminals coming out of the 555 timer IC is as follows. The pin number used in the
following discussion refers to the 8-pin DIP and 8-pin metal can packages.
3.2.1 555 timer ic pin diagram

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555 timer IC 8 pin configuration Pin 1: Grounded Terminal. All the voltages are measured with respect to this terminal. Pin 2: Trigger Terminal. This pin is an inverting input to a comparator that is responsible for
transition of flip-flop from set to reset. The output of the timer depends on the amplitude of the external trigger pulse applied to this pin. Pin 3: Output Terminal. Output of the timer is available at this pin. There are two ways in
which a load can be connected to the output terminal either between pin 3 and ground pin (pin 1) or between pin 3 and supply pin (pin 8). The load connected between pin 3 and ground supply pin is called the normally on load and that connected between pin 3 and ground pin is called the normally off load. Pin 4: Reset Terminal. To disable or reset the timer a negative pulse is applied to this pin
due to which it is referred to as reset terminal. When this pin is not to be used for reset purpose, it should be connected to + VCC to avoid any possibility of false triggering. Pin 5: Control Voltage Terminal. The function of this terminal is to control the threshold
and trigger levels. Thus either the external voltage or a pot connected to this pin determines the pulse width of the output waveform. The external voltage applied to this pin can also be used to modulate the output waveform. When this pin is not used, it should be connected to ground through a 0.01 micro Farad to avoid any noise problem. Pin 6: Threshold Terminal. This is the non-inverting input terminal of comparator 1, which
compares the voltage applied to the terminal with a reference voltage of 2/3 VCC. The amplitude of voltage applied to this terminal is responsible for the set state of flip-flop. Pin 7: Discharge Terminal. This pin is connected internally to the collector of transistor and
mostly a capacitor is connected between this terminal and ground. It is called discharge terminal because when transistor saturates, capacitor discharges through the transistor. When the transistor is cut-off, the capacitor charges at a rate determined by the external resistor and capacitor. Pin 8: Supply Terminal. A supply voltage of + 5 V to + 18 V is applied to this terminal with
respect to ground (pin 1).

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The 555 timer IC is an amazingly simple yet versatile device. It has been around now for many years and has been reworked into a number of different technologies. The two primary versions today are the original bipolar design and the more recent CMOS equivalent. These differences primarily affect the amount of power they require and their maximum frequency of operation; they are pin-compatible and functionally interchangeable. This page contains only a description of the 555 timer IC itself. Functional circuits and a few of the very wide range of its possible applications will be covered in additional pages in this category. The operation of the 555 timer revolves around the three resistors that form a voltage divider across the power supply, and the two comparators connected to this voltage divider. The IC is quiescent so long as the trigger input (pin 2) remains at +VCC and the threshold input (pin 6) is at ground. Assume the reset input (pin 4) is also at +VCC and therefore inactive, and that the control voltage input (pin 5) is unconnected. Under these conditions, the output (pin 3) is at ground and the discharge transistor (pin 7) is turned on, thus grounding whatever is connected to this pin. The three resistors in the voltage divider all have the same value (5K in the bipolar version of this IC), so the comparator reference voltages are 1/3 and 2/3 of the supply voltage, whatever that may be. The control voltage input at pin 5 can directly affect this relationship, although most of the time this pin is unused. The internal flip-flop changes state when the trigger input at pin 2 is pulled down below +VCC/3. When this occurs, the output (pin 3) changes state to +VCC and the discharge transistor (pin 7) is turned off. The trigger input can now return to +VCC; it will not affect the state of the IC. However, if the threshold input (pin 6) is now raised above (2/3)+VCC, the output will return to ground and the discharge transistor will be turned on again. When the threshold input returns to ground, the IC will remain in this state, which was the original state when we started this analysis.
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The easiest way to allow the threshold voltage (pin 6) to gradually rise to (2/3)+VCC is to connect it to a capacitor being allowed to charge through a resistor. In this way we can adjust the R and C values for almost any time interval we might want. The 555 can operate in either monostable or astable mode, depending on the connections to and the arrangement of the external components. Thus, it can either produce a single pulse when triggered, or it can produce a continuous pulse train as long as it remains powered.
In monostable mode, the timing interval, t, is set by a single resistor and capacitor, as shown to the right. Both the threshold input and the discharge transistor (pins 6 & 7) are connected directly to the capacitor, while the trigger input is held at +VCC through a resistor. In the absence of any input, the output at pin 3 remains low and the discharge transistor prevents capacitor C from charging. When an input pulse arrives, it is capacitively coupled to pin 2, the trigger input. The pulse can be either polarity; its falling edge will trigger the 555. At this point, the output rises to +VCC and the discharge transistor turns off. Capacitor C charges through R towards +VCC. During this interval, additional pulses received at pin 2 will have no effect on circuit operation. The standard equation for a charging capacitor applies here: e = E(1 (-t/RC)
). Here,
"e" is the capacitor voltage at some instant in time, "E" is the supply voltage, V CC, and " " is the
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base for natural logarithms, approximately 2.718. The value "t" denotes the time that has passed, in seconds, since the capacitor started charging. We already know that the capacitor will charge until its voltage reaches (2/3)+V CC, whatever that voltage may be. This doesn't give us absolute values for "e" or "E," but it does give us the ratio e/E = 2/3. We can use this to compute the time, t, required to charge capacitor C to the voltage that will activate the threshhold comparator: 2/3 = 1 -1/3 = 1/3 =
(-t/RC)
(-t/RC)
(-t/RC)
ln(1/3) = -t/RC -1.0986123 = -t/RC t = 1.0986123RC t = 1.1RC The value of 1.1RC isn't exactly precise, of course, but the round off error amounts to about 0.126%, which is much closer than component tolerances in practical circuits, and is very easy to use. The values of R and C must be given in Ohms and Farads, respectively, and the time will be in seconds. You can scale the values as needed and appropriate for your application, provided you keep proper track of your powers of 10. For example, if you specify R in megohms and C in microfarads, t will still be in seconds. But if you specify R in kilo ohms and C in microfarads, t will be in milliseconds. It's not difficult to keep track of this, but you must be sure to do it accurately in order to correctly calculate the component values you need for any given time interval. The timing interval is completed when the capacitor voltage reaches the (2/3)+VCC upper threshold as monitored at pin 6. When this threshold voltage is reached, the output at pin 3 goes low again, the discharge transistor (pin 7) is turned on, and the capacitor rapidly discharges back to ground once more. The circuit is now ready to be triggered once again.
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If we rearrange the circuit slightly so that both the trigger and threshold inputs are controlled by the capacitor voltage, we can cause the 555 to trigger itself repeatedly. In this case, we need two resistors in the capacitor charging path so that one of them can also be in the capacitor discharge path. This gives us the circuit shown to the left. In this mode, the initial pulse when power is first applied is a bit longer than the others, having a duration of 1.1(Ra + Rb)C. However, from then on, the capacitor alternately charges and discharges between the two comparator threshold voltages. When charging, C starts at (1/3)Vcc and charges towards VCC. However, it is interrupted exactly halfway there, at (2/3)VCC.Therefore, the charging time, t1, is ln(1/2)(Ra + Rb)C = 0.693(Ra + Rb)C. When the capacitor voltage reaches (2/3)VCC, the discharge transistor is enabled (pin 7), and this point in the circuit becomes grounded. Capacitor C now discharges through Rb alone. Starting at (2/3)VCC, it discharges towards ground, but again is interrupted halfway there, at (1/3)VCC. The discharge time, t2, then, is -ln(1/2)(Rb)C = 0.693(Rb)C.The total period of the pulse train is t1 + t2, or 0.693(Ra + 2Rb)C. The output frequency of this circuit is the inverse of the period, or 1.44/(Ra + 2Rb)C. Note that the duty cycle of the 555 timer circuit in astable mode cannot reach 50%. On time must always be longer than off time, because Ra must have a resistance value greater than zero to prevent the discharge transistor from directly shorting VCC to ground. Such an action would immediately destroy the 555 IC.
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One interesting and very useful feature of the 555 timer in either mode is that the timing interval for either charge or discharge is independent of the supply voltage, VCC. This is because the same VCC is used both as the charging voltage and as the basis of the reference voltages for the two comparators inside the 555. Thus, the timing equations above depend only on the values for R and C in either operating mode. In addition, since all three of the internal resistors used to make up the reference voltage divider are manufactured next to each other on the same chip at the same time, they are as nearly identical as can be. Therefore, changes in temperature will also have very little effect on the timing intervals, provided the external components are temperature stable. A typical commercial 555 timer will show a drift of 50 parts per million per Centigrade degree of temperature change (50 ppm/C) and 0.01%/Volt change in VCC. This is negligible in most practical applications
3.3 ADC 0808

The ADC0808/ADC0809 data acquisition component is a monolithic CMOS device with an 8-bit analog-to-digital converter, 8-channel multiplexer and microprocessor compatible control logic. The 8-bit A/D converter uses successive approximation as the conversion technique. The converter features a high impedance chopper stabilized comparator, a 256R voltage divider with analog switch tree and a successive approximation register. The 8-channel multiplexer can directly access any of 8-single-ended analog signals. The device eliminates the need for external zero and full-scale adjustments. Easy interfacing to microprocessors is provided by the latched and decoded multiplexer address inputs and latched TTL TRI-STATE outputs. The design of the ADC0808, ADC0809 has been optimized by incorporating the most desirable aspects of several A/D conversion techniques. The ADC0808, ADC0809 offers high speed, high accuracy, minimal temperature dependence, excellent long-term accuracy and repeatability, and consumes minimal power. These features make this device ideally suited to applications from process and machine control to consumer and automotive applications. For 16 channels multiplexer with common output (sample/hold port) see ADC0816 data sheet.
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FEATURES: Easy interface to all microprocessors Operates ratio metrically or with 5 VDC or analog span adjusted voltage reference No zero or full-scale adjust required 8-channel multiplexer with address logic 0V to VCC input range Outputs meet TTL voltage level specifications ADC0808 equivalent to MM74C949
KEY SPECIFICATIONS: Resolution 8 Bits Total Unadjusted Error LSB and 1 LSB Single Supply 5 VDC Low Power 15 mW Conversion Time 100 s
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BLOCK DIAGRAM:
3.3 .1 Block diagram of ADC 0808 PIN DIAGRAM OF ADC 0808
3.3.2 Pin diagram of ADC 0808

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FUNCTIONAL DESCRIPTION:
MULTIPLEXER: The device contains an 8-channel single-ended analog signal multiplexer. A particular input channel is selected by using the address decoder. Table 1 shows the input states for the address lines to select any channel. The address is latched into the decoder on the low-to-high transition of the address latch enable signal. CONVERTER CHARACTERISTICS: The Converter: The heart of this single chip data acquisition system is its 8- bit analog-to-digital converter. The converter is designed to give fast, accurate, and repeatable conversions over a wide range of temperatures. The converter is partitioned into 3 major sections: the 256R ladder network, the successive approximation register, and the comparator. The converter's digital outputs are positive true. The 256R ladder network approach shown in figure 4.2 was chosen over the conventional R/2R ladder because of its inherent mono tonicity, which guarantees no missing digital codes. Mono tonicity is particularly important in closed loop feedback control systems. A non-monotonic relationship can cause oscillations that will be catastrophic for the system. Additionally, the 256R network does not cause load variations on the reference voltage.
3.3.3 Ladder network

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The bottom resistor and the top resistor of the ladder network in figure4.3 are not the same value as the remainder of the network. The difference in these resistors causes the output characteristic to be symmetrical with the zero and full-scale points of the transfer curve. The first output transition occurs when the analog signal has reached + LSB and succeeding output transitions occur every 1 LSB later up to full-scale. The successive approximation register (SAR) performs 8 iterations to approximate the input voltage. For any SAR type converter, n-iterations are required for an n-bit converter. The most important section of the A/D converter is the comparator. It is this section which is responsible for the ultimate accuracy of the entire converter. It is also the comparator drift which has the greatest influence on the repeatability of the device. A chopper-stabilized comparator provides the most effective method of satisfying all the converter requirements. The chopper-stabilized comparator converts the DC input signal into an AC signal. This signal is then fed through a high gain AC amplifier and has the DC level restored. This technique limits the drift component of the amplifier since the drift is a DC component which is not passed by the AC amplifier. This makes the entire A/D converter extremely insensitive to temperature, long term drift and input offset errors.
3.4 RS 232: In telecommunications, RS-232 (Recommended Standard 232) is a standard for serial
binary data signals connecting between a DTE (Data terminal equipment) and a DCE (Data Circuit-terminating Equipment). It is commonly used in computer serial ports. Scope of the standard: The Electronic Industries Alliance (EIA) standard RS-232-C as of 1969 defines:
Electrical signal characteristics such as voltage levels, signaling rate, timing and slewrate of signals, voltage withstand level short-circuit behavior, and maximum load capacitance.
Interface mechanic characteristics, pluggable connectors and pin identification. Functions of each circuit in the interface connector.
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Standard subsets of interface circuits for selected telecom applications. The standard does not define such elements as Character encoding (for example, ASCII, Baudot or EBCDIC) The framing of characters in the data stream (bits per character, start/stop bits, parity) Protocols for error detection or algorithms for data compression Bit rates for transmission, although the standard says it is intended for bit rates lower than 20,000 bits per second. Many modern devices support speeds of 115,200 bps and above
Power supply to external devices. Details of character format and transmission bit rate are controlled by the serial port hardware, often a single integrated circuit called a UART that converts data from parallel to serial form. A typical serial port includes specialized driver and receiver integrated circuits to convert between internal logic levels and RS-232 compatible signal levels.
History: The original DTEs were electromechanical teletypewriters and the original DCEs were (usually) modems. When electronic terminals (smart and dumb) began to be used, they were often designed to be interchangeable with teletypes, and so supported RS-232. The C revision of the standard was issued in 1969 in part to accommodate the electrical characteristics of these devices. Since application to devices such as computers, printers, test instruments, and so on were not considered by the standard, designers implementing an RS-232 compatible interface on their equipment often interpreted the requirements idiosyncratically. Common problems were non-standard pin assignment of circuits on connectors, and incorrect or missing control signals. The lack of adherence to the standards produced a thriving industry of breakout boxes, patch boxes, test equipment, books, and other aids for the connection of disparate equipment. A common deviation from the standard was to drive the signals at a reduced voltage: the standard requires the transmitter to use +12V and -12V, but requires the receiver to distinguish voltages as low as +3V and -3V. Some manufacturers therefore built transmitters that supplied +5V and -5V and labeled them as "RS-232 compatible."
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Later personal computers (and other devices) started to make use of the standard so that they could connect to existing equipment. For many years, an RS-232-compatible port was a standard feature for serial communications, such as modem connections, on many computers. It remained in widespread use into the late 1990s. While it has largely been supplanted by other interface standards in computer products, it is still used to connect older designs of peripherals, industrial equipment (such as based on PLCs), and console ports, and special purpose equipment such as a cash drawer for a cash register. The standard has been renamed several times during its history as the sponsoring organization changed its name, and has been variously known as EIA RS 232, EIA 232, and most recently as TIA 232. The standard continues to be revised and updated by the EIA and since 1988 the Telecommunications Industry Association (TIA). Revision C was issued in a document dated August 1969. Revision D was issued in 1986. The current revision i TIA-232-F Interface between Data Terminal Equipment and Data Circuit-Terminating Equipment Employing Serial Binary Data Interchange, sissued in 1997. Changes since Revision C have been in timing and details intended to improve harmonization with the CCITT standard V.24, but equipment built to the current standard will interoperate with older versions. Limitations of the standard: Because the application of RS-232 has extended far beyond the original purpose of interconnecting a terminal with a modem, successor standards have been developed to address the limitations. Issues with the RS-232 standard include: The large voltage swings and requirement for positive and negative supplies increases power
consumption of the interface and complicates power supply design. The voltage swing requirement also limits the upper speed of a compatible interface. Single-ended signaling referred to a common signal ground limits the noise immunity and
transmission distance. Multi-drop (meaning a connection between more than two devices) operation of an RS-232
compatible interface is not defined; while multi-drop "work-arounds" have been devised, they have limitations in speed and compatibility.
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Asymmetrical definitions of the two ends of the link make the assignment of the role of a
newly developed device problematic; the designer must decide on either a DTE-like or DCE-like interface and which connector pin assignments to use. The handshaking and control lines of the interface are intended for the setup and takedown of
a dial-up communication circuit; in particular, the use of handshake lines for flow control is not reliably implemented in many devices. No method for sending power to a device, while a small amount of current can be extracted
from the DTR and RTS lines this can only be used for low power devices such as mice. While the standard recommends a 25-way connector and its pinout, the connector is large by
current standards. Role in modern personal computers: Today, RS-232 is gradually being superseded in personal computers by USB for local communications. Compared with RS-232, USB is faster, has lower voltage levels, and has connectors that are simpler to connect and use. Both standards have software support in popular operating systems. USB is designed to make it easy for device drivers to communicate with hardware. However, there is no direct analog to the terminal programs used to let users communicate directly with serial ports. USB is more complex than the RS 232 standard because it includes a protocol for transferring data to devices. This requires more software to support the protocol used. RS 232 only standardizes the voltage of signals and the functions of the physical interface pins. Serial ports of personal computers are also often used to directly control various hardware devices, such as relays or lamps, since the control lines of the interface could be easily manipulated by software. This isn't feasible with USB which requires some form of receiver to decode the serial data. As an alternative, USB docking ports are available which can provide connectors for a keyboard, mouse, one or more serial ports, and one or more parallel ports. Corresponding device drivers are required for each USB-connected device to allow programs to access these USB-connected devices as if they were the original directly-connected peripherals. Devices that convert USB to RS 232 may not work with all software on all personal computers.
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Standard details: In RS-232, data is sent as a time-series of bits. Both synchronous and asynchronous transmissions are supported by the standard. In addition to the data circuits, the standard defines a number of control circuits used to manage the connection between the DTE and DCE. Each data or control circuit only operates in one direction that is, signaling from a DTE to the attached DCE or the reverse. Since transmit data and receive data are separate circuits, the interface can operate in a full duplex manner, supporting concurrent data flow in both directions. The standard does not define character framing within the data stream, or character encoding. Voltage levels: The RS-232 standard defines the voltage levels that correspond to logical one and logical zero levels. Valid signals are plus or minus 3 to 15 volts. The range near zero volts is not a valid RS-232 level; logic one is defined as a negative voltage, the signal condition is called marking, and has the functional significance of OFF. Logic zero is positive; the signal condition is spacing, and has the function ON. The standard specifies a maximum open-circuit voltage of 25 volts; signal levels of 5 V,10 V,12 V, and 15 V are all commonly seen depending on the power supplies available within a device. RS-232 drivers and receivers must be able to withstand indefinite short circuit to ground or to any voltage level up to +/-25 volts. The slew rate, or how fast the signal changes between levels, is also controlled. Because the voltage levels are higher than logic levels typically used by integrated circuits, special intervening driver circuits are required to translate logic levels. These also protect the device's internal circuitry from short circuits or transients that may appear on the RS232 interface, and provide sufficient current to comply with the slew rate requirements for data transmission. Because both ends of the RS-232 circuit depend on the ground pin being zero volts, problems will occur when connecting machinery and computers where the voltage between the ground pin on one end and the ground pin on the other is not zero. This may also cause a hazardous ground loop.
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Connectors: RS-232 devices may be classified as Data Terminal Equipment (DTE) or Data Communications Equipment (DCE); this defines at each device which wires will be sending and receiving each signal. The standard recommended but did not make mandatory the Dsubminiature 25 pin connector. In general, terminals have male connectors with DTE pin functions, and modems have female connectors with DCE pin functions. Other devices may have any combination of connector gender and pin definitions. Presence of a 25 pin D-sub connector does not necessarily indicate an RS-232C compliant interface. For example, on the original IBM PC, a male D-sub was an RS-232C DTE port (with a non-standard current loop interface on reserved pins), but the female D-sub connector was used for a parallel Centronics printer port. Some personal computers put nonstandard voltages or signals on their serial ports. The standard specifies 20 different signal connections. Since most devices use only a few signals, smaller connectors can be used. For example, the 9 pin DE-9 connector was used by most IBM-compatible PCs since the IBM PC AT, and has been standardized as TIA-574. More recently, modular connectors have been used. Most common are 8 pin RJ-45 connectors. Standard EIA/TIA 561 specifies a pin assignment, but the "Yost Serial Device Wiring Standard" invented by Dave Yost is common on UNIX computers and newer devices from Cisco Systems. Many devices don't use either of these standards. 10 pin RJ-50 connectors can be found on some devices as well. Digital Equipment Corporation defined their own DECconnect connection system which was based on the Modified Modular Jack connector. This is a 6 pin modular jack where the key is offset from the center position. As with the Yost standard, DECconnect uses a symmetrical pin layout which enables the direct connection between two DTEs. Another common connector is the DH10 header connector common on motherboards and add-in cards which are usually converted via a cable to the more standard 9 pin DE-9 connector (and frequently mounted on a free slot plate or other part of the housing). Conventions: For functional communication through a serial port interface, conventions of bit rate, character framing, communications protocol, character encoding, data compression, and error
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detection, not defined in RS 232, must be agreed to by both sending and receiving equipment. For example, consider the serial ports of the original IBM PC. This implementation has an integrated circuit UART, often 16550 UART, using asynchronous start-stop character formatting with 7 or 8 data bits per frame, usually ASCII character coding, and data rates programmable between 75 bits per second and 115,000 bits per second. Data rates above 20,000 bits per second are out of the scope of the standard, although higher data rates are sometimes used by commercially manufactured equipment. In the particular case of the IBM PC, baud rates were programmable with arbitrary values, so that a PC could be connected to, for example, MIDI music controllers (31,250 bits per second) or other devices not using the rates typically used with modems. Since most devices do not have automatic baud rate detection, users must manually set the baud rate (and all other parameters) at both ends of the RS-232 connection. 3-wire and 5-wire RS-232 A minimal 3-wire RS-232 connection consisting only of transmits data, receives data and ground, and is commonly used when the full facilities of RS-232 are not required. When only flow control is required, the RTS and CTS lines are added in a 5-wire version.
3.5 MAX 232

A standard serial interface for PC, RS232C, requires negative logic, i.e., logic 1 is 3V to -12V and logic 0 is +3V to +12V. To convert TTL logic, say, TxD and RxD pins of the microcontroller thus need a converter chip. A MAX232 chip has long been using in many microcontrollers boards. It is a dual RS232 receiver / transmitter that meets all RS232 specifications while using only +5V power supply. It has two onboard charge pump voltage converters which generate +10V to -10V power supplies from a single 5V supply. It has four level translators, two of which are RS232 transmitters that convert TTL/CMOS input levels into +9V RS232 outputs. The other two level translators are RS232 receivers that convert RS232 input to 5V. Typical MAX232 circuit is shown below.
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Fig 3.5.1 Pin diagram of max232 A standard serial interfacing for PC, RS232C, requires negative logic, i.e., logic '1' is -3V to -12V and logic '0' is +3V to +12V. To convert TTL logic, say, TxD and RxD pins of the uC chips thus need a converter chip. A MAX232 chip has long been using in many uC boards. It provides 2-channel RS232C port and requires external 10uF capacitors. Carefully check the polarity of capacitor when soldering the board. A DS275 however, no need external capacitor and smaller. Either circuit can be used without any problems.
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3.5.2 circuit connection of max 232
3.6 LIQUID CRYSTAL DISPLAY

3.6.1 INTRODUCTION:
In recent years the LCD is finding widespread use replacing LED s (seven-segment LED or other multi segment LED s). This is due to the following reasons: 1. The declining prices of LCD s. 2. The ability to display numbers, characters and graphics. This is in
contract to LED s, which are limited to numbers and a few characters. 3. Incorporation of a refreshing controller into the LCD, there by relieving the CPU of the task of refreshing the LCD. In the contrast, CPU to keep displaying the data. 4. Ease of programming for characters and graphics. the LED must be refreshed by the
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USES: The LCD s used exclusively in watches, calculators and measuring instruments is the simple seven-segment displays, having a limited amount of numeric data. The recent advances in technology have resulted in better legibility, more information displaying capability and a wider temperature range. These have resulted in the LCD s being extensively used in telecommunications and entertainment electronics. The LCD s has even started replacing the cathode ray tubes (CRTs) used for the display of text and graphics, and also in small TV applications.
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3.6.2 LCD PIN DIAGRAM:
3.6.1 LCD pin diagram LCD PIN DESCRIPTION :

The LCD discussed in this section has 14 pins. The function of each pin is given in table.
Pin
1 2 3
symbol
Vss Vcc VEE
I/O
----
Description
Ground +5V power supply Power supply to
control contrast 4 RS 1 RS=0 to select cmd register Rs=1 to select data register 5 R/W I R/W=0 for write
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R/W=1 for read 6 7 8 9 10 11 12 13 14 E DB0 DB1 DB2 DB3 DB4 DB5 DB6 DB7 I/O I/O I/O I/O I/O I/O I/O I/O I/O Enable The 8-bit data bus The 8-bit data bus The 8-bit data bus The 8-bit data bus The 8-bit data bus The 8-bit data bus The 8-bit data bus The 8-bit data bus
TABLE 2: LCD COMMAND CODES

Code(HEX) 1 2 4 6 5 7 8 COMMAND TO LCD INSTRUCTION REGISTER Clear display screen Return home Decrement cursor Increment cursor Shift display right Shift display left Display off, cursor off
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A C E F 10 14 18 1C 80 C0 38
Display off, cursor on Display on, cursor off Display on, cursor on Display on, cursor blinking Shift cursor position to left Shift cursor position to right Shift the entire display to the left Shift the entire display to the right Force cursor to beginning of 1st line Force cursor to beginning of 2nd line 2 lines and 5x7 matrix
Power supply: The power supply should be of +5V, with maximum allowable transients of 10mv. To achieve a better / suitable contrast for the display, the voltage (VL) at pin 3 should be adjusted properly. A module should not be inserted or removed from a live circuit. The ground terminal of the power supply must be isolated properly so that no voltage is induced in it. The module should be isolated from the other circuits, so that stray voltages are not induced, which could cause a flickering display. Hardware: Develop a uniquely decoded E strobe pulse, active high, to accompany each module transaction. Address or control lines can be assigned to drive the RS and R/W inputs.
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Utilize the Hosts extended timing mode, if available, when transacting with the module. Use instructions, which prolong the Read and Write or other appropriate data strobes, so as to realize the interface timing requirements. If a parallel port is used to drive the RS, R/W and E control lines, setting the E bit simultaneously with RS and R/W would violate the modules set up time. A separate instruction should be used to achieve proper interfacing timing requirements. Mounting: Cover the display surface with a transparent protective plate, to protect the polarizer. Dont touch the display surface with bare hands or any hard materials. This will stain the display area and degrade the insulation between terminals. Do not use organic solvents to clean the display panel as these may adversely affect tape or with absorbent cotton and petroleum benzene. The processing or even a slight deformation of the claws of the metal frame will have effect on the connection of the output signal and cause an abnormal display. Do not damage or modify the pattern wiring, or drill attachment holes in the PCB. When assembling the module into another equipment, the space between the module and the fitting plate should have enough height, to avoid causing stress to the module surface. Make sure that there is enough space behind the module, to dissipate the heat generated by the ICs while functioning for longer durations. When an electrically powered screwdriver is used to install the module, ground it properly. While cleaning by a vacuum cleaner, do not bring the sucking mouth near the module. Static electricity of the electrically powered driver or the vacuum cleaner may destroy the module. Environmental precautions: Operate the LCD module under the relative condition of 40C and 50% relative humidity. Lower temperature can cause retardation of the blinking speed of the display, while higher temperature makes the overall display discolor.
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When the temperature gets to be within the normal limits, the display will be normal. Polarization degradation, bubble generation or polarizer peel-off may occur with high temperature and humidity. Contact with water or oil over a long period of time may cause deformation or color fading of the display. Condensation on the terminals can cause electro-chemical reaction disrupting the terminal circuit. 3.6.3 TROUBLE SHOOTING Introduction: When the power supply is given to the module, with the pin 3 (VL) connected to ground, all the pixels of a character gets activated in the following manner: All the characters of a single line display, as in CDM 16108. The first eight characters of a single line display, operated in the two-line display mode, as in CDM 16116. The first line of characters of a two-line display as in CDM 16216 and 40216. The first and third line of characters of a four-line display operated in the two-line display mode, as in CDM 20416. If the above mentioned does not occur, the module should be initialized by software. Make sure that the control signals E , R/W and RS are according to the interface timing requirements. Improper character display: When the characters to be displayed are missing between, the data read/write is too fast. A slower interfacing frequency would rectify the problem. When uncertainty is there in the start of the first characters other than the specified ones are rewritten, check the initialization and the software routine.
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In a multi-line display, if the displays of characters in the subsequent lines doesnt take place properly, check the DD RAM addresses set for the corresponding display lines. When it is unable to display data, even though it is present in the DD RAM, either the display on/off flag is in the off state or the display shift function is not set properly. When the display shift is done simultaneous with the data write operation, the data may not be visible on the display. If a character not found in the font table is displayed, or a character is missing, the CG ROM is faulty and the controllers IC have to be changed If particular pixels of the characters are missing, or not getting activated properly, there could be an assembling problem in the module. In case any other problems are encountered you could send the module to our factory for testing and evaluation. CRYSTALONICS DISPLAY Introduction: Crystalonics dot matrix (alphanumeric) liquid crystal displays are available in TN, STN types, with or without backlight. The use of C-MOS LCD controller and driver ICs result in low power consumption. These modules can be interfaced with a 4-bit or 8-bit micro processor /Micro controller. The built-in controller IC has the following features: Correspond to high speed MPU interface (2MHz) 80 x 8 bit display RAM (80 Characters max) 9,920 bit character generator ROM for a total of 240 character fonts. 208 character fonts (5 x 8 dots) 32 character fonts (5 x 10 dots) 64 x 8 bit character generator RAM 8 character generator RAM 8 character fonts (5 x 8 dots) 4 characters fonts (5 x 10 dots) Programmable duty cycles
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1/8 for one line of 5 x 8 dots with cursor 1/11 for one line of 5 x 10 dots with cursor 1/16 for one line of 5 x 8 dots with cursor Wide range of instruction functions display clear, cursor home, display on/off, cursor on/off, display character blink, cursor shift, display shift. Automatic reset circuit, that initializes the controller / driver ICs after power on.
Functional description of the controller IC register: The controller IC has two 8 bit registers, an instruction register (IR) and a data register (DR). The IR stores the instruction codes and address information for display data RAM (DD RAM) and character generator RAM (CG RAM). The IR can be written, but not read by the MPU. The DR temporally stores data to be written to /read from the DD RAM or CG RAM. The data written to DR by the MPU is automatically written to the DD RAM or CG RAM as an internal operation. When an address code is written to IR, the data is automatically transferred from the DD RAM or CG RAM to the DR. data transfer between the MPU is then completed when the MPU reads the DR. likewise, for the next MPU read of the DR, data in DD RAM or CG RAM at the address is sent to the DR automatically. Similarly, for the MPU write of the DR, the next DD RAM or CG RAM address is selected for the write operation. Busy flag: When the busy flag is1, the controller is in the internal operation mode, and the next instruction will not be accepted. When RS = 0 and R/W = 1, the busy flag is output to DB7. The next instruction must be written after ensuring that the busy flag is 0.
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Address counter: The address counter allocates the address for the DD RAM and CG RAM read/write operation when the instruction code for DD RAM address or CG RAM address setting, is input to IR, the address code is transferred from IR to the address counter. After writing/reading the display data to/from the DD RAM or CG RAM, the address counter increments/decrements by one the address, as an internal operation. The data of the address counter is output to DB0 to DB6 while R/W = 1 and RS = 0. Display data RAM(DD RAM): The characters to be displayed are written into the display data RAM (DD RAM), in the form of 8 bit character codes present in the character font table. The extended capacity of the DD RAM is 80 x 8 bits i.e. 80 characters. Character generator ROM (CG ROM): The character generator ROM generates 5 x 8 dot 5 x 10 dot character patterns from 8 bit character codes. It generates 208, 5 x 8 dot character patterns and 32, 5 x 10 dot character patterns. Interfacing the microprocessor/controller: The module, interfaced to the system, can be treated as RAM input/output, expanded or parallel I/O. Since there is no conventional chip select signal, developing a strobe signal for the enable signal (E) and applying appropriate signals to the register select (RS) and read/write (R/W) signals are important. The module is selected by gating a decoded module address with the host processors read/write strobe. The resultant signal, applied to the LCDs enable (E) input, clocks in the data. The E signal must be a positive going digital strobe, which is active while data and control information are stable and true. The falling edge of the enable signal enables the data /
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instruction register of the controller. All module timings are referenced to specific edges of the E signal. The E signal is applied only when a specific module transaction is desired. The read and write strobes of the host, which provides the E signals, should not be linked to the modules R/W line. An address bit which sets up earlier in the hosts machine cycle can be used as R/W. When the host processor is so fast that the strobes are too narrow to serve as the E pulse Prolong these pulses by using the hosts Ready input Prolong the host by adding wait states Decrease the Hosts Crystal frequency.
Inspite of doing the above mentioned, if the problem continues, latch both the data and control information and then activate the E signal. When the controller is performing an internal operation he busy flag (BF) will set and will not accept any instruction. The user should check the busy flag or should provide a delay of approximately 2ms after each instruction. The module presents no difficulties while interfacing slower MPUs.The liquid crystal display module can be interfaced, either to 4-bit or 8-bit MPUs.For 4-bit data interface, the bus lines DB4 to DB7 are used for data transfer, while DB0 to DB3 lines are disabled. The data transfer is complete when the 4-bit data has been transferred twice. The busy flag must be checked after the 4-bit data has been transferred twice. Two more 4-bit operations then transfer the busy flag and address counter data. For 8-bit data interface, all eight-bus lines (DB0 to DB7) are used.
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3.6.4 LCD INTERFACING

SENDING COMMANDS AND DATA TO LCDS WITH A TIME DELAY:
Fig 3.6.2 LCD interfacing To send any command from table 2 to the LCD, make pin RS=0. For data, make RS=1.Then place a high to low pulse on the E pin to enable the internal latch of the LCD.
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3.7 LIGHT EMITTING DIODE

3.7.1 Introduction: The term LED stands for Light Emitting Diode. Modern electronics relies heavily upon LED light bulbs. For instance, LEDs transmit information from remote controls, are used in traffic lights, digital LED clocks, flashlights, and to form images on jumbo television screens. These low-power, smaller-sized light emitting diode (LED) devices are based on the company's existing standard and high brightness silicon carbide (sic) product technology. These new devices consume 50% the power and represent cost savings over the current standard and high brightness blue and green LEDs. These devices are available in production quantities and are currently shipping into high volume consumer applications. Target applications for these new devices include cellular phones, high-resolution video boards and segmented LED displays. Physical function: A LED is a special type of semiconductor diode. Like a normal diode, it consists of a chip of semi conducting material impregnated, or doped, with impurities to create a structure called a p-n junction. As in other diodes, current flows easily from the p-side or anode to the nside, or cathode, but not in the reverse direction. Charge-carriers - electrons and holes flow into the junction from electrodes with different voltages. When an electron meets a hole, it falls into a lower energy level, and releases energy in the form of a photon as it does so. The wavelength of the light emitted, and therefore its color, depends on the band gap energy of the materials forming the p-n junction. In silicon or germanium diodes, the electrons and holes recombine by a non - radiative transition which produces no optical emission, because these are indirect band gap materials. The materials used for an LED have a direct band gap with energies corresponding to near-infrared, visible or near-ultraviolet light. LED development began with infrared and red devices made with gallium arsenide. Advances in materials science have made possible the production of devices with ever-shorter wavelengths, producing light in a variety of colors.
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3.7.2 Advantages and Disadvantages of LEDs: Advantages:
LEDs are capable of emitting light of an intended color without the use of color filters that traditional lighting methods require.
The shape of the LED package allows light to be focused. Incandescent and fluorescent sources often require an external reflector to collect light and direct it in a useable manner.
LEDs are insensitive to vibration and shocks, unlike incandescent and discharge sources. LEDs are built inside solid cases that protect them, making them hard to break and extremely durable.
LEDs have an extremely long life span: typically ten years, twice as long as the best fluorescent bulbs and twenty times longer than the best incandescent bulbs.
Further LEDs fail by dimming over time, rather than the abrupt burnout of incandescent bulbs.
LEDs give off less heat than incandescent light bulbs with similar light output. LEDs light up very quickly. An illumination LED will achieve full brightness in approximately 0.01 seconds, 10 times faster than an incandescent light bulb (0.1 second), and many times faster than a compact fluorescent lamp, which starts to come on after 0.5 seconds or 1 second, but does not achieve full brightness for 30 seconds or more. A typical red indicator LED will achieve full brightness in microseconds, or possibly less if it's used for communication devices.
Disadvantages:
LEDs are currently more expensive than more conventional lighting technologies. The additional expense partially stems from the relatively low lumen output (requiring more light sources) and drive circuitry/power supplies needed. A good measure to compare lighting technologies is lumen/dollar.
LED performance largely depends on the ambient temperature of the operating environment. "Driving" an LED 'hard' in high ambient temperatures may result in overheating of the LED package, eventually to device failure. Adequate heat sinking
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is required to maintain long life. This is especially important when considering automotive/military applications where the device must operate over a large range of temperatures, with government-regulated output.
3.7.3 LED applications: .LEDs are used as informative indicators in various types of embedded systems:
Status indicators, e.g. on/off lights on professional instruments and consumers audio/video equipment.
In toys, especially as light up "eyes" of robot toys. Seven segment displays, in calculators and measurement instruments, although now mostly replaced by liquid crystal displays.
Thin, lightweight message displays, e.g. in public information signs (at airports and railway stations and as destination displays for trains, buses, trams and ferries).
Red or yellow LEDs are used in indicator and [alpha] numeric displays in environments where night vision must be retained: aircraft cockpits, submarine and ship bridges, astronomy observatories, and in the field, e.g. night time animal watching and military field use.
LEDs may also be used to transmit digital information: Remote controls for TVs, VCRs, etc, using Infrared LEDs. In fiber optic communications. In dot matrix arrangements for displaying messages. LEDs find further application in safety devices, where high brightness and reliability are critical:
In traffic signals, LED clusters are replacing colored incandescent bulbs. In level crossing lights, red LEDs have been used to replace incandescent bulbs. In car brake and indicator lights, where the quick-on characteristic of LEDs enhances safety.
In bicycle lighting; also for pedestrians to be seen by car traffic. Signaling and emergency beacons or strobes.
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Navigation lights on boats, which are red, green, and white and shine in specific directions. Boats use direct current batteries to power their lights, so not only does that match the requirements of LEDs, but the efficiency of colored LEDs is a big advantage.
LEDs are also used for illumination:
In photographic darkrooms, red or yellow LEDs are also used for providing lighting, which does not lead to unwanted exposure of the film.
In flashlights (US) / torches (UK), and backlights for LCD screens. As a replacement for incandescent and fluorescent bulbs in home and office lighting, an application known as Solid State Lighting (SSL).
In projectors. LED projectors are smaller, lighter, and produce much less heat than incandescent technology.
3.8 REGULATED POWER SUPPLY

3.8.1 DESCRIPTION: A variable regulated power supply, also called a variable bench power supply, is one where you can continuously adjust the output voltage to your requirements. Varying the output of the power supply is the recommended way to test a project after having double checked parts placement against circuit drawings and the parts placement guide. This type of regulation is ideal for having a simple variable bench power supply. Actually this is quite important because one of the first projects a hobbyist should undertake is the construction of a variable regulated power supply. While a dedicated supply is quite handy e.g. 5V or 12V, it's much handier to have a variable supply on hand, especially for testing. Most digital logic circuits and processors need a 5 volt power supply. To use these parts we need to build a regulated 5 volt source. Usually you start with an unregulated power supply ranging from 9 volts to 24 volts DC (A 12 volt power supply is included with the Beginner Kit and the Microcontroller Beginner Kit.). To make a 5 volt power supply, we use a LM7805 voltage regulator IC .
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FIG 3.8.1 over view of regulator The LM7805 is simple to use. You simply connect the positive lead of your unregulated DC power supply (anything from 9VDC to 24VDC) to the Input pin, connect the negative lead to the Common pin and then when you turn on the power, you get a 5 volt supply from the Output pin. 78XX: The Bay Linear LM78XX is integrated linear positive regulator with three terminals. The LM78XX offer several fixed output voltages making them useful in wide range of applications. When used as a zener diode/resistor combination replacement, the LM78XX usually results in an effective output impedance improvement of two orders of magnitude, lower quiescent current. The LM78XX is available in the TO-252, TO-220 & TO-263packages,
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BLOCK DIAGRAM:
FIG 3.8.2 block diagram of power supply unit CIRCUIT FEATURES Brief description of operation: Gives out well regulated +5V output, output current capability of 100 mA Circuit protection: Built-in overheating protection shuts down output when regulator IC gets too hot
Circuit complexity: Very simple and easy to build

Circuit performance: Very stable +5V output voltage, reliable operation Availability of components: Easy to get, uses only very common basic components Applications: Part of electronics devices, small laboratory power supply Power supply voltage: Unregulated DC 8-18V power supply Power supply current: Needed output current + 5 mA Component costs: Few dollars for the electronics components + the input transformer cost
Design testing: Based on datasheet example circuit,I have used this circuit successfully as part of many electronics projects
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3.8.2 BASIC POWER SUPPLY CIRCUIT
Fig 3.8.3 cicuit diagram of a basic power supply unit BASIC POWER SUPPLY CIRCUIT Above is the circuit of a basic unregulated dc power supply. A bridge rectifier D1 to D4 rectifies the ac from the transformer secondary, which may also be a block rectifier such as WO4 or even four individual diodes such as 1N4004 types. (See later re rectifier ratings). The principal advantage of a bridge rectifier is you do not need a centre tap on the secondary of the transformer. A further but significant advantage is that the ripple frequency at the output is twice the line frequency (i.e. 50 Hz or 60 Hz) and makes filtering somewhat easier. As a design example consider we wanted a small unregulated bench supply for our projects. Here we will go for a voltage of about 12 - 13V at a maximum output current (IL) of 500ma (0.5A). Maximum ripple will be 2.5% and load regulation is 5%. Now the RMS secondary voltage (primary is whatever is consistent with your area) for our power transformer T1 must be our desired output Vo PLUS the voltage drops across D2 and D4 ( 2 * 0.7V) divided by 1.414. This means that Vsec = [13V + 1.4V] / 1.414 which equals about 10.2V. Depending on the VA rating of your transformer, the secondary voltage will vary considerably in accordance with the applied load. The secondary voltage on a transformer advertised as say 20VA will be much greater if the secondary is only lightly loaded.
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If we accept the 2.5% ripple as adequate for our purposes then at 13V this becomes 13 * 0.025 = 0.325 Vrms. The peak to peak value is 2.828 times this value. Vrip = 0.325V X 2.828 = 0.92 V and this value is required to calculate the value of C1. Also required for this calculation is the time interval for charging pulses. If you are on a 60Hz system it it 1/ (2 * 60 ) = 0.008333 which is 8.33 milliseconds. For a 50Hz system it is 0.01 sec or 10 milliseconds. Remember the tolerance of the type of capacitor used here is very loose. The important thing to be aware of is the voltage rating should be at least 13V X 1.414 or 18.33. Here you would use at least the standard 25V or higher (absolutely not 16V).With our rectifier diodes or bridge they should have a PIV rating of 2.828 times the Vsec or at least 29V. Don't search for this rating because it doesn't exist. Use the next highest standard or even higher. The current rating should be at least twice the load current maximum i.e. 2 X 0.5A or 1A. A good type to use would be 1N4004, 1N4006 or 1N4008 types. 3.8.3 BRIDGE RECTIFIER : A bridge rectifier makes use of four diodes in a bridge arrangement to achieve fullwave rectification. This is a widely used configuration, both with individual diodes wired as shown and with single component bridges where the diode bridge is wired internally. A bridge rectifier makes use of four diodes in a bridge arrangement as shown in fig(a) to achieve fullwave rectification. This is a widely used configuration, both with individual diodes wired as shown and with single component bridges where the diode bridge is wired internally.
Fig 3.8.4 Bridge Rectifier
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OPERATION: During positive half cycle of secondary, the diodes D2 and D3 are in forward biased while D1 and D4 are in reverse biased as shown in the fig(b). The current flow direction is shown in the fig (b) with dotted arrows.
Fig(B) During negative half cycle of secondary voltage, the diodes D1 and D4 are in forward biased while D2 and D3 are in reverse biased as shown in the fig(c). The current flow direction is shown in the fig (c) with dotted arrows.
Fig(C)
CONSTRUCTION The whole project MUST be enclosed in a suitable box. The main switch (preferably double pole) must be rated at 240V or 120V at the current rating. All exposed parts within the box MUST be fully insulated, preferably with heat shrink tubing.
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3.9 KEY PAD
3.9.1Fig Keypad Th The 12-Button telephone-like matrix keypad offers: Rugged gray plastic with white key. 3 x 4 Matrix Type 8-position solder pad Contact rating: 24VDC @ 20mA Contact resistance: 200 Ohms max.
Size: 77 x 56 x 15mm height DEDETAILS: This keypad provides a visually appealing way to get numeric data to your concontrol system. The board is a series of pushbutton switches that provide structured input for memeasuring user input. Output pins are 1-7, where pin 1 corresponds to the pin closest to the * key key.
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Table keypad output pins

K Keypad OOutput Pins 1 2 3 4 5 6 7 8 9 0 # * 2-3 1-2 2-5 3-7 1-7 5-7 3-6 1-6 5-6 1-4 4-5 3-4
Wire Keypad Interface:

This describes a possible technique for interfacing a AT89S52 to a standard 3x4 matrix keypad of the type commonly found in telephones. Interfacing these normally requires the use of 7 I/O lines. To implement this technique, some extra hardware is required over the
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standard solution which needs no other hardware. Six diodes are needed; these may be general purpose silicon signal diodes the schematic is shown below:
3.9.1 KEYBOARD SECTION

A 16 key matrix keyboard as shown below is used in this system.
D R I V E R S SENSORS
MM74C922 connects the rows to drivers (constant supply) and scans the columns on depression of any key to sense which key was depressed. It then encodes the key and sends the code to 8052. In this project we have used membrane key switch keyboard. This keyboard has a number of membrane switches present below the keys and there are no springs. On pressing a key an electric circuit is closed by two metallic contacts. On releasing the key, this circuit is broken. Due to the less moving parts this is a silent keyboard. Types of Keyboard: 1. Membrane keyboard Membrane keyboards are by far the most commonly used with computers. They are designed so that all the keycaps are positioned above rubber domes, which in turn are above a 3layer plastic membrane that spreads over the entire keyboard. When the user presses the keycap
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the full key travel distance, a contact point at the top of the rubber dome pushes the top layer through a hole in the middle layer to contact the bottom layer, creating a short circuit which generates the keystroke that is then sent to the computer. The middle layer of the membrane keeps the top and bottom layers from contacting each other except when a switch is depressed completely. Differences in the shape and thickness of the rubber domes determine the travel, resistance, and tactile feedback of the switch; however the keystrokes are only generated when the key is fully depressed. The travel distance is usually 'full-travel' i.e. 3.5 - 4.0 mm, and the elasticity of the rubber dome membrane returns the key to its default 'up' position. Membrane keyboards are typically inexpensive and can range from firm to soft feel depending on the design of the rubber dome, however most have a 'softer' feel due to the 'sponginess' of the dome. They are the least durable of keyboards, with ratings typically in the 0.5 to 5 million keystroke range. Over time some keys become inelastic and other overly elastic, creating a variance in how much force is required to type throughout the keyboard. This can be caused by various factors, including buildup of debris, rubber fatigue, manufacturing imperfections and even ultraviolet radiation. Another special case of rubber dome switch is conductive rubber. While this mechanical portion of the switch can be identical to a membrane keyboard (either simple rubber dome or scissors switch), the electrical portion only uses a single layer. The "pill" portion of the rubber dome is a specially-doped rubber which conducts electricity, so that when the switch bottoms out, the pill directly shorts out two different circuits to cause a switch action. 2. Mechanical keyboard Mechanical key switches are more intricate and of higher quality than membrane keyboards. Each key has its own independent key switch mechanism that will register when a key is pressed. For example on the mechanical key switch at right the keycap rests on top of the blue plunger mechanism which depresses into the unit. In most cases the key is actuated (that is the keystroke is generated and sent to the computer) halfway through the key travel distance. Finally, keys snap back to ready position quicker, allowing for faster typing speeds. All these features means there is both audible (clicks) and tactile (feel) feedback when we have successfully actuated a keystroke
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4. GSM MODEM AND AT-COMMANDS

4.1 GSM Fundamentals:
The Global System for Mobile Communications (GSM) is the most popular standard for mobile phones in the world. GSM phones are used by over a billion people across more than 200 countries. The ubiquity of the GSM standard makes international roaming very common between mobile phone operators, which enable phone users to access their services in many other parts of the world as well as their own country. GSM differs significantly from its predecessors in that both signaling and speech channels are digital, which means that it is seen as a second generation (2G) mobile phone system. This fact has also meant that data communication was built into the system from very early on. GSM is an open standard, which is currently developed by the 3GPP.From the point of view of the consumer, the key advantage of GSM systems has been higher digital voice quality and low cost alternatives to making calls such as text messaging. The advantage for network operators has been 8 the ability to deploy equipment from different vendors because the open standard allows easy inter-operability. Also, the standards have allowed network operators to offer roaming services, which mean the subscribers, can use their phone all over the world. GSM retained backward-compatibility with the original GSM phones as the GSM standard continued to develop, for example packet data capabilities were added in the Release '97 version of the standard, by means of GPRS. Higher speed data transmission has also been introduced with EDGE in the Release '99 version of the standard. 4.2 GSM SERVICES & GSM SECURITY: From the beginning, the planners of GSM wanted ISDN compatibility in terms of the services offered and the control signaling used. However, radio transmission limitations, in terms of bandwidth and cost, do not allow the standard ISDN B-channel bit rate of 64 kbps to be practically achieved. Using the ITU-T definitions, telecommunication services can be divided into bearer services, teleservices, and supplementary services. The most basic teleservice
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supported by GSM is telephony. As with all other communications, speech is digitally encoded and transmitted through the GSM network as a digital stream. There is also an emergency service, where the nearest emergency-service provider is notified by dialing three digits (similar to 911). A variety of data services is offered. GSM users can send and receive data, at rates up to 9600 bps, to users on POTS (Plain Old Telephone Service), ISDN, Packet Switched Public Data Networks, and Circuit Switched Public Data Networks using a variety of access methods and protocols, such as X.25 or X.32. Since GSM is a digital network, a modem is not required between the user and GSM network, although an audio modem is required inside the GSM network to interwork with POTS. Other data services include Group 3 facsimile, as described in ITU-T recommendation T.30, which is supported by use of an appropriate fax adaptor. A unique feature of GSM, not found in older analog systems, is the Short Message Service (SMS). SMS is a bi-directional service for short alphanumeric (upto160 bytes) Messages. Messages are transported in a store-and-forward fashion. For point-to-point SMS, a message can be sent to another subscriber to the service, and an of receipt acknowledgement is provided to the sender. SMS can also be used in a cell-broadcast mode, for sending messages such as traffic updates or news updates. Messages can also be stored in the SIM card for later retrieval. Supplementary services are provided on top of tele services or bearer services. In the current (Phase I) specifications, they include several forms of call forward (such as call forwarding when the mobile subscriber is unreachable by the network), and call barring of outgoing or incoming calls, for example when roaming in another country. Many additional supplementary services will be provided in the specifications, such as caller identification, call waiting, multi-party conversations. GSM SECURITY: GSM was designed with a moderate level of security. The system was designed to authenticate the subscriber using shared-secret cryptography. Communications between the subscriber and the base station can be encrypted. The development of UMTS introduces an optional USIM, that uses a longer authentication key to give greater security, as well as mutually authenticating the network and the user - whereas GSM only authenticated the user to the
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network (and not vice versa).
The security model therefore offers confidentiality and
authentication, but limited authorization capabilities, and no non-repudiation. GSM uses several cryptographic algorithms for security. The A5/1 and A5/2 stream ciphers are used for ensuring over the- air voice privacy. A5/1 was developed first and is a stronger algorithm used within Europe and the United States; A5/2 is weaker and used in countries that may not be able to support the infrastructure necessary for A5/1. A large security advantage of GSM is that the Ki, the crypto variable stored on the SIM card that is the key to any GSM ciphering algorithm, is never sent over the air interface. Serious weaknesses have been found in both algorithms, and it is possible to break A5/2 in realtime in a cipher text-only attack.
4.3 GSM INTERFACING

Interfacing with PC:
Fig 4.3.1 GSM interfacing with pc The GSM modem consists of a SIMCOM300 GSM module which is interfaced with the MAX232 level converter with DB9 connector. The modem and the PC can be connected using DB9 data cable via serial port of the PC. The modem can be tested by connecting with PC and sending AT commands and notifying how it responds
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to AT-Commands. With the modem, open a terminal application. Communication settings should be found in the modem datasheet. In our application we required the settings of 9600 Baud-rate, 8 Data-bits, None-Parity, 1 Stop-bit and Hardware Flow control as shown in below figure. Now the connected system should enable sending ATCommands from the terminal window. Test with AT to verify this.
4.4 ADVANTAGES & USES OF GSM: 1. Roaming with GSM phones is a major advantage over the competing technology as roaming across CDMA networks. 2. Another major reason for the growth in GSM usage, particularly between 1998 to 2002, was the availability of prepaid calling from mobile phone operators. This allows people who are either unable or unwilling to enter into a contract with an operator to have mobile phones. Prepaid also enabled the rapid expansion of GSM in many developing countries where large sections of the population do not have access to banks or bank accounts and countries where there are no effective credit rating agencies. (In the USA, starting a non-prepaid contract with a cellular phone operator is almost always subject to credit verification through personal information provided by credit rating agencies). 3. The architecture of GSM allows for rapid flow of information by voice or data messaging (SMS). Users now have access to more information, whether personal, technical, economic or political, more quickly than was possible before the global presence of GSM. Even remote communities are able to integrate into networks (sometimes global) thereby making information, knowledge and culture accessible, in theory, to anyone. 4. One of the most appealing aspects of wireless communications is its mobility. Much of the success of GSM is due to its mobility management, offering users the freedom and convenience to conduct business from almost anywhere at any time.
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5. GSM has been the catalyst in the tremendous shift in traffic volume from fixed networks to mobile networks. This has resulted in the emergence of a mobile paradigm, whereby the mobile phone has become the first choice of personal phone. 6. Higher digital voice quality. 7. Low cost alternatives to making calls such a text messaging. USES OF GSM:

Uses encryption to make phone calls more secure Data networking Group III facsimile services Short Message Service (SMS) for text messages and paging Call forwarding Caller ID U Call waiting. Multi-party conferencing
After a few turbulent years for the industry, we highlight some of the key factors we view as critical for the continued success of GSM. These include:

Enabling convergence with other wireless technologies Developing Mobile Centric Applications Evolving the mobile business model Mobile terminal enhancements and variety Fostering industry partnerships and co-operations
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Interoperability and Inter-generational roaming between various platforms.
4.5 GSM AT- COMMANDS

When a modem is connected to any device (computer, fax, etc.,) we need AT commands to direct the modem for its operations. Basically we send commands directly to the modem after activating Terminal mode . This mode is also called as local mode or direct mode. Apart from the basic AT commands, to send the SMS message, it is required to have some special AT commands. The basic regularly used AT commands along with the SMS AT commands are discussed below. THE AT COMMAND FORMAT Instructions sent to the modem are referred as AT commands because they are always preceded by a prefix AT that are used to get the attention of the modem <AT> <COMMAND>{Argument}{=n}<enter> AT - attention code Command - a command consists of one letter Argument - Optional information that further defines the command =n - used when setting a register you may string commands together in one command line as long as the total length of command does not exceed 63 bytes . The attention code, AT, is only required at the beginning of the command line. A/, +++ are the only two commands which are not preceded by AT.
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Using AT Commands When issued to the fax modem, AT commands direct the fax modem to dial, answer, hang up, and to perform many other communication tasks. Some of the most commonly used commands are: AT (Attention). This is the command line prefix. (All the commands listed , except A/ and +++, must be preceded by the command AT). A Answer an incoming call D Dial the following phone number E Turn echo OFF H Hang up O Return to on-line state Z Reset the modem to the values stored in the N.V. Ram +++ Return to the Command State A/ Repeat last command (Do not precede this command with AT or follow it with <Enter>)
Request revision identification +CGMR
Description : This command is used to get the revised software version.
Preferred Message Storage +CPMS Description:
This command allows the message storage area to be selected (for reading, writing, etc).
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Syntax:
Defined values : <mem1>: Memory used to list, read and delete messages. It can be: - SM - BM - SR ME non volatile memory) Note : SR ME non volatile memory is cleared when another SIM card is inserted. It is kept, even after a reset, while the same SIM card is used.
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: SMS message storage in SIM (default) : CBM message storage (in volatile memory). : Status Report message storage (in SIM if the EF-SMR file exists, otherwise in the
<mem2> : Memory used to write and send messages - SM : SMS message storage in SIM (default).
If the command is correct, the following message indication is sent: +CPMS: <used1>,<total1>,<used2>,<total2> When <mem1> is selected, all following +CMGL, +CMGR and +CMGD commands are related to the type of SMS stored in this memory. Preferred Message Format +CMGF Description : The message formats supported are text mode and PDU mode. In PDU mode, a complete SMS Message including all header information is given as a binary string (in hexadecimal format). Therefore, only the following set of characters is allowed: {0,1,2,3,4,5,6,7,8,9, A, B,C,D,E,F}. Each pair or characters is converted to a byte (e.g.: 41 is converted to the ASCII character A, whose ASCII code is 0x41 or 65). In Text mode, all commands and responses are in ASCII characters. The format selected is stored in EEPROM by the +CSAS command. Syntax :
Example, sending an SMS Message in PDU mode
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Defined values :
The <pdu> message is composed of the SC address ( 00 means no SC address given, use default SC address read with +CSCA command) and the TPDU message. In this example, the length of octets of the TPDU buffer is 14, coded as GSM 03.40 In this case the TPDU is : 0x01 0x03 0x06 0x91 0x21 0x43 0x65 0x00 0x00 0x04 0xC9 0xE9 0x34 0x0B, which means regarding GSM 03.40 : <fo> <mr> (TP TP-MR) <da> (TP TP-DA) <pid> (TP TP-PID) <dcs> (TP TP-DCS) 0x01 (SMS-SUBMIT, no validity period) 0x03 (Message Reference) 0x06 0x91 0x21 0x43 0x65 (destination address +123456) 0x00 (Protocol Identifier) 0x00 (Data Coding Scheme : 7 bits alphabet)
<length> (TP TP-UDL) 0x04 (User Data Length, 4 characters of text) TP-UD 0xC9 0xE9 0x34 0x0B (User Data : ISSY)
TPDU in hexadecimal format must be converted into two ASCII characters, e.g. octet with hexadecimal value 0x2A is presented to the ME as two characters 2 (ASCII 50) and A (ASCII 65). Read message +CMGR Description :
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This command allows the application to read stored messages. The messages are read from the memory selected by +CPMS command. Syntax : Command syntax : AT+CMGR=<index> Response syntax for text mode: +CMGR :<stat>,<oa>,[<alpha>,] <scts> [,<tooa>,<fo>, <pid>,<dcs>,<sca>,<tosca>,<length>] <CR><LF> <data> (for SMS MS MS-DELIVER only) +CMGR : <stat>,<da>,[<alpha>,] [,<toda>,<fo>,<pid>,<dcs>, [<vp>], <sca>, <tosca>,<length>]<CR><LF> <data> (for SMS-SUBMIT only) +CMGR : <stat>,<fo>,<mr>,[<ra>],[<tora>],<scts>,<dt>,<st> (for SMS SMS- STATUSREPORT only) Response syntax for PDU mode : +CMGR: <stat>, [<alpha>] ,<length> <CR><LF> <pdu> A message read with status REC UNREAD will be updated in memory with the status REC READ.Note : the <stat> parameter for SMS Status Reports is always READ. Example :
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New message indication +CNMI Description : This command selects the procedure for message reception from the network. Syntax :
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Defined values : <mode> : controls the processing of unsolicited result codes Only <mode>=2 is supported. Any other value for <mode> (0,1 or 3) is accepted (return code will be OK), but the processing of unsolicited result codes will be the same as with<mode>=2. <mode> 0: Buffer unsolicited result codes in the TA. If TA result code buffer is full, indications can be buffered in some other place or the oldest indications may be discarded and replaced with the new received indications 1: Discard indication and reject new received message unsolicited result codes when TA-TE link is reserved. Otherwise forward them directly to the TE 2: Buffer unsolicited result codes in the TA when TA-TE link is reserved and flush them to the TE after reservation. Otherwise forward them directly to the TE 3: Forward unsolicited result codes directly to the TE. TA-TE link specific inband used to embed result codes and data when TA is in on-line data mode <mt> : sets the result code indication routing for SMS-DELIVERs. Default is 0. <mt> 0: No SMS-DELIVER indications are routed. 1: SMS-DELIVERs are routed using unsolicited code : +CMTI: SM,<index> 2: SMS-DELIVERs (except class 2 messages) are routed using unsolicited code : +CMT : [<alpha>,] <length> <CR> <LF> <pdu> (PDU mode) or +CMT : <oa>,[<alpha>,] <scts>
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[,<tooa>, <fo>, <pid>, <dcs>, <sca>, <tosca>, <length>] <CR><LF><data> (text mode) 3: Class 3 SMS-DELIVERS are routed directly using code in <mt>=2 ; Message of other classes result in indication <mt>=1 <bm>: set the rules for storing received CBMs (Cell Broadcast Message) types depend on its
coding scheme, the setting of Select CBM Types (+CSCB command) and <bm>. Default is 0. <bm> 0: No CBM indications are routed to the TE. The CBMs are stored. 1: The CBM is stored and an indication of the memory location is routed to the customer application using unsolicited result code: +CBMI: BM, <index> 2: New CBMs are routed directly to the TE using unsolicited result code. +CBM: +CBM: <length><CR><LF><pdu> (PDU mode) or <sn>,<mid>,<dcs>,<page>,<pages>(Text mode) <CR><LF> <data>
3: Class 3 CBMs : as <bm>=2. Other classes CBMs : as <bm>=1. <ds> for SMS-STATUS-REPORTs. Default is 0. <ds> 0: No SMS-STATUS-REPORTs are routed. 1: SMS-STATUS-REPORTs are routed using unsolicited code : +CDS : <length> <CR> <LF> <pdu> (PDU mode) or +CDS : <fo>,<mr>, [<ra>], [<tora>], <scts>,<dt>,<st> (Text mode) 2: SMS-STATUS-REPORTs are stored and routed using the unsolicited result code :
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+CDSI: SR,<index> <bfr> <bfr> 0: TA buffer of unsolicited result codes defined within this command is flushed to the TE when <mode> 13 is entered (OK response shall be given before flushing the codes) 1: TA buffer of unsolicited result codes defined within this command is cleared when <mode> 13 is entered. 4.6 Fabrication Process: PCB FABRICATION The fabrication of a PCB includes four steps. Preparing the PCB pattern. Transferring the pattern onto the PCB. Developing the PCB. Finishing (i.e.) drilling, cutting, smoothing, turning etc. Pattern designing is the primary step in fabricating a PCB. In this step, all interconnection between the components in the given circuit are converted into PCB tracks. Several factors such as positioning the diameter of holes, the area that each component would occupy, the type of end terminal should be considered. Transferring the PCB Pattern The copper side of the PCB should be thoroughly cleaned with the help of alcoholic spirit or petrol. It must be completely free from dust and other contaminants. The mirror image of the pattern must be carbon copied and to the laminate the complete pattern may now be made each resistant with the help of paint and thin brush. Developing
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Default is 0.
In this developing all excessive copper is removed from the board and only the printed pattern is left behind. About 100ml of tap water should be heated to 75 C and 30.5 grams of FeCl3 added to it, the mixture should be thoroughly stirred and a few drops of HCl may be added to speed up the process. The board with its copper side facing upward should be placed in a flat bottomed plastic tray and the aqueous solution of FeCl2 poured in the etching process would take 40 to 60 min to complete. After etching the board it should be washed under running water and then held against light .the printed pattern should be cleanly visible. The paint should be removed with the help of thinner. Finishing Touches: After the etching is completed, hole of suitable diameter should be drilled, then the PCB may be tin plated using an ordinary 35 Watts soldering rod along with the solder core, the copper side may be given a coat of varnish to prevent oxidation. Drilling: Drills for PCB use usually come with either a set of collects of various sizes or a 3-Jaw chuck. For accuracy however 3-jaw chunks arent brilliant and small drill below 1 mm from grooves in the jaws preventing good grips. Soldering: Begin the construction by soldering the resistors followed by the capacitors and the LEDs diodes and IC sockets. Dont try soldering an IC directly unless you trust your skill in soldering. All components should be soldered as shown in the figure. Now connect the switch and then solder/screw if on the PCB using multiple washers or spaces. Soldering it directly will only reduce its height above other components and hamper in its easy fixation in the cabinet. Now connect the battery lead. Assembling: The circuit can be enclosed in any kind of cabinet. Before fitting the PCB suitable holes must be drilled in the cabinet for the switch, LED and buzzer. Note that a rotary switch can be used instead of a slide type. Switch on the circuit to be desired range. It will automatically start its timing cycles. To be sure that it is working properly watch the LED flash. The components are selected to trigger the alarm a few minutes before the set limit. The fabrication of one demonstration unit is carried out in the following sequence: 1.Finalizing the total circuit diagram, listing out the components and their sources of procurement. 2. Procuring the components, testing the components and screening the components.
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3. Making layout, preparing the inter connection diagram as per the circuit diagram, preparing the drilling details, cutting the laminate to the required size. 4. Drilling the holes on the board as per the component layout, painting the tracks on the board as per inter connection diagram. 5. Etching the board to remove the un-wanted copper other than track portion. Then cleaning the board with water, and solder coating the copper tracks to protect the tracks from rusting or oxidation due to moisture. 6. Assembling the components as per the component layout and circuit diagram and soldering components. 7. Integrating the total unit inter wiring the unit and final testing the unit. 8. Keeping the unit ready for demonstration.
PCB FABRICATION DETAILS: The Basic raw material in the manufacture of PCB is copper cladded laminate. The laminate consists of two or more layers insulating reinforced materials bonded together under heat and pressure by thermo setting resins used are phenolic or epoxy. The reinforced materials used are electrical grade paper or woven glass cloth. The laminates are manufactured by impregnating thin sheets of reinforced materials (woven glass cloth or electrical grade paper) with the required resin (Phenolic or epoxy). The laminates are divided into various grades by National Electrical Manufacturers association (NEMA). The nominal overall thickness of laminate normally used in PCB industry is 1.6mm with copper cladding on one or two sides. The copper foil thickness is 35 Microns (0.035mm) OR 70 Microns (0.070 mm). The next stage in PCB fabrication is artwork preparation. The artwork (Mater drawing) is essentially a manufacturing tool used in the fabrication of PCBs. It defines the pattern to be generated on the board. Since the artwork is the first of many process steps in the Fabrication of PCBs. It must be very accurately drawn. The accuracy of the finished board depends on the accuracy of artwork.
Normally, in industrial applications the artwork is drawn on an enlarged scale and photographically reduced to required size. It is not only easy to draw the enlarged dimensions but also the errors in the artwork correspondingly get reduced during photo reduction. For ordinary application of simple single sided boards artwork is made on ivory art paper using drafting aids. After taping on a art paper and
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phototraphy (Making the ve) the image of the photo given is transformed on silk screen for screen printing. After drying the paint, the etching process is carried out. This is done after drilling of the holes on the laminate as per the components layout. The etching is the process of chemically removing un-wanted copper from the board. The next stage after PCB fabrication is solder masking the board to prevent the tracks from corrosion and rust formation. Then the components will be assembled on the board as per the component layout. The next stage after assembling is the soldering the components. The soldering may be defined as process where in joining between metal parts is produced by heating to suitable temperatures using non-ferrous filler metals has melting temperatures below the melting temperatures of the metals to be joined. This non-ferrous intermediate metal is called solder. The solders are the alloys of lead and tin.
5 . MEMS (MICRO ELECTRO MECHANICAL SYSTEMS)

The MEMS (Micro Electro Mechanical System) which consists of a 3-axis accelerometer which gives output based on three axis movement. This setup is fixed on the road vehicles and during normal movement (X-axis), the accelerometer output is nearly constant. When any accident occurs the MEMS sensor gives unbalanced or high axis output value (depends on vehicle position), and then the microcontroller reads the value and expects for the normal movement output value again on same axis (X-axis). If the output is not returning back to normal value within the specific time then the microcontroller commands the GSM modem and send a SMS about the accident to any predefined numbers such as ambulance or police or any other numbers to intimate the accident. Micro-Electro-Mechanical Systems (MEMS) is the integration of mechanical elements, sensors, actuators, and electronics on a common silicon substrate through micro fabrication technology. While the electronics are fabricated using integrated circuit (IC) process sequences (e.g., CMOS, Bipolar, or BICMOS processes). MEMS promises to revolutionize nearly every product category by bringing together silicon-based microelectronics with micromachining technology, making possible the realization of complete systems-on-a-chip. MEMS is an enabling technology allowing the
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development of smart products, augmenting the computational ability of microelectronics with the perception and control capabilities of micro sensors and micro actuators and expanding the space of possible designs and applications. Microelectronic integrated circuits can be thought of as the "brains" of a system and MEMS augments this decision-making capability with "eyes" and "arms", to allow micro systems to sense and control the environment. Sensors gather information from the environment through measuring mechanical, thermal, biological, chemical, optical, and magnetic phenomena. The electronics then process the information derived from the sensors and through some decision making capability direct the actuators to respond by moving, positioning, regulating, pumping, and filtering, thereby controlling the environment for some desired outcome or purpose. Because MEMS devices are manufactured using batch fabrication techniques similar to those used for integrated circuits, unprecedented levels of functionality, reliability, and sophistication can be placed on a small silicon chip at a relatively low cost. Accelerometers MEMS accelerometers are quickly replacing conventional accelerometers for crash air-bag deployment systems in automobiles. The conventional approach uses several bulky accelerometers made of discrete components mounted in the front of the car with separate electronics near the air-bag; this approach costs over $50 per automobile. MEMS and Nanotechnology has made it possible to integrate the accelerometer and electronics onto a single silicon chip at a cost between $5 to $10. These MEMS accelerometers are much smaller, more functional, lighter, more reliable, and are produced for a fraction of the cost of the conventional macro scale accelerometer elements. Current Challenges MEMS are currently used in low- or medium-volume applications. Limited Options Most companies who wish to explore the potential of MEMS and Nanotechnology have very limited options for prototyping or manufacturing devices, and have no capability or expertise in micro fabrication technology. Few companies will build their own fabrication
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facilities because of the high cost. A mechanism giving smaller organizations responsive and affordable access to MEMS and Nano fabrication is essential. Packaging The packaging of MEMS devices and systems needs to improve considerably from its current primitive state. MEMS packaging is more challenging than IC packaging due to the diversity of MEMS devices and the requirement that many of these devices be in contact with their environment. Currently almost all MEMS and must develop a new and specialized package for each new device. Most companies find that packaging is the single most expensive and time consuming task in their overall product development program. As for the components themselves, numerical modeling and simulation tools for MEMS packaging are virtually non-existent. Approaches which allow designers to select from a catalog of existing standardized packages for a new MEMS device without compromising performance would be beneficial.
6. SOFTWARE
ABOUT SOFTWARE Softwares used are: *Keil software for c programming *Express PCB for lay out design *Express SCH for schematic design What's New in Vision3? Vision3 adds many new features to the Editor like Text Templates, Quick Function Navigation, and Syntax Coloring with brace high lighting Configuration Wizard for dialog based startup and debugger setup. Vision3 is fully compatible to Vision2 and can be used in parallel with Vision2. What is Vision3? Vision3 is an IDE (Integrated Development Environment) that helps you write, compile, and debug embedded programs. It encapsulates the following components:
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A project manager. A make facility. Tool configuration. Editor. A powerful debugger.
To help you get started, several example programs (located in the \C51\Examples, \C251\Examples, \C166\Examples, and \ARM\...\Examples) are provided. HELLO is a simple program that prints the string "Hello World" using the Serial Interface. MEASURE is a data acquisition system for analog and digital systems. TRAFFIC is a traffic light controller with the RTX Tiny operating system. SIEVE is the SIEVE Benchmark. DHRY is the Dhrystone Benchmark. WHETS is the Single-Precision Whetstone Benchmark.
Additional example programs not listed here are provided for each device architecture. Building an Application in Vision2 To build (compile, assemble, and link) an application in Vision2, you must:

Select Project -(forexample,166\EXAMPLES\HELLO\HELLO.UV2). Select Project - Rebuild all target files or Build target. Vision2 compiles, assembles, and links the files in your project.
6.1 Overview of Keil cross C compiler: It is possible to create the source files in a text editor such as notepad, run the compiler On each c source file, specifying a list of controls, run the Assembler on each Assembler Source file, specifying another list of controls, run either the Library Manager or Linker (Again specifying a list of controls) and finally running the Object-HEX converter to convert The linker output file to an Intel HEX File. Once that has been completed the HEX File can
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Be downloaded to the target hardware and debugged. Alternatively KEIL can be used to Create source files; automatically compile, link and convert using options set with an easy to Use user interface and finally stimulate or perform debugging on the hardware with access to C variables and memory. Unless you have to use the tolls on the command line, the choice is Clear. KEIL Greatly simplifies the process of creating and testing an embedded application. Creating Your Own Application in Vision2 To create a new project in Vision2, you must:

Select Project - New Project. Select a directory and enter the name of the project file. Select Project - Select Device and select an 8052, 251, or C16x/ST10 device from the Device Database.
Create source files to add to the project. Select Project - Targets, Groups, Files. Add/Files, select Source Group1, and add the source files to the project.
Select Project - Options and set the tool options. Note when you select the target device from the Device Database all special options are set automatically. You typically only need to configure the memory map of your target hardware. Default memory model settings are optimal for most applications.
Select Project - Rebuild all target files or Build target.
Debugging an Application in Vision2 To debug an application created using Vision2, you must:

Select Debug - Start/Stop Debug Session. Use the Step toolbar buttons to single-step through your program. You may enter G, main in the Output Window to execute to the main C function.
Open the Serial Window using the Serial #1 button on the toolbar. Debug your program using standard options like Step, Go, Break, and so on.
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Starting Vision2 and creating a Project Vision2 is a standard Windows application and started by clicking on the program icon. To create a new project file select from the Vision2 menu Project New Project. This opens a standard Windows dialog that asks you for the new project file name. We suggest that you use a separate folder for each project. You can simply use the icon Create New Folder in this dialog to get a new empty folder. Then select this folder and enter the file name for the new project, i.e. Project1. Vision2 creates a new project file with the name PROJECT1.UV2 which contains a default target and file group name. You can see these names in the Project Window Files. Now use from the menu Project Select Device for Target and select a CPU for your project. The Select Device dialog box shows the Vision2 device database. Just select the microcontroller you use. We are using for our examples the Philips 80C51RD+ CPU. This selection sets necessary tool options for the 80C51RD+ device and simplifies in this way the tool Configuration Building Projects and Creating a HEX Files Typical, the tool settings under Options Target are all you need to start a new application. You may translate all source files and line the application with a click on the Build Target toolbar icon. When you build an application with syntax errors, Vision2 will display errors and warning messages in the Output
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Window Build page. A double click on a message line opens the source file on the correct location in a Vision2 editor window. Once you have successfully generated your application you can start debugging. After you have tested your application, it is required to create an Intel HEX file to download the software into an EPROM programmer or simulator. Vision2 creates HEX files with each build process when Create HEX files under Options for Target Output is enabled. You may start your PROM programming utility after the make process when you specify the program under the option Run User Program #1.
CPU Simulation Vision2 simulates up to 16 Mbytes of memory from which areas can be mapped for read, write, or code execution access. The Vision2 simulator traps and reports illegal memory accesses. In addition to memory mapping, the simulator also provides support for the integrated peripherals of the various 8052 derivatives. The on-chip peripherals of the CPU you have selected are configured from the Device Database selection you have made when you create your project target. Refer to page 58 for more Information about selecting a device. You may select and display the on-chip peripheral components using the Debug menu. You can also change the aspects of each peripheral using the controls in the dialog boxes. Start Debugging
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You start the debug mode of Vision2 with the Debug Start/Stop Debug Session command. Depending on the Options for Target Debug Configuration, Vision2 will load the application program and run the startup code Vision2 saves the editor screen layout and restores the screen layout of the last debug session. If the program execution stops, Vision2 opens an editor window with the source text or shows CPU instructions in the disassembly window. The next executable statement is marked with a yellow arrow. During debugging, most editor features are still available. For example, you can use the find command or correct program errors. Program source text of your application is shown in the same windows. The Vision2 debug mode differs from the edit mode in the following aspects: _ The Debug Menu and Debug Commands described on page 28 are Available. The additional debug windows are discussed in the following. _ The project structure or tool parameters cannot be modified. All build Commands are disabled. Disassembly Window The Disassembly window shows your target program as mixed source and assembly program or just assembly code. A trace history of previously executed instructions may be displayed with Debug View Trace Records. To enable the trace history, set Debug Enable/Disable Trace Recording. If you select the Disassembly Window as the active window all program step commands work on CPU instruction level rather than program source lines. You can select a text line and set or modify code breakpoints using toolbar buttons or the context menu commands. You may use the dialog Debug Inline Assembly to modify the CPU instructions. That allows you to correct mistakes or to make temporary changes to the target program you are debugging.
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6.2 Steps for Executing Keil Programs: 1. Click on the Keil uVision Icon on Desktop 2. The following fig will appear
3. Click on the Project menu from the title bar 4. Then Click on New Project
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5. Save the Project by typing suitable project name with no extension in u r own folder sited in either C:\ or D:\
6. Then Click on save button above. 7. Select the component for u r project. i.e. Atmel
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8. Click on the + Symbol beside of Atmel
9. Select AT89C51 as shown below
10. Then Click on OK 11. The Following fig will appear

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12. Then Click either YES or NOmostly NO 13. Now your project is ready to USE 14. Now double click on the Target1, you would get another option Source group 1 as shown in next page.
15. Click on the file option from menu bar and select new
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16.The next screen will be as shown in next page, and just maximize it by double clicking on its blue boarder.
17. Now start writing program in either in C or ASM 18. For a program written in Assembly, then save it with extension . asm and for C based program save it with extension .C
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19.Now right click on Source group 1 and click on Add files to Group Source
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20. Now you will get another window, on which by default C files will appear.
21. Now select as per your file extension given while saving the file 22. Click only one time on option ADD 23. Now Press function key F7 to compile. Any error will appear if so happen.
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24. If the file contains no error, then press Control+F5 simultaneously. 25. The new window is as follows
26.Then Click OK
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27. Now Click on the Peripherals from menu bar, and check your required port as shown in fig below
28.Drag the port a side and click in the program file.
29. Now keep Pressing function key F11 slowly and observe.
30. You are running your program successfully 106
6.3 SOURCE CODE:

#include <REGX51.H> #include<UART.h> #include<lcd.h> #include<gsm.c> void get_axis(); sbit lock = P2^0; sbit cval = P2^1; sbit oval = P2^2; unsigned char z; int xaxis, yaxis; unsigned char tmp, *lon=0x50; // *lat=0x50, *lon=0x80; //, patt[]="GPRMC", tmp,i; sbit a = P3^4; //sbit b = P3^3; //sbit c = P3^2; unsigned char d1,d2,d3, xval; void ext(void) interrupt 0 using 1 { while(P3_2==0); flag=1; } void delay_wait() { unsigned int i; 107
for(i=0; i<=25000; i++); } void main() { cval=0; oval=1; init_lcd(); serial_init(); init_gsm(); del(); command(0x01); command(0x80); prints(" Embedded "); command(0xc0); prints(" Smart Vehicle "); delay_wait(); command(0x01); command(0x80); prints(" Developed on: "); command(0xc0); prints("15-03-2011, v1.0"); delay_wait(); while(1) { get_axis(); 108 //device //lcd init
if(lock==1) { get_axis(); command(0x01); command(0x80); prints("lock mode.."); if(xaxis<122 || xaxis>127 || yaxis<122 || yaxis>127) { send("Vehicle theft Detected","9603641895"); msdelay(1500); msdelay(1000); check_ifsms(); msdelay(1000); read(); rec=0x40; command(0x01); command(0x80); prints(rec); msdelay(700); command(0x01); command(0x80); if(!strcmp(rec,"123")) { cval=1; 109
oval=0; prints("Vehicle Locked"); } del(); msdelay(1500); msdelay(1000); check_ifsms(); msdelay(1000); read(); rec=0x40; command(0x01); command(0x80); prints(rec); msdelay(700); command(0x01); command(0x80); if(!strcmp(rec,"123")) { cval=0; oval=1; prints("Vehicle Unlocked"); } while(1); } } 110
if(lock==0) { command(0x01); command(0x80); prints("run mode.."); get_axis();
if(xaxis<115 || xaxis>135 || yaxis<115 || yaxis>135) { send("Vehicle Accident Detected","9603641895"); del(); while(1); } } } } void get_axis() { command(0x80); printc('1'); a=0; printc('2'); xaxis = P1; printc('3'); 111
// xval = xval/10; d1=(xaxis/100)+0x30; d2=((xaxis%100)/10)+0x30; d3=(xaxis%10)+0x30; command(0xc0); printc(d1); printc(d2); printc(d3); printc('-'); a=1; yaxis = P1; // xval = xval/10; d1=(yaxis/100)+0x30; d2=((yaxis%100)/10)+0x30; d3=(yaxis%10)+0x30; command(0xc4); printc(d1); printc(d2); printc(d3); }
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7. APPLICATIONS
As a security System
As Accident Report System
7.1 MERITS:

Low Cost Less Complexity Huge Scope For Research And Development
7.2 DEMERITS:
The only dis merit of this project is this can be used in the place where signal strength is high
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8. CONCLUSION
The project DESIGN & DEVELOPMENT OF GSM BASED VEHICLE THEFT CONTROL
SYSTEM has been successfully designed and tested.
It has been developed by integrating features of all the hardware components used. Presence of every module has been reasoned out and placed carefully thus contributing to the best working of the unit. Secondly, using highly advanced ICs and with the help of growing technology the project has been successfully implemented. Finally we conclude that DESIGN & DEVELOPMENT OF GSM BASED VEHICLE
THEFT CONTROL SYSTEM is an emerging field and there is a huge scope for research and
development.
FUTURE ENHANCEMENT
We can enhance this project by using the GPRS technology using which we can able to locate the exact position of the automobile.
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9. Bibliography
The 8052 Micro controller and Embedded Systems -Muhammad Ali Mazidi & Janice Gillispie Mazidi The 8052 Micro controller Architecture, Programming & Applications -Kenneth J.Ayala Fundamentals Of Micro processors and Micro computers -B.Ram Micro processor Architecture, Programming & Applications -Ramesh S. Gaonkar Electronic Components -D.V. Prasad Wireless Communications - Theodore S. Rappaport Mobile Tele Communications - William C.Y. Lee
References on the Web:
www.national.com www.atmel.com www.microsoftsearch.com www.geocities.com
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GSM BASED VEHICLE THEFT CONTROL SYSTEM

GSM BASED VEHICLE THEFT CONTROL SYSTEM

Fig 1.1 Typical embedded sysytem organisation

GSM BASED VEHICLE THEFT CONTROL SYSTEM

1.4 APPLICATIONS OF EMBEDDED SYSTEMS:

GSM BASED VEHICLE THEFT CONTROL SYSTEM

GSM BASED VEHICLE THEFT CONTROL SYSTEM

2. BLOCK DIAGRAM AND SCHEMATIC DIAGRAM

FIG 2.1 Block diagram of vehicle theft control system

2.2 BLOCK DIAGRAM EXPLANATION:

GSM BASED VEHICLE THEFT CONTROL SYSTEM

GSM BASED VEHICLE THEFT CONTROL SYSTEM

2.3 SCHEMATIC DIAGRAM:

Fig 2.2 schematic diagram

GSM BASED VEHICLE THEFT CONTROL SYSTEM

2.4 SCHEMATIC DESCRIPTION:

GSM BASED VEHICLE THEFT CONTROL SYSTEM

Fig 3.1.1 Micro controller

GSM BASED VEHICLE THEFT CONTROL SYSTEM

GSM BASED VEHICLE THEFT CONTROL SYSTEM

GSM BASED VEHICLE THEFT CONTROL SYSTEM

GSM BASED VEHICLE THEFT CONTROL SYSTEM

3.1.2 PIN DIAGRAM:

Fig -3.1.2 Pin out diagram of 89C52 ic

GSM BASED VEHICLE THEFT CONTROL SYSTEM

3.1.3 FUNCTIONAL BLOCK DIAGRAM OF MICROCONTROLLER

Fig 3.1.3 Functional block diagram of micro controller

GSM BASED VEHICLE THEFT CONTROL SYSTEM

3.1.4 Internal Block diagram:

Fig 3. Fig 3.1.4 AT89C52 internal block diagram

The 8052 oscillator and clock:

GSM BASED VEHICLE THEFT CONTROL SYSTEM

GSM BASED VEHICLE THEFT CONTROL SYSTEM

GSM BASED VEHICLE THEFT CONTROL SYSTEM

GSM BASED VEHICLE THEFT CONTROL SYSTEM

i) TO (Timer 0 low/high, address 8A/8C h)

GSM BASED VEHICLE THEFT CONTROL SYSTEM

Table 3. Timer 2 Operating Modes

GSM BASED VEHICLE THEFT CONTROL SYSTEM

GSM BASED VEHICLE THEFT CONTROL SYSTEM

GSM BASED VEHICLE THEFT CONTROL SYSTEM

GSM BASED VEHICLE THEFT CONTROL SYSTEM

AT89S52, as shown in the fol-lowing table

GSM BASED VEHICLE THEFT CONTROL SYSTEM

In interrupt Rr RESET IE E0 (External interrupt 0) T F0 (Timer 0 interrupt) I E1 (External interrupt 1)

T F1 (Timer 1 interrupt) S SERIAL

GSM BASED VEHICLE THEFT CONTROL SYSTEM

SFR SBUF SBUF TCON-1 TCON- 2 TMOD TMOD ------------

GSM BASED VEHICLE THEFT CONTROL SYSTEM

GSM BASED VEHICLE THEFT CONTROL SYSTEM

GSM BASED VEHICLE THEFT CONTROL SYSTEM

3.2 555 TIMER IC

GSM BASED VEHICLE THEFT CONTROL SYSTEM

3.2.1 555 timer ic pin diagram

GSM BASED VEHICLE THEFT CONTROL SYSTEM

respect to ground (pin 1).

GSM BASED VEHICLE THEFT CONTROL SYSTEM

GSM BASED VEHICLE THEFT CONTROL SYSTEM

GSM BASED VEHICLE THEFT CONTROL SYSTEM

GSM BASED VEHICLE THEFT CONTROL SYSTEM