Evolution of Intel Microprocessor
Evolution of Intel Microprocessor
Processors
Carry out instructions in a computer program. Perform arithmetic/logic operations along with input/output operations. This term has been in use in the computer industry at least since the early 1960s.
Processor Terminology
Instruction : A sequence of bits in a specific format to instruct the computer to perform a specific operation.
Moores Law
Given by Gordon Moore, co-founder and former chairman of Intel Corporation. It states : The number of transistors that can be placed inexpensively on an integrated circuit doubles approximately every two years. This trend has continued for more than half a century and is expected to continue until 2015 or 2020 or later. The capabilities of many digital electronic devices are strongly linked to Moore's law: processing speed, memory capacity, sensors and even the number and size of pixels in digital cameras.
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First single-chip microprocessor. Introduced November 15, 1971 Clock rate 740 kHz. 0.07 MIPS Instruction set contained 46 instructions Number of Transistors 2,300 at 10 m Addressable Memory 640 bytes Bus Width 4 bits (multiplexed address/data due to limited pins) Originally designed to be used in Busicom calculator
Introduced April 1, 1972. First 8-bit processor. Clock rate 800 kHz Instruction set contained 48 instructions Number of Transistors 3,500 at 10 m Addressable Memory 16 KB Originally intended for use in Datapoint 2200 microcomputer
Introduced June 8, 1978. Introduction of x86 architecture. Clock rate 4.77 - 10 MHz 16-bit data bus, 20-bit address bus Number of Transistors 29,000 at 3 m Addressable Memory 1 MB. Used in portable computing, and in the IBM PS/2 computers
Introduced June 1, 1979. Backward compatible 8086. Internal architecture 16-bit. External architecture 8-bit. Address bus 20-bit. Highly successful due to pivotal sale of IBM-PC.
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Introduced October 17, 1985. Clock rates : 16 33 MHz. 32-bit data & address bus Addressable Memory 4GB Virtual Memory 64 TB No. of transistors : 275,000 at1 m Backward compatible with x86 (16-bit) Used in Desktop Computing
Introduced March 22,1993. Clock rates : 60 - 66 MHz. 64-bit data bus 32-bit address bus Addressable Memory 4GB Virtual Memory 64 TB No. of transistors : 3.1 million at 0.8 m Superscalar Architecture 273 pin PGA package 16 KB L1 cache
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Introduced January 8, 1997. Clock rates : 66 MHz. 32 KB L1 cache 296/321 pin PGA. No. of transistors : 4.5 million at 0.35 m Intel MMX (SIMD Instruction set) support
Pentium II (1997):
Introduction of L2 cache (512 KB). Clock rates : upto 600 MHz. Introduction of Internet Streaming SIMD Instruction
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Clock rate : upto 3.8 GHz L2 cache increased upto 512 KB Introduction of SSE2 SIMD Extension No. of transistors : 42 million at 0.18 m In 2004, the 32-bit x86 architecture was extended to 64-bit x86-64 set Used greatly in the desktop & laptop computers.
Pure 64-bit architecture Introduction of SSSE3 SIMD Instructions Multiple cores on single die. Large L2 cache (2 12 MB) Use of LGA packaging Fabrication process in nm (65/45/32 nm) Introduction of L3 cache (core i series) Technologies such as hyper-threading, turboboost,etc.
New Technologies
Hyper-Threading:
It is a technology used to improve parallelization of computations performed on PC microprocessors. For each processor core that is physically present, the operating system addresses two virtual processors. In short, one core handles 2 threads at once.
Turbo-Boost:
It is a technology in latest Intel processors to dynamically increase the performance of the processor at the need of the user. Otherwise it saves energy/power by operating at a lower frequency.
The clock rates have increased upto 3.8 GHz. The Fabrication Process has reduced upto 32nm, thus saving power and space.
L3 caches have been introduced, as large as 12 MB. The no. of cores on a single die has reached upto 6.
Even the memory controllers have been
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