Data Link Layer
Data Link Layer
VRC Bits
1 1 1 0 0 0 1
1 1 0 0 0 0 0
0 1 1 0 1 1 1
0 1 1 0 0 0 0
0 0 0 1 1 1 0
0 0 0 0 0 0 0
1 1 1 1 1 1 1
0
0
1
0
1
0
1
1 1 0 0 1 1 1 1
Both simple parity and 2D parity do not catch
all errors.
Simple parity only catches odd numbers of bit
errors (50% of all errors)
2D parity is better at catching errors but
requires too many check bits added to a block
of data.
As such, these methods are not that often
used. However, a parity bit exists in 1 byte of
data.
Two dimensional parity check
It can be applied to a message of any length
It can be used to detect multiple errors
At the source, message is divided into m-bit units
At the sender, Generator creates an extra m-bit unit
called checksum by adding the bits of data to be
transmitted, which is sent with the message
At the receiver, checksum is again computed by
adding the bits of received bytes
If the newly computed checksum is same as one
transmitted, then it implies no error
It is calculated by adding all the bytes bit-by-bit by
neglecting the final carry (i.e out of MSB)
It can detect all odd numbers of errors and most of
the even number of errors.
Additive Checksum
Find the checksum byte for the fallowing
datawords: 10110011, 10101011, 01011010,
11010101
Check sum byte: 10001101
Additive Checksum
1 0 1 1 0 0 1 1
1 0 1 0 1 0 1 1
0 1 0 1 1 0 1 0
Neglect Final
Carry
1 1 0 1 0 1 0 1
1 1 0 0 0 1 1 0 1
Most widely and powerful error-detecting
techniques developed by IBM
Also referred to as Polynomial code, as it treats
the bit stream to be transmitted as a polynomial
The coefficients are the 0 and 1 values in the bit
string
The transmitter takes the Message polynomial
M(x)
Using polynomial arithmetic, divides it by a
given Generator polynomial G(x)
MSB and LSB of the Generator polynomial
should be always 1
Cyclic Redundancy Check (CRC)
A m-bit frame is regarded as the coefficient list for a
polynomial with m terms ranging from x
m-1
to x
0
The degree of the polynomial is m-1
Polynomial arithmetic is done in modulo-2
In modulo-2, there are no carries for addition or borrows
for subtraction
Both addition and subtraction are identical to exclusive
OR operation
Sender and receiver must agree upon a generator
polynomial, G(x), in advance
Degree of M(x) must be greater than degree of G(x)
Cyclic Redundancy Check (CRC)
m is the number of bits in the frame i.e.in M(x)
k is the degree of G(x)
Algorithm for computing the checksum at the
sender
1. Append k bits to the LSB side of the data frame, so
it now contains m+k bits i.e x
k
M(x)
2. Divide the resultant polynomial x
k
M(x) by the
generator G(x) in modulo-2 arithmetic
3. After division, the remainder bits (i.e r-bits) called
redundant bits or CRC are added to the dividend to
form the code word (m+r bits)
4. Finally, this code word is transmitted
Cyclic Redundancy Check (CRC)
At the receivers end, the received codeword
of m+r bits is again divided by the same
generator as used by the sender
If the remainder is non-zero, the receiver
know that the error has occurred and reject
the data word
If the remainder is zero, the receiver knows
that there is no error and accept the data
word
Cyclic Redundancy Check (CRC)
Generate the CRC code for the message x
3
+1 using the
generator polynomial x
3
+x+1
M(x) = x
3
+1 in Binary =1001
G(x) = x
3
+x+1 in Binary = 1011
x
3
M(x) = x
3
(x
3
+1) = x
6
+x
3
= 1001000
Cyclic Redundancy Check (CRC)
1 0 1 1
1 0 0 1
1 0 1 1
0 1 0 0
0 0 0 0
1 0 0 0
1 0 1 1
0 1 1 0
0 0 0 0
1 1 0
1 0 1 0
Dataword
CRC
(Remainder)
1 0 0 1 1 1 0
Codeword
1 0 0 1 1 1 0
CRC computation at receiver
Cyclic Redundancy Check (CRC)
Generate the CRC code for the dataword
1101011011 using generator 10011. Also write
both in the polynomial form.
Answer: CRC = 1110 codeword = 11010110111110
Cyclic Redundancy Check (CRC)
Standard polynomials
10.38
Performance of CRC
Once an error is detected, what is the receiver
going to do?
Do nothing (simply toss the frame or packet)
Return an error message for retransmission
Fix the error with no further help from the
transmitter
Error Correcting codes
Correct the errors
For a receiver to correct the error with no
further help from the transmitter requires a
large amount of redundant information to
accompany the original data
This redundant information allows the receiver to
determine the error and make corrections
This type of error control is often called
forward error correction(FEC) and involves
codes called Hamming codes
Error Correcting codes
Hamming distance
Hamming distance between two codewords of equal length is
the number of positions at which the corresponding
codewords are different
Hamming distance between two codewords X and Y is
denoted as d(X, y)
Example:
It can be calculated by performing the XOR operation on the
codewords
The number of 1 in the result will give you Hamming distance
Error Correcting codes
X= 1 0 0 1 0 0 1 0
Y= 1 1 0 1 1 0 0 1
d(X, Y) = 4
X= 1 0 0 1 0 0 1 0
Y= 1 1 0 1 1 0 0 1
XOR
0 1 0 0 1 0 1 1
d(X, Y) = 4
Minimum hamming distance (d
min
)
It is the smallest of the hamming distances
calculated between each possible pair of codes
Possible to detect errors if the total number of
errors in the received codeword is less than d
min,
otherwise errors can not be corrected
Error detection and correction capabilities of any
coding technique largely depend on the d
min
Error Correcting codes
m is the number of data bits in a frame
r is the number of redudant bits
Number of bits in Codeword: n=m+r
In most data communication, all 2
m
possible data
messages are legal, but not all 2
n
code words are
used
Selection of r
2
r
>=m+r+1
For example: if m=7, the smallest value of r=4
2
4
>=7+4+1
Error Correcting codes
Hamming code
The basic idea is to insert parity bits in between the data bits
to be transmitted
Parity bits are placed at each 2
t
bit positions where
t=0,1,2,3,,,,,
2
0
= 1 at first position
2
1
= 2 at second position
2
2
= 4 at fourth position and so on
Error Correcting codes
Number of redundancy bits needed
Let data bits = m
Redundancy bits = r
Total message sent = m+r
The value of r must satisfy the following relation:
2
r
m+r+1
Example: if m=4, 3 parity bits are required to
satisfy the condition
Error Correcting codes
Value of r bits set to 1 or 0 to make an even parity
r1= 1, 3, 5, 7, 9, 11, , , , , ,
r2=2,3, 6, 7, 10, 11, , , , ,
r4 = 4, 5, 6, 7, 12, 13, 14, 15, , , , ,
r8 = 8,9,10,11,12,13,14,15, , , , ,
and so on
Ex-OR the bits to get redundancy bits/ parity bits
Error Correcting codes
Error Correcting codes
Single bit errors
Error Correcting codes
Error Detection
The code being received is 10010100101. find the error bit
Error Correcting codes
Note :Error correcting capability
To detect d errors in the codeword
dmin d+1
To correct d errors in the code word
dmin 2d+1