Computer

Organization &
Architecture
UNIT 1:RTL
Register Transfer
Language(RTL)
CONTENTS
• Register Transfer Language

• Register Transfer

• Bus and Memory Transfers

• Arithmetic Microoperations

• Logic Microoperations

• Shift Microoperations

• Arithmetic Logic Shift Unit

Registers
 Registers are a type of computer memory used to quickly accept, store, and transfer data
and instructions that are being used immediately by the CPU. The registers used by the
CPU are often termed as Processor registers.
 A processor register may hold an instruction, a storage address, or any data (such as bit
sequence or individual characters).
 The computer needs processor registers for manipulating data and a register for holding a
memory address. The register holding the memory location is used to calculate the address
of the next instruction after the execution of the current instruction is completed.
Types of Registers
Following is the list of some of the most common registers used in a basic computer:

Register Symbol Number of bits Function

Data register DR 16 Holds memory operand

Address register AR 12 Holds address for the

memory

Accumulator AC 16 Processor register

Instruction register IR 16 Holds instruction code

Program counter PC 12 Holds address of the

instruction

Temporary register TR 16 Holds temporary data

Input register INPR 8 Carries input character

Output register OUTR 8 Carries output character

Descriptions of Registers

1. Main Memory Unit (Registers) –Accumulator: Stores the results of calculations made by ALU. This is the most common register,
used to store data taken out from the memory.
2. Special Purpose Registers: Users do not access these registers. These registers are for Computer system such as MAR,MBR,PC, IR
etc.
i) Program Counter (PC): Keeps track of the memory location of the next instructions to be dealt with. The PC then passes this
next address to Memory Address Register (MAR).
ii) Memory Address Register (MAR): It stores the memory locations of instructions that need to be fetched from memory or stored
into memory.
iii) Memory Data Register (MDR): It stores instructions fetched from memory or any data that is to be transferred to, and stored
in, memory.
iv) Current Instruction Register (CIR): It stores the most recently fetched instructions while it is waiting to be coded and
executed.
v) Instruction Buffer Register (IBR): The instruction that is not to be executed immediately is placed in the instruction buffer
register IBR.
3. General Purpose Registers: This is used to store data intermediate results during program execution. It can be accessed via assembly
programming.
Memory Transfer

 Most of the standard notations used for specifying operations on memory transfer are
stated below.
o The transfer of information from a memory unit to the user end is called a Read operation.
o The transfer of new information to be stored in the memory is called a Write operation.
o A memory word is designated by the letter M.
o We must specify the address of memory word while writing the memory transfer
operations.
o The address register is designated by AR and the data register by DR.
o Thus, a read operation can be stated as:
Read/Write Operation

 Read:  DR ← M [AR]   
o The Read statement causes a transfer of information into the data register (DR) from the
memory word (M) selected by the address register (AR).
o And the corresponding write operation can be stated as:
 Write: M [AR] ← R1  
o The Write statement causes a transfer of information from register R1 into the memory
word (M) selected by address register (AR).
Register Transfer Language

 The symbolic notation used to describe the micro-operation transfers amongst registers is
called Register transfer language.

 The term register transfer means the availability of hardware logic circuits that can

perform a stated micro-operation and transfer the result of the operation to the same or
another register.

 The word language is borrowed from programmers who apply this term to programming
languages. This programming language is a procedure for writing symbols to specify a
given computational process
Register Transfer
 The term Register Transfer refers to the availability of hardware logic circuits that can
perform a given micro-operation and transfer the result of the operation to the same or
another register. Most of the standard notations used for specifying operations on various
registers are stated below.
o The memory address register is designated by MAR.
o Program Counter PC holds the next instruction's address.
o Instruction Register IR holds the instruction being executed.
o R1 (Processor Register).
o We can also indicate individual bits by placing them in parenthesis. For instance, PC (8-
15), R2 (5), etc.
o Data Transfer from one register to another register is represented in symbolic form by
means of replacement operator. For instance, the following statement denotes a transfer of
the data of register R1 into register R2.
Contd..

 R2 ← R1  
o Typically, most of the users want the transfer to occur only in a predetermined control
condition. This can be shown by following if-then statement:
If (P=1) then (R2 ← R1); Here P is a control signal generated in the control section.
o It is more convenient to specify a control function (P) by separating the control variables
from the register transfer operation. For instance, the following statement defines the data
transfer operation under a specific control function (P).
 Notations of Registers

 Common ways of drawing the block diagram of a register

Register Showing individual bits

R1 7 6 5 4 3 2 1 0
15 0 15 8 7 0
R2 PC(H) PC(L)
Numbering of bits Subfields

Divided into two parts

Ex.- Block Diagram for register Transfer
P:  R2 ← R1  

 The following image shows the block diagram that depicts the transfer of data from R1 to
R2.
 HARDWARE IMPLEMENTATION OF CONTROLLED TRANSFERS

Implementation of controlled transfer

P: R2 R1

Block diagram Control P Load

R2 Clock
Circuit
n
R1

Block diagram
Timing diagram t t+1
Clock

Load
Transfer occurs here
Timing diagram
• The same clock controls the circuits that generate the control function
and the destination register
• Registers are assumed to use positive-edge-triggered flip-flops
Bus Design
 BUS Design Using Multiplexer
 Bus Design Using Three State buffer gate
Bus Designing Using Multiplexer
 A bus system will multiplex K register of n bits each to produce
an n-line common bus .
 The number of multiplexers needed to construct the bus is equal
to n.
 The size of each multiplexer must be K X1 since it multiplexes k
datalines
NUMERICAL PROBLEM

A digital computer has a common bus system for 16 registers of 32

bits each. The bus is constructed with multiplexers .
(a)How many selection inputs are there in each multiplexer
(b)What size of multiplexers are needed.
(c)How many multiplexer are there in the bus.
Solution

 For 16 Registers,4 selection lines are in each multiplexers

 For 16 registers,16x1 multiplexers are needed
 Since each 16 registers are of 32 bits ,so 32 multiplexers are
needed for each bit.
Three State Buffer
Bus Designing Using Three State Buffer
MICROOPERATIONS

• A microoperation is an elementary operation performed with data

stored in registers.
• Computer system microoperations are usually of four types:

- Register transfer microoperations

 Transfer binary information from one register to another
- Arithmetic microoperations
 Performs arithmetic operations on numeric data stored in
registers
- Logic microoperations
 Perform bit manipulation operations on nonnumeric data stored
in registers
- Shift microoperations
 Performs shift operations on data stored in registers.
Arithmetic Micro operations
 In general, the Arithmetic Micro-operations deals with the operations performed on
numeric data stored in the registers.
 The basic Arithmetic Micro-operations are classified in the following categories:
1. Addition
2. Subtraction
3. Increment
4. Decrement
5. Shift

 Some additional Arithmetic Micro-operations are classified as:

1. Add with carry
2. Subtract with borrow
3. Transfer/Load, etc.
 Arithmetic Micro-operations
Symbolic Representation Description

R3 ← R1 + R2 The contents of R1 plus R2 are transferred to R3.

R3 ← R1 - R2 The contents of R1 minus R2 are transferred to

R3.

R2 ← R2' Complement the contents of R2 (1's

complement)

R2 ← R2' + 1 2's complement the contents of R2 (negate)

R3 ← R1 + R2' + 1 R1 plus the 2's complement of R2 (subtraction)

R1 ← R1 + 1 Increment the contents of R1 by one

R1 ← R1 - 1 Decrement the contents of R1 by one

Addition of 4 –bits binary Number

A3A2A1A0
0 0 0 1 110 0 A
1 10 1 B
1 1 0 0 1 A+B

A+B
A-B =A+B’+1
n Bit Binary Adder
BINARY ADDER / SUBTRACTOR / INCREMENTER Cont. …

 Binary adder-Subtractor
 If M = 0 , the circuit is adder and when M = 1, the circuit is a subtractor,
 When M = 0, B = B  0 = B, and the circuit performs A + B,
 When M = 1, B = B  1 = B′ and C0 = 1, the circuit performs A plus 2’s
complement of B.
 For unsigned number, this gives A – B if A ≥B or the 2’s complement
of (B – A) if A < B,
 For signed numbers, the result is A – B provided there is no overflow.
 The increment microoperation adds one in a register and this can be
implemented with a binary counter as sequential circuit.
 Alternatively, this can be implemented as combination circuit through half
adder
 This approach can be extended to an n-bit binary incrementer by n-half
adder
n Bit Adder Subtractor
Binary Incrementer
Arithmetic Circuit
ARITHMETIC CIRCUIT Analysis

4-bit arithmetic circuit:

D = A + Y + Cin

By controlling Y with the two selection inputs (S1 and S0) and Cin equals to 1 or 0, it is pos-
sible to generate eight microoperations.
 When S1S0 = 00, the value of B is applied to the Y inputs of the
adder
 If Cin = 0, the output D = A + B
 If Cin = 1, the output D = A + B +1
…
Arithmetic Circuit Truth Table
S1 S0 Cin Y Output Microoperation
0 0 0 B D = A + B Add
0 0 1 B D=A+B+1 Add with carry
0 1 0 B’ D = A + B’ Subtract with borrow
0 1 1 B’ D = A + B’+ 1 Subtract
1 0 0 0 D = A Transfer A
1 0 1 0 D=A+1 Increment A
1 1 0 1 D=A-1 Decrement A
1 1 1 1 D = A Transfer A
Numerical

 Design an arithmetic circuit with one selection variable S and two n-bit data inputs A and
B. The circuit generates the following four arithmetic operations in conjunction with the
input carry Cin. Draw the logic diagram for the first two stages.
S Cin = 0 Cin =1
0 D=A+B(Add) D= A+1(Increment)
1 D = A-1 (Decrement) D = A+B’+1(Subtract)
 Logic Microoperations

LOGIC MICROOPERATIONS

 Specify binary operations on the strings of bits in registers

 Logic microoperations are bit-wise operations, i.e., they work on the individual bits of data
 useful for bit manipulations on binary data
 useful for making logical decisions based on the bit value
 There are, in principle, 16 different logic functions that can be defined over two binary input variables

A B F0 F1 F2 … F13 F14 F15

0 0 0 0 0 … 1 1 1
0 1 0 0 0 … 1 1 1
1 0 0 0 1 … 0 1 1
1 1 0 1 0 … 1 0 1

 However, most systems only implement four of these

 AND (), OR (), XOR (), Complement/NOT
 The others can be created from combination of these
 Logic Microoperations

LIST OF LOGIC MICROOPERATIONS

• List of Logic Microoperations
- 16 different logic operations with 2 binary variables.
n
- n binary variables → 2 functions
2
• Truth tables for 16 functions of 2 variables and the corresponding
16 logic micro-operations
x 0011 Boolean Micro-
Name
y 0101 Function Operations
0000 F0 = 0 F0 Clear
0001 F1 = xy FAB AND
0010 F2 = xy' F  A  B’
0011 F3 = x FA Transfer A
0100 F4 = x'y F  A’ B
0101 F5 = y FB Transfer B
0110 F6 = x  y FAB Exclusive-OR
0111 F7 = x + y FAB OR
1000 F8 = (x + y)' F  A  B)’ NOR
1001 F9 = (x  y)' F  (A  B)’ Exclusive-NOR
1010 F10 = y' F  B’ Complement B
1011 F11 = x + y' FAB
1100 F12 = x' F  A’ Complement A
1101 F13 = x' + y F  A’ B
1110 F14 = (xy)' F  (A  B)’ NAND
1111 F15 = 1 F  all 1's Set to all 1's
 Logic Microoperations

HARDWARE IMPLEMENTATION OF LOGIC MICROOPERATIONS

Ai
0
Bi

1
4X1 Fi
MUX
2

3 Select

S1
S0

Function table
S1 S 0 Output -operation
0 0 F=AB AND
0 1 F = AB OR
1 0 F=AB XOR
1 1 F = A’ Complement
 Logic Microoperations

APPLICATIONS OF LOGIC MICROOPERATIONS

 Logic microoperations can be used to manipulate individual bits or a portions of a

word in a register

 Consider the data in a register A. In another register, B, is bit data that will be used to
modify the contents of A

 Selective-set AA+B
 Selective-complement AAB
 Selective-clear A  A • B’
 Mask (Delete) AA• B
 Clear AAB
 Insert A  (A • B) + C
 Compare AAB
SELECTIVE-SET operation

 In a selective-set operation, the bit pattern in B is used to set certain bits in A

1100 At before
1010 B (logic operand)
1110 At+1 (A  A + B) after

 If a bit in B is set to 1, that same position in A gets set to 1, otherwise that bit in A
keeps its previous value
 OR micro-operation can be used to selective set
SELECTIVE-COMPLEMENT

 In a selective complement operation, the bit pattern in B is used to complement certain bits
in A

1100 At before
1010 B (logic operand)
0110 At+1 (A  A  B) after

 If a bit in B is set to 1, that same position in A gets complemented from its original value,
otherwise it is unchanged
 Xor micro-opration can be used.
SELECTIVE-CLEAR

 In a selective-clear operation, the bit pattern in B is used to clear certain bits in A

1100 At before
1010 B (logical operand)
0100 At+1 (A  A  B’) after

 If a bit in B is set to 1, that same position in A gets set to 0, otherwise it is

unchanged
 Logic Microoperations

MASK OPERATION

 In a mask operation, the bit pattern in B is used to clear certain bits in A

1100 At before
1010 B (logical operand)
1000 At+1 (A  A  B) after masking

 If a bit in B is set to 0, that same position in A gets set to 0, otherwise it is unchanged

CLEAR OPERATION

 In a clear operation, if the bits in the same position in A and B are the same, they are
cleared in A, otherwise they are set in A

1100 At
1010 B
0110 At+1 (A  A  B)
INSERT OPERATION
 An insert operation is used to introduce a specific bit pattern into A register,
leaving the other bit positions unchanged
 This is done as
 A mask operation to clear the desired bit positions, followed by
 An OR operation to introduce the new bits into the desired positions
 Example
 Suppose you wanted to introduce 1010 into the low order four bits of A: 1101 1000 1011
0001 A (Original) 1101 1000 1011 1010 A (Desired)

 1101 1000 1011 0001 A (Original)

1111 1111 1111 0000 Mask(AND)
1101 1000 1011 0000 A (Intermediate)
0000 0000 0000 1010 Added bits (INSERT)( OR)
1101 1000 1011 1010 A (Desired)
SHIFT MICROOPERATIONS
 Shift microoperations are used for serial transfer of data
 There are three types of shifts
 Logical shift
 Circular shift
 Arithmetic shift
 What differentiates them is the information that goes into the serial input

• A right shift operation

Serial
input

Serial
• A left shift operation input
LOGICAL SHIFT
 In a logical shift the serial input to the shift is a 0.

 A right logical shift operation:

 A left logical shift operation:

0

 In a Register Transfer Language, the following notation is used

 shl for a logical shift left
 shr for a logical shift right
 Examples:
 R2  shr R2
 R3  shl R3
CIRCULAR SHIFT
 In a circular shift the serial input is the bit that is shifted out of the other end of
the register.

 A right circular shift operation:

 A left circular shift operation:

 In a RTL, the following notation is used

 cil for a circular shift left
 cir for a circular shift right
 Examples:
 R2  cir R2
 R3  cil R3
ARITHMETIC SHIFT
 An arithmetic shift is meant for signed binary numbers (integer)
 An arithmetic left shift multiplies a signed number by two
 An arithmetic right shift divides a signed number by two
 The main distinction of an arithmetic shift is that it must keep the sign of the number
the same as it performs the multiplication or division

 A right arithmetic shift operation:

sign
bit

 A left arithmetic shift operation:

0
sign
bit
 Shift Microoperations

ARITHMETIC SHIFT
 An left arithmetic shift operation must be checked for the overflow

0
sign
bit

Before the shift, if the leftmost two

V bits differ, the shift will result in an
overflow

• In a RTL, the following notation is used

– ashl for an arithmetic shift left
– ashr for an arithmetic shift right
– Examples:
» R2  ashr R2
» R3  ashl R3
Numericals

 Starting from an initial value of R= 11011101, determine the sequence of binary

values in R after a logical shift left ,followed by a circular shift right , followed by a
logical shift right and a circular shift left.
 A bit register contains the binary value 10011100. What is the register value
after an arithmetic shift right ? Starting from the initial number 10011100
determine the register value after the arithmetic shift left and state whether
there is a overflow
Numericals

 The 8-bit register AR,BR,CR and DR initially have the following values
AR = 11110010
BR = 11111111
CR = 10111001
DR = 11101010
Determine the 8-bit values in each register after execution of the following sequence of micro-
operations
AR ← AR+BR
CR ← CR^DR, BR← BR+1
AR ← AR -CR
HARDWARE IMPLEMENTATION OF SHIFT MICROOPERATIONS

0 for shift right (down)

Serial Select
input (IR) 1 for shift left (up)

S
H0 Function table
0 MUX
1
Select output
A0
S H0 H1 H2 H3
A1 S
H1 0 IR A0 A1 A2
0 MUX
A2 1 1 A1 A2 A3 IL

A3
S
MUX H2
0
1

S
MUX H3
0
1

Serial
input (IL)
Figure 4-bit combinational circuit shifter
ARITHMETIC LOGIC SHIFT UNIT
S3
S2 Ci
S1
S0

Arithmetic Di
Circuit
Select

Ci+1
0 4x1 Fi
1 MUX
2
3
Ei
Logic
Bi
Ai
Circuit
shr Figure 4.13 One stage of arithmetic logic shift unit
Ai-1
A i+1 shl

S3 S2 S1 S0 Cin Operation Function

0 0 0 0 0 F=A Transfer A
0 0 0 0 1 F=A+1 Increment A
0 0 0 1 0 F=A+B Addition
0 0 0 1 1 F = A + B + 1 Add with carry
0 0 1 0 0 F = A + B’ Subtract with borrow
0 0 1 0 1 F = A + B’+ 1 Subtraction
0 0 1 1 0 F=A-1 Decrement A
0 0 1 1 1 F=A TransferA
0 1 0 0 X F=AB AND
0 1 0 1 X F = A B OR
0 1 1 0 X F=A B XOR
0 1 1 1 X F = A’ Complement A
1 0 X X X F = shr A Shift right A into F
1 1 X X X F = shl A Shift left A into F