Coa Module 5

Computer Organization and
Architecture
Presented by
Dr. Preetha K G
Department of Computer Science & Engineering
Rajagiri School of Engineering & Technology
Module 5
• I/O organization: accessing of I/O devices –

interrupts, interrupt hardware -Direct memory access.
• Memory system: basic concepts – semiconductor
RAMs. memory system considerations – ROMs, Content
addressable memory, cache memories - mapping
functions.
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Introduction
• The speed difference between the CPU and I/O

devices will be a bottleneck in performance.
• The I/O methods like Programmed I/O,
Interrupt driven I/O, Direct Memory Access, I/O
channels and I/O processors are used to solve
this problem.
• The I/O organization includes various types of
input/output devices, device controllers and
different I/O modes.
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Accessing of I/O devices
• If several devices are connected to the computer and if it is necessary to
select any one of them to participate in the I/O operation
• A simple arrangement to connect I/O devices to a computer is to use a
single bus structure.
• It consists of three sets of lines to carry ❖ Address ❖ Data ❖ Control
Signals.
• When the processor places a particular address on address lines, the
devices that recognize this address responds to the command issued on the
control lines.
• The processor request either a read or write operation and the requested
data are transferred over the data lines.
• When I/O devices & memory share the same address space, the
arrangement is called memory mapped I/O.
• .
4
Memory Mapped I/O
• In single-bus machines, the same bus serves as both the memory and I/O
bus.
• Hence, the addresses of I/O devices are not distinguished from the address
of the memory location.
• Therefore, to select I/O devices, a portion of memory address space is used
and in them unique address codes are placed- similar to memory location.
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Memory Mapped I/O
• The CPU selects an I/O device by placing the address on the address lines;
the corresponding I/O device recognizes its address and responds to the
CPU’s command.
• Any machine instruction used to access memory can be used to transfer data
to and from I/O devices.
• Example:
MOVE DATAIN, R0 //Reads the data from DATAIN then into processor register Ro
MOVE R0, DATAOUT//Send the contents of register Ro to location DATAOUT.
Where DATAIN and DATAOUT are I/O buffer registers.
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Memory Mapped I/O
• The device interface circuit consists of the address decoder, control circuits and the
data and status registers.
• Address decoder recognizes the address of the device when it appears in the address
lines.
• Data register holds the data being transferred to and from the processor.
• Status register contains information relevant to the operation that is to be performed
by the I/O device.
7
Memory Mapped I/O
• Example
• For an input device, SIN status flag in used SIN = 1, when a character is
entered at the keyboard.
• For an output device, SOUT status flag is used SIN = 0, once the char is read
by processor.
• The data from the keyboard are made available in the DATAIN register &
the data sent to the display are stored in DATAOUT register. 8
I/O Mapped I/O
• single-bus machines -I/O-mapped I/O
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I/O Mapped I/O
• The memory and I/O address space are kept separate by Read/Write control
lines
• A memory reference instruction activates the Read M or Write M line and does
not affect the I/O devices.
• The I/O instruction such as for example IN or OUT activates the Read I/O and
Write I/O line and causes a word to be transferred between the addressed I/O
and the CPU.
• Therefore, the memory location and the I/O device may have the same address.
• OUT data, device
• IN device, data
10
Data Transfer Mode- Programmed I/O
• The data transfer between the CPU and the I/O devices can be
of three types:
• Programmed I/O
• Interrupt driven I/O
• Direct Memory Access (DMA)
• Programmed I/O: It is a mode of data transfer between the
CPU and the logic within the peripherals. The transfer is
initiated using an I/O transfer (IOT) instruction and controlled
entirely by the CPU. During transfers, the system always
follows a pre-established sequence of events called Protocol.
• This type of transfer is used when small amounts of data are to
be transferred.
• Programmed I/O can be:
– Synchronous (Or Unconditional) transfer
– Asynchronous (Or Conditional) transfer
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SYNCHRONOUS TRANSFER
• Here no check is made by the CPU to determine the state of the
peripherals like Ready or Busy.
• The transfer takes place whenever the CPU directs it i.e. the I/O
device must be ready to receive the output data from the CPU or to
input data into the CPU when ever CPU initiates such a transfer.
Hence the transfer is Unconditional.
• The data transfers are controlled by a clock of fixed frequency,
independent of the CPU
ASYNCHRONOUS TRANSFER
• It is also known as Hand-shaking I/O.
• Here, the peripheral is queried about its status to see if it is ready to
perform the transfer.
• The actual transfer takes place only when the peripheral shows Ready
state. This method accomplishes synchronization between the CPU
and slower peripherals whose timing may not be fixed.
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Advantages of Programmed I/O

• The programmed I/O mode is very low cost
interface
• Can meet speeds of most of the peripherals.
Disadvantages of Programmed I/O
• CPU speed is brought down to that of the slow
peripheral device
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Computer Organization and

• I/O organization: accessing of I/O devices –

• The speed difference between the CPU and I/O

• single-bus machines -I/O-mapped I/O

Advantages of Programmed I/O

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